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PDP11, PDP10, AltairZ80: Fixed cases where assert() macro is called with an expression which has side effects and therefore wouldn't get executed if compiled with NDEBUG defined.

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This commit is contained in:
Mark Pizzolato 2014-03-01 17:15:10 -08:00 • committed by Jordi Guillaumes i Pons
parent dbe8533352
commit 9320c56f3f
6 changed files with 39 additions and 33 deletions
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2
AltairZ80/altairz80_dsk.c
View file

@ -306,7 +306,7 @@ static t_stat dsk_reset(DEVICE *dptr) {
} }
void install_ALTAIRbootROM(void) { void install_ALTAIRbootROM(void) {
assert(install_bootrom(bootrom_dsk, BOOTROM_SIZE_DSK, ALTAIR_ROM_LOW, TRUE) == SCPE_OK); ASSURE(install_bootrom(bootrom_dsk, BOOTROM_SIZE_DSK, ALTAIR_ROM_LOW, TRUE) == SCPE_OK);
} }
/* The boot routine modifies the boot ROM in such a way that subsequently /* The boot routine modifies the boot ROM in such a way that subsequently

2
AltairZ80/altairz80_hdsk.c
View file

@ -609,7 +609,7 @@ static t_stat hdsk_boot(int32 unitno, DEVICE *dptr) {
} }
install_ALTAIRbootROM(); /* install modified ROM */ install_ALTAIRbootROM(); /* install modified ROM */
} }
assert(install_bootrom(bootrom_hdsk, BOOTROM_SIZE_HDSK, HDSK_BOOT_ADDRESS, FALSE) == SCPE_OK); ASSURE(install_bootrom(bootrom_hdsk, BOOTROM_SIZE_HDSK, HDSK_BOOT_ADDRESS, FALSE) == SCPE_OK);
*((int32 *) sim_PC -> loc) = HDSK_BOOT_ADDRESS; *((int32 *) sim_PC -> loc) = HDSK_BOOT_ADDRESS;
return SCPE_OK; return SCPE_OK;
} }

40
PDP11/pdp11_dmc.c
View file

@ -2374,10 +2374,10 @@ buffer->actual_bytes_transferred = buffer->count;
controller->buffers_transmitted_to_net++; controller->buffers_transmitted_to_net++;
if (buffer->type == TransmitData) { if (buffer->type == TransmitData) {
buffer->actual_bytes_transferred = buffer->count - (DDCMP_HEADER_SIZE + DDCMP_CRC_SIZE); buffer->actual_bytes_transferred = buffer->count - (DDCMP_HEADER_SIZE + DDCMP_CRC_SIZE);
assert (insqueue (&buffer->hdr, controller->ack_wait_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->ack_wait_queue->hdr.prev));
} }
else { else {
assert (insqueue (&buffer->hdr, &controller->free_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->free_queue->hdr));
} }
controller->link.xmt_buffer = NULL; controller->link.xmt_buffer = NULL;
} }
@ -2589,7 +2589,7 @@ if (buffer) {
buffer->type = type; buffer->type = type;
buffer->address = address; buffer->address = address;
buffer->count = count; buffer->count = count;
assert (insqueue (&buffer->hdr, q->hdr.prev)); /* Insert at tail */ ASSURE (insqueue (&buffer->hdr, q->hdr.prev)); /* Insert at tail */
sim_debug(DBG_INF, q->controller->device, "%s%d: Queued %s buffer address=0x%08x count=%d\n", q->controller->device->name, q->controller->index, q->name, address, count); sim_debug(DBG_INF, q->controller->device, "%s%d: Queued %s buffer address=0x%08x count=%d\n", q->controller->device->name, q->controller->index, q->name, address, count);
} }
else { else {
@ -2680,7 +2680,7 @@ if ((dmc_is_rdyo_set(controller)) ||
return; return;
sim_debug(DBG_INF, controller->device, "%s%d: Output transfer completed\n", controller->device->name, controller->index); sim_debug(DBG_INF, controller->device, "%s%d: Output transfer completed\n", controller->device->name, controller->index);
buffer = (BUFFER *)remqueue (controller->completion_queue->hdr.next); buffer = (BUFFER *)remqueue (controller->completion_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
controller->transmit_buffer_output_transfers_completed++; controller->transmit_buffer_output_transfers_completed++;
controller->transfer_state = Idle; controller->transfer_state = Idle;
dmc_process_command(controller); // check for any other transfers dmc_process_command(controller); // check for any other transfers
@ -2891,7 +2891,7 @@ controller->link.nak_reason = 0;
while (controller->ack_wait_queue->count) { while (controller->ack_wait_queue->count) {
buffer = (BUFFER *)remqueue (controller->ack_wait_queue->hdr.prev); buffer = (BUFFER *)remqueue (controller->ack_wait_queue->hdr.prev);
memset (buffer->transfer_buffer, 0, DDCMP_HEADER_SIZE); memset (buffer->transfer_buffer, 0, DDCMP_HEADER_SIZE);
assert (insqueue (&buffer->hdr, &controller->xmt_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->xmt_queue->hdr));
} }
/* Also make sure that the transmit queue has no control packets in it /* Also make sure that the transmit queue has no control packets in it
and that any non transmit buffer(s) have zeroed headers so they will and that any non transmit buffer(s) have zeroed headers so they will
@ -2902,7 +2902,7 @@ while (controller->xmt_queue->count - data_packets) {
BUFFER *buffer_next = (BUFFER *)buffer->hdr.next; BUFFER *buffer_next = (BUFFER *)buffer->hdr.next;
buffer = (BUFFER *)remqueue (&buffer->hdr); buffer = (BUFFER *)remqueue (&buffer->hdr);
assert (insqueue (&buffer->hdr, &controller->free_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->free_queue->hdr));
buffer = buffer_next; buffer = buffer_next;
continue; continue;
} }
@ -2918,7 +2918,7 @@ BUFFER *buffer = dmc_buffer_allocate(controller);
buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE); buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE);
buffer->count = DDCMP_HEADER_SIZE; buffer->count = DDCMP_HEADER_SIZE;
ddcmp_build_start_packet (buffer->transfer_buffer); ddcmp_build_start_packet (buffer->transfer_buffer);
assert (insqueue (&buffer->hdr, &controller->xmt_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->xmt_queue->hdr));
dmc_ddcmp_start_transmitter (controller); dmc_ddcmp_start_transmitter (controller);
} }
void ddcmp_SendStack (CTLR *controller) void ddcmp_SendStack (CTLR *controller)
@ -2928,7 +2928,7 @@ BUFFER *buffer = dmc_buffer_allocate(controller);
buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE); buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE);
buffer->count = DDCMP_HEADER_SIZE; buffer->count = DDCMP_HEADER_SIZE;
ddcmp_build_start_ack_packet (buffer->transfer_buffer); ddcmp_build_start_ack_packet (buffer->transfer_buffer);
assert (insqueue (&buffer->hdr, &controller->xmt_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->xmt_queue->hdr));
dmc_ddcmp_start_transmitter (controller); dmc_ddcmp_start_transmitter (controller);
} }
void ddcmp_SendAck (CTLR *controller) void ddcmp_SendAck (CTLR *controller)
@ -2938,7 +2938,7 @@ BUFFER *buffer = dmc_buffer_allocate(controller);
buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE); buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE);
buffer->count = DDCMP_HEADER_SIZE; buffer->count = DDCMP_HEADER_SIZE;
ddcmp_build_ack_packet (buffer->transfer_buffer, controller->link.R, DDCMP_FLAG_SELECT); ddcmp_build_ack_packet (buffer->transfer_buffer, controller->link.R, DDCMP_FLAG_SELECT);
assert (insqueue (&buffer->hdr, &controller->xmt_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->xmt_queue->hdr));
dmc_ddcmp_start_transmitter (controller); dmc_ddcmp_start_transmitter (controller);
} }
void ddcmp_SendNak (CTLR *controller) void ddcmp_SendNak (CTLR *controller)
@ -2948,7 +2948,7 @@ BUFFER *buffer = dmc_buffer_allocate(controller);
buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE); buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE);
buffer->count = DDCMP_HEADER_SIZE; buffer->count = DDCMP_HEADER_SIZE;
ddcmp_build_nak_packet (buffer->transfer_buffer, controller->link.nak_reason, controller->link.R, DDCMP_FLAG_SELECT); ddcmp_build_nak_packet (buffer->transfer_buffer, controller->link.nak_reason, controller->link.R, DDCMP_FLAG_SELECT);
assert (insqueue (&buffer->hdr, &controller->xmt_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->xmt_queue->hdr));
dmc_ddcmp_start_transmitter (controller); dmc_ddcmp_start_transmitter (controller);
} }
void ddcmp_SendRep (CTLR *controller) void ddcmp_SendRep (CTLR *controller)
@ -2958,7 +2958,7 @@ BUFFER *buffer = dmc_buffer_allocate(controller);
buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE); buffer->transfer_buffer = (uint8 *)malloc (DDCMP_HEADER_SIZE);
buffer->count = DDCMP_HEADER_SIZE; buffer->count = DDCMP_HEADER_SIZE;
ddcmp_build_rep_packet (buffer->transfer_buffer, controller->link.N, DDCMP_FLAG_SELECT); ddcmp_build_rep_packet (buffer->transfer_buffer, controller->link.N, DDCMP_FLAG_SELECT);
assert (insqueue (&buffer->hdr, &controller->xmt_queue->hdr)); ASSURE (insqueue (&buffer->hdr, &controller->xmt_queue->hdr));
dmc_ddcmp_start_transmitter (controller); dmc_ddcmp_start_transmitter (controller);
} }
void ddcmp_SetSACK (CTLR *controller) void ddcmp_SetSACK (CTLR *controller)
@ -3020,7 +3020,7 @@ while (ddcmp_compare (controller->link.rcv_pkt[DDCMP_NUM_OFFSET], GE, R, control
buffer->count = DDCMP_HEADER_SIZE; buffer->count = DDCMP_HEADER_SIZE;
ddcmp_build_nak_packet (buffer->transfer_buffer, 2, R, DDCMP_FLAG_SELECT); ddcmp_build_nak_packet (buffer->transfer_buffer, 2, R, DDCMP_FLAG_SELECT);
R = R + 1; R = R + 1;
assert (insqueue (&buffer->hdr, qh)); ASSURE (insqueue (&buffer->hdr, qh));
qh = &buffer->hdr; qh = &buffer->hdr;
} }
dmc_ddcmp_start_transmitter (controller); dmc_ddcmp_start_transmitter (controller);
@ -3055,7 +3055,7 @@ if (!buffer) {
buffer->actual_bytes_transferred = controller->link.rcv_pkt_size - (DDCMP_HEADER_SIZE + DDCMP_CRC_SIZE); buffer->actual_bytes_transferred = controller->link.rcv_pkt_size - (DDCMP_HEADER_SIZE + DDCMP_CRC_SIZE);
Map_WriteB(buffer->address, buffer->actual_bytes_transferred, controller->link.rcv_pkt + DDCMP_HEADER_SIZE); Map_WriteB(buffer->address, buffer->actual_bytes_transferred, controller->link.rcv_pkt + DDCMP_HEADER_SIZE);
assert (insqueue (&buffer->hdr, controller->completion_queue->hdr.prev)); /* Insert at tail */ ASSURE (insqueue (&buffer->hdr, controller->completion_queue->hdr.prev)); /* Insert at tail */
ddcmp_IncrementR (controller); ddcmp_IncrementR (controller);
ddcmp_SetSACK (controller); ddcmp_SetSACK (controller);
} }
@ -3069,7 +3069,7 @@ while (buffer != NULL) {
ddcmp_compare (buffer->transfer_buffer[DDCMP_NUM_OFFSET], GT, controller->link.rcv_pkt[DDCMP_RESP_OFFSET], controller)) ddcmp_compare (buffer->transfer_buffer[DDCMP_NUM_OFFSET], GT, controller->link.rcv_pkt[DDCMP_RESP_OFFSET], controller))
break; break;
buffer = (BUFFER *)remqueue (&buffer->hdr); buffer = (BUFFER *)remqueue (&buffer->hdr);
assert (insqueue (&buffer->hdr, controller->completion_queue->hdr.prev)); /* Insert at tail */ ASSURE (insqueue (&buffer->hdr, controller->completion_queue->hdr.prev)); /* Insert at tail */
buffer = dmc_buffer_queue_head(controller->ack_wait_queue); buffer = dmc_buffer_queue_head(controller->ack_wait_queue);
} }
} }
@ -3086,7 +3086,7 @@ for (i=0; i < controller->ack_wait_queue->count; ++i) {
} }
ddcmp_build_data_packet (buffer->transfer_buffer, buffer->count - (DDCMP_HEADER_SIZE + DDCMP_CRC_SIZE), DDCMP_FLAG_SELECT|DDCMP_FLAG_QSYNC, controller->link.T, controller->link.R); ddcmp_build_data_packet (buffer->transfer_buffer, buffer->count - (DDCMP_HEADER_SIZE + DDCMP_CRC_SIZE), DDCMP_FLAG_SELECT|DDCMP_FLAG_QSYNC, controller->link.T, controller->link.R);
buffer = (BUFFER *)remqueue (&buffer->hdr); buffer = (BUFFER *)remqueue (&buffer->hdr);
assert (insqueue (&buffer->hdr, controller->xmt_queue->hdr.prev)); /* Insert at tail */ ASSURE (insqueue (&buffer->hdr, controller->xmt_queue->hdr.prev)); /* Insert at tail */
break; break;
} }
} }
@ -3684,25 +3684,25 @@ if (!(dptr->flags & DEV_DIS)) {
on the free queue */ on the free queue */
while (controller->ack_wait_queue->count) { while (controller->ack_wait_queue->count) {
buffer = (BUFFER *)remqueue (controller->ack_wait_queue->hdr.next); buffer = (BUFFER *)remqueue (controller->ack_wait_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
} }
while (controller->completion_queue->count) { while (controller->completion_queue->count) {
buffer = (BUFFER *)remqueue (controller->completion_queue->hdr.next); buffer = (BUFFER *)remqueue (controller->completion_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
} }
while (controller->rcv_queue->count) { while (controller->rcv_queue->count) {
buffer = (BUFFER *)remqueue (controller->rcv_queue->hdr.next); buffer = (BUFFER *)remqueue (controller->rcv_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
} }
while (controller->xmt_queue->count) { while (controller->xmt_queue->count) {
buffer = (BUFFER *)remqueue (controller->xmt_queue->hdr.next); buffer = (BUFFER *)remqueue (controller->xmt_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
} }
for (j = 0; j < controller->free_queue->size; j++) { for (j = 0; j < controller->free_queue->size; j++) {
buffer = (BUFFER *)remqueue (controller->free_queue->hdr.next); buffer = (BUFFER *)remqueue (controller->free_queue->hdr.next);
free (buffer->transfer_buffer); free (buffer->transfer_buffer);
buffer->transfer_buffer = NULL; buffer->transfer_buffer = NULL;
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev)); ASSURE (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
} }
dmc_buffer_queue_init_all(controller); dmc_buffer_queue_init_all(controller);
dmc_clrinint(controller); dmc_clrinint(controller);

22
PDP11/pdp11_kmc.c
View file

@ -1353,7 +1353,7 @@ static t_stat kmc_rxService (UNIT *rxup) {
break; break;
} }
d->rx.bda = bdl->ba; d->rx.bda = bdl->ba;
assert (insqueue (&bdl->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq))); ASSURE (insqueue (&bdl->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq)));
sim_debug (DF_BUF, &kmc_dev, "KMC%u line %u: receiving bdl=%06o\n", sim_debug (DF_BUF, &kmc_dev, "KMC%u line %u: receiving bdl=%06o\n",
k, rxup->unit_line, d->rx.bda); k, rxup->unit_line, d->rx.bda);
@ -1424,9 +1424,9 @@ static t_stat kmc_rxService (UNIT *rxup) {
} }
if (d->ctrlFlags & SEL6_CI_ENASS) { /* Note that spec requires first bd >= 6 if SS match enabled */ if (d->ctrlFlags & SEL6_CI_ENASS) { /* Note that spec requires first bd >= 6 if SS match enabled */
if (!(d->rxmsg[5] == (d->ctrlFlags & SEL6_CI_SADDR))) { /* Also include SELECT? */ if (!(d->rxmsg[5] == (d->ctrlFlags & SEL6_CI_SADDR))) { /* Also include SELECT? */
assert ((bdl = (BDL *)remqueue(d->bdqh.prev, &d->bdavail)) != NULL); ASSURE ((bdl = (BDL *)remqueue(d->bdqh.prev, &d->bdavail)) != NULL);
assert (bdl->ba == d->rx.bda); assert (bdl->ba == d->rx.bda);
assert (insqueue (&bdl->hdr, &d->rxqh, &d->rxavail, MAXQUEUE)); ASSURE (insqueue (&bdl->hdr, &d->rxqh, &d->rxavail, MAXQUEUE));
d->rxstate = RXIDLE; d->rxstate = RXIDLE;
break; break;
} }
@ -1946,7 +1946,7 @@ void kmc_rxBufferIn(dupstate *d, int32 ba, uint16 sel6v) {
d->rxstate = RXIDLE; d->rxstate = RXIDLE;
sim_cancel (rxup); sim_cancel (rxup);
while ((qe = (BDL *)remqueue (d->rxqh.next, &d->rxavail)) != NULL) { while ((qe = (BDL *)remqueue (d->rxqh.next, &d->rxavail)) != NULL) {
assert (insqueue (&qe->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq))); ASSURE (insqueue (&qe->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq)));
} }
if (!(sel6v & SEL6_BI_ENABLE)) { if (!(sel6v & SEL6_BI_ENABLE)) {
kmc_ctrlOut (k, SEL6_CO_KDONE, SEL2_IOT, d->line, bda); kmc_ctrlOut (k, SEL6_CO_KDONE, SEL2_IOT, d->line, bda);
@ -1962,7 +1962,7 @@ void kmc_rxBufferIn(dupstate *d, int32 ba, uint16 sel6v) {
return; return;
} }
qe->ba = ba; qe->ba = ba;
assert (insqueue (&qe->hdr, d->rxqh.prev, &d->rxavail, MAXQUEUE)); ASSURE (insqueue (&qe->hdr, d->rxqh.prev, &d->rxavail, MAXQUEUE));
if (sel6v & SEL6_BI_KILL) { /* KILL & Replace - ENABLE is set too */ if (sel6v & SEL6_BI_KILL) { /* KILL & Replace - ENABLE is set too */
kmc_ctrlOut (k, SEL6_CO_KDONE, SEL2_IOT, d->line, bda); kmc_ctrlOut (k, SEL6_CO_KDONE, SEL2_IOT, d->line, bda);
@ -2051,7 +2051,7 @@ void kmc_txBufferIn(dupstate *d, int32 ba, uint16 sel6v) {
* not handed to the DUP can be stopped here. * not handed to the DUP can be stopped here.
*/ */
while ((qe = (BDL *)remqueue (d->txqh.next, &d->txavail)) != NULL) { while ((qe = (BDL *)remqueue (d->txqh.next, &d->txavail)) != NULL) {
assert (insqueue (&qe->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq))); ASSURE (insqueue (&qe->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq)));
} }
if (d->txstate < TXACT) { /* DUP is idle */ if (d->txstate < TXACT) { /* DUP is idle */
sim_cancel (&tx_units[d->line][k]); /* Stop tx bdl walker */ sim_cancel (&tx_units[d->line][k]); /* Stop tx bdl walker */
@ -2078,7 +2078,7 @@ void kmc_txBufferIn(dupstate *d, int32 ba, uint16 sel6v) {
return; return;
} }
qe->ba = ba; qe->ba = ba;
assert (insqueue (&qe->hdr, d->txqh.prev, &d->txavail, MAXQUEUE)); ASSURE (insqueue (&qe->hdr, d->txqh.prev, &d->txavail, MAXQUEUE));
if (d->txstate == TXIDLE) { if (d->txstate == TXIDLE) {
UNIT *txup = &tx_units[d->line][k]; UNIT *txup = &tx_units[d->line][k];
if (!sim_is_active (txup)) { if (!sim_is_active (txup)) {
@ -2149,7 +2149,7 @@ static t_bool kmc_txNewBdl(dupstate *d) {
return FALSE; return FALSE;
} }
d->tx.bda = qe->ba; d->tx.bda = qe->ba;
assert (insqueue (&qe->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq))); ASSURE (insqueue (&qe->hdr, d->bdqh.prev, &d->bdavail, DIM(d->bdq)));
d->tx.first = TRUE; d->tx.first = TRUE;
d->tx.bd[1] = 0; d->tx.bd[1] = 0;
@ -2243,7 +2243,7 @@ static void kmc_processCompletions (int32 k) {
return; return;
} }
assert (insqueue (&qe->hdr, freecqHead.prev, &freecqCount, CQUEUE_MAX)); ASSURE (insqueue (&qe->hdr, freecqHead.prev, &freecqCount, CQUEUE_MAX));
sel2 = qe->bsel2; sel2 = qe->bsel2;
sel4 = qe->bsel4; sel4 = qe->bsel4;
sel6 = qe->bsel6; sel6 = qe->bsel6;
@ -2297,7 +2297,7 @@ static void kmc_ctrlOut (int32 k, uint8 code, uint16 rx, uint8 line, uint32 bda)
qe->bsel2 = ((line << SEL2_V_LINE) & SEL2_LINE) | rx | CMD_CTRLOUT; qe->bsel2 = ((line << SEL2_V_LINE) & SEL2_LINE) | rx | CMD_CTRLOUT;
qe->bsel4 = bda & 0177777; qe->bsel4 = bda & 0177777;
qe->bsel6 = ((bda >> (16-SEL6_V_CO_XAD)) & SEL6_CO_XAD) | code; qe->bsel6 = ((bda >> (16-SEL6_V_CO_XAD)) & SEL6_CO_XAD) | code;
assert (insqueue (&qe->hdr, cqueueHead.prev, &cqueueCount, CQUEUE_MAX)); ASSURE (insqueue (&qe->hdr, cqueueHead.prev, &cqueueCount, CQUEUE_MAX));
kmc_processCompletions(k); kmc_processCompletions(k);
return; return;
} }
@ -2377,7 +2377,7 @@ static t_bool kmc_bufferAddressOut (int32 k, uint16 flags, uint16 rx, uint8 line
qe->bsel2 = ((line << SEL2_V_LINE) & SEL2_LINE) | rx | CMD_BUFFOUT; qe->bsel2 = ((line << SEL2_V_LINE) & SEL2_LINE) | rx | CMD_BUFFOUT;
qe->bsel4 = bda & 0177777; qe->bsel4 = bda & 0177777;
qe->bsel6 = ((bda >> (16-SEL6_V_CO_XAD)) & SEL6_CO_XAD) | flags; qe->bsel6 = ((bda >> (16-SEL6_V_CO_XAD)) & SEL6_CO_XAD) | flags;
assert (insqueue (&qe->hdr, cqueueHead.prev, &cqueueCount, CQUEUE_MAX)); ASSURE (insqueue (&qe->hdr, cqueueHead.prev, &cqueueCount, CQUEUE_MAX));
kmc_processCompletions(k); kmc_processCompletions(k);
return TRUE; return TRUE;

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doc/simh_faq.doc
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6
sim_defs.h
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@ -743,6 +743,12 @@ typedef struct sim_bitfield BITFIELD;
#include "sim_timer.h" #include "sim_timer.h"
#include "sim_fio.h" #include "sim_fio.h"
/* Macro to ALWAYS execute the specified expression and fail if it evaluates to false. */
/* This replaces any references to "assert()" which should never be invoked */
/* with an expression which causes side effects (i.e. must be executed for */
/* the program to work correctly) */
#define ASSURE(_Expression) if (_Expression) {fprintf(stderr, "%s failed at %s line %d\n", #_Expression, __FILE__, __LINE__); abort();} else (void)0
/* Asynch/Threaded I/O support */ /* Asynch/Threaded I/O support */
#if defined (SIM_ASYNCH_IO) #if defined (SIM_ASYNCH_IO)