TIMER: Stabilize run away clock calibration conditions
- Adjust calibration parameters to properly record catchup variables for odd condition cases. - Disable idle percentage calibration skipping until the correct set of calibration variables are available. - When a pre-calibrate operation has been performed, make the results visible in the output of SHOW CLOCK As discussed in #705 and #699
This commit is contained in:
Mark Pizzolato
parent
f917accbec
commit
9514ea5a58
1 changed files with 81 additions and 54 deletions
85
sim_timer.c
85
sim_timer.c
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@ -150,6 +150,7 @@ return real_sim_os_ms_sleep (msec);
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t_bool sim_idle_enab = FALSE; /* global flag */
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volatile t_bool sim_idle_wait = FALSE; /* global flag */
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static int32 sim_precalibrate_ips = SIM_INITIAL_IPS;
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static int32 sim_calb_tmr = -1; /* the system calibrated timer */
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static int32 sim_calb_tmr_last = -1; /* shadow value when at sim> prompt */
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static double sim_inst_per_sec_last = 0; /* shadow value when at sim> prompt */
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@ -161,7 +162,7 @@ static uint32 sim_os_sleep_inc_ms = 0;
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static uint32 sim_os_clock_resoluton_ms = 0;
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static uint32 sim_os_tick_hz = 0;
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static uint32 sim_idle_stable = SIM_IDLE_STDFLT;
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static uint32 sim_idle_calib_pct = 50;
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static uint32 sim_idle_calib_pct = 100;
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static double sim_timer_stop_time = 0;
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static uint32 sim_rom_delay = 0;
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static uint32 sim_throt_ms_start = 0;
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@ -177,7 +178,7 @@ static uint32 sim_throt_sleep_time = 0;
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static int32 sim_throt_wait = 0;
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static uint32 sim_throt_delay = 3;
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#define CLK_TPS 100
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#define CLK_INIT (SIM_INITIAL_IPS/CLK_TPS)
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#define CLK_INIT (sim_precalibrate_ips/CLK_TPS)
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static int32 sim_int_clk_tps;
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static UNIT *sim_clock_unit[SIM_NTIMERS+1] = {NULL};
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UNIT * volatile sim_clock_cosched_queue[SIM_NTIMERS+1] = {NULL};
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@ -800,12 +801,14 @@ t_stat sim_timer_stop_svc (UNIT *uptr);
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#define DBG_CHK 0x100 /* check scheduled activation time*/
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#define DBG_INT 0x200 /* internal timer activities */
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#define DBG_GET 0x400 /* get_time activities */
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#define DBG_TIK 0x800 /* tick activities */
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DEBTAB sim_timer_debug[] = {
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{"TRACE", DBG_TRC, "Trace routine calls"},
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{"IDLE", DBG_IDL, "Idling activities"},
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{"QUEUE", DBG_QUE, "Event queuing activities"},
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{"IACK", DBG_ACK, "interrupt acknowledgement activities"},
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{"CALIB", DBG_CAL, "Calibration activities"},
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{"TICK", DBG_TIK, "Calibration tick activities"},
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{"TIME", DBG_TIM, "Activation and scheduling activities"},
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{"GETTIME", DBG_GET, "get_time activities"},
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{"INTER", DBG_INT, "Internal timer activities"},
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@ -930,11 +933,11 @@ if (rtc_clock_catchup_pending[tmr]) { /* catchup tick? */
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++rtc_clock_catchup_ticks[tmr]; /* accumulating which were catchups */
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rtc_clock_catchup_pending[tmr] = FALSE;
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}
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rtc_ticks[tmr] = rtc_ticks[tmr] + 1; /* count ticks */
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rtc_ticks[tmr] += 1; /* count ticks */
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if (rtc_ticks[tmr] < ticksper) /* 1 sec yet? */
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return rtc_currd[tmr];
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rtc_ticks[tmr] = 0; /* reset ticks */
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rtc_elapsed[tmr] = rtc_elapsed[tmr] + 1; /* count sec */
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rtc_elapsed[tmr] += 1; /* count sec */
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if (!rtc_avail) /* no timer? */
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return rtc_currd[tmr];
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if (sim_calb_tmr != tmr) {
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@ -953,11 +956,15 @@ if (new_rtime < rtc_rtime[tmr]) { /* time running backward
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sim_debug (DBG_CAL, &sim_timer_dev, "time running backwards - OldTime: %u, NewTime: %u, result: %d\n", rtc_rtime[tmr], new_rtime, rtc_currd[tmr]);
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rtc_vtime[tmr] = rtc_rtime[tmr] = new_rtime; /* reset wall time */
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rtc_nxintv[tmr] = 1000;
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if (rtc_clock_catchup_eligible[tmr]) {
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rtc_clock_catchup_base_time[tmr] = sim_timenow_double();
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rtc_calib_tick_time[tmr] = 0.0;
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}
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return rtc_currd[tmr]; /* can't calibrate */
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}
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delta_rtime = new_rtime - rtc_rtime[tmr]; /* elapsed wtime */
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rtc_rtime[tmr] = new_rtime; /* adv wall time */
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rtc_vtime[tmr] = rtc_vtime[tmr] + 1000; /* adv sim time */
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rtc_vtime[tmr] += 1000; /* adv sim time */
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if (delta_rtime > 30000) { /* gap too big? */
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/* This simulator process has somehow been suspended for a significant */
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/* amount of time. This will certainly happen if the host system has */
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@ -969,6 +976,8 @@ if (delta_rtime > 30000) { /* gap too big? */
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rtc_vtime[tmr] = rtc_rtime[tmr]; /* sync virtual and real time */
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rtc_nxintv[tmr] = 1000; /* reset next interval */
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rtc_gtime[tmr] = sim_gtime(); /* save instruction time */
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if (rtc_clock_catchup_eligible[tmr])
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rtc_calib_tick_time[tmr] += ((double)delta_rtime / 1000.0);/* advance tick time */
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sim_debug (DBG_CAL, &sim_timer_dev, "gap too big: delta = %d - result: %d\n", delta_rtime, rtc_currd[tmr]);
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return rtc_currd[tmr]; /* can't calibr */
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}
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@ -978,14 +987,17 @@ if (tmr != SIM_NTIMERS) {
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else
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last_idle_pct = MIN(100, (uint32)(100.0 * (((double)(rtc_clock_time_idled[tmr] - rtc_clock_time_idled_last[tmr])) / ((double)delta_rtime))));
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rtc_clock_time_idled_last[tmr] = rtc_clock_time_idled[tmr];
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if (last_idle_pct > (100 - sim_idle_calib_pct)) {
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#if defined (SIM_TIME_IDLE_PCT)
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if (last_idle_pct > sim_idle_calib_pct) {
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rtc_rtime[tmr] = new_rtime; /* save wall time */
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rtc_vtime[tmr] = rtc_vtime[tmr] + 1000; /* adv sim time */
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rtc_vtime[tmr] += 1000; /* adv sim time */
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rtc_gtime[tmr] = sim_gtime(); /* save instruction time */
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rtc_based[tmr] = rtc_initd[tmr];
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++rtc_clock_calib_skip_idle[tmr];
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sim_debug (DBG_CAL, &sim_timer_dev, "skipping calibration due to idling (%d%%) - result: %d\n", last_idle_pct, rtc_currd[tmr]);
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return rtc_currd[tmr]; /* avoid calibrating idle checks */
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}
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#endif
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}
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new_gtime = sim_gtime();
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if ((last_idle_pct == 0) && (delta_rtime != 0)) {
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@ -1000,9 +1012,10 @@ if (sim_asynch_timer) {
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/* avoid excessive swings in the calibrated result */
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if (new_currd > 10*rtc_currd[tmr]) /* don't swing big too fast */
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new_currd = 10*rtc_currd[tmr];
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else
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else {
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if (new_currd < rtc_currd[tmr]/10) /* don't swing small too fast */
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new_currd = rtc_currd[tmr]/10;
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}
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rtc_currd[tmr] = new_currd;
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rtc_gtime[tmr] = new_gtime; /* save instruction time */
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sim_debug (DBG_CAL, &sim_timer_dev, "asynch calibration result: %d\n", rtc_currd[tmr]);
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@ -1020,8 +1033,10 @@ else
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delta_vtime = rtc_vtime[tmr] - rtc_rtime[tmr]; /* gap */
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if (delta_vtime > SIM_TMAX) /* limit gap */
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delta_vtime = SIM_TMAX;
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else if (delta_vtime < -SIM_TMAX)
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else {
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if (delta_vtime < -SIM_TMAX)
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delta_vtime = -SIM_TMAX;
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}
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rtc_nxintv[tmr] = 1000 + delta_vtime; /* next wtime */
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rtc_currd[tmr] = (int32) (((double) rtc_based[tmr] * (double) rtc_nxintv[tmr]) /
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1000.0); /* next delay */
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@ -1133,10 +1148,14 @@ fprintf (st, "Calibrated Timer: %s\n", (calb_tmr == -1) ? "Undeterm
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(sim_clock_unit[calb_tmr] ? sim_uname(sim_clock_unit[calb_tmr]) : "")));
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if (calb_tmr == SIM_NTIMERS)
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fprintf (st, "Catchup Ticks: %s for clocks ticking faster than %d Hz\n", sim_catchup_ticks ? "Enabled" : "Disabled", sim_os_tick_hz);
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if (sim_idle_calib_pct == 0)
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fprintf (st, "Pre-Calibration Estimated Rate: %s\n", sim_fmt_numeric ((double)sim_precalibrate_ips));
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if (sim_idle_calib_pct == 100)
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fprintf (st, "Calibration: Always\n");
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else
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fprintf (st, "Calibration: Skipped when Idle exceeds %d%%\n", sim_idle_calib_pct);
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#if defined(SIM_ASYNCH_CLOCKS)
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fprintf (st, "Asynchronous Clocks: %s\n", sim_asynch_timer ? "Active" : "Available");
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#endif
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fprintf (st, "\n");
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for (tmr=clocks=0; tmr<=SIM_NTIMERS; ++tmr) {
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if (0 == rtc_initd[tmr])
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@ -1159,8 +1178,8 @@ for (tmr=clocks=0; tmr<=SIM_NTIMERS; ++tmr) {
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fprintf (st, " Seconds Running: %s (%s)\n", sim_fmt_numeric ((double)rtc_elapsed[tmr]), sim_fmt_secs ((double)rtc_elapsed[tmr]));
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if (tmr == calb_tmr) {
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fprintf (st, " Calibration Opportunities: %s\n", sim_fmt_numeric ((double)rtc_calibrations[tmr]));
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if (sim_idle_calib_pct)
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fprintf (st, " Calib Skip Idle Thresh %%: %u\n", sim_idle_calib_pct);
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if (sim_idle_calib_pct && (sim_idle_calib_pct != 100))
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fprintf (st, " Calib Skip when Idle >: %u%%\n", sim_idle_calib_pct);
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if (rtc_clock_calib_skip_idle[tmr])
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fprintf (st, " Calibs Skip While Idle: %u\n", rtc_clock_calib_skip_idle[tmr]);
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if (rtc_clock_calib_backwards[tmr])
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@ -1340,9 +1359,10 @@ if (flag) {
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sim_catchup_ticks = TRUE;
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}
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else {
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if (sim_catchup_ticks)
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if (sim_catchup_ticks) {
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sim_catchup_ticks = FALSE;
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}
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}
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return SCPE_OK;
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}
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@ -1357,17 +1377,20 @@ return SCPE_OK;
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t_stat sim_timer_set_idle_pct (int32 flag, CONST char *cptr)
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{
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t_stat r = SCPE_OK;
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int32 newpct;
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char gbuf[CBUFSIZE];
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if (cptr == NULL)
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return SCPE_ARG;
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#if defined (SIM_TIME_IDLE_PCT)
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if (1) {
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int32 newpct;
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char gbuf[CBUFSIZE];
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cptr = get_glyph (cptr, gbuf, 0); /* get argument */
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if (isdigit (gbuf[0]))
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newpct = (int32) get_uint (gbuf, 10, 100, &r);
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else {
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if (MATCH_CMD (gbuf, "ALWAYS") == 0)
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newpct = 0;
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newpct = 100;
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else
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r = SCPE_ARG;
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}
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@ -1376,7 +1399,11 @@ if ((r != SCPE_OK) || (newpct == (int32)(sim_idle_calib_pct)))
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if (newpct == 0)
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return SCPE_ARG;
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sim_idle_calib_pct = (uint32)newpct;
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}
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return SCPE_OK;
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#else
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return sim_messagef (SCPE_NOFNC, "Calibration Idle Threshold %% is not implemented\n");
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#endif
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}
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/* Set stop time */
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@ -1551,7 +1578,7 @@ if ((!sim_idle_enab) || /* idling disabled */
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return FALSE;
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}
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if (_rtcn_tick_catchup_check (tmr, -1)) {
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sim_debug (DBG_CAL, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d) - rescheduling catchup tick for %s\n", tmr, sin_cyc, sim_uname (sim_clock_unit[tmr]));
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sim_debug (DBG_CAL, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d) - rescheduling catchup tick %d for %s\n", tmr, sin_cyc, 1 + rtc_ticks[tmr], sim_uname (sim_clock_unit[tmr]));
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sim_interval -= sin_cyc;
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return FALSE;
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}
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@ -1569,7 +1596,7 @@ if (_rtcn_tick_catchup_check (tmr, -1)) {
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To negate this effect, we accumulate the time actually idled here.
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sim_rtcn_calb compares the accumulated idle time during the most recent
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second and if it exceeds the percentage defined by and sim_idle_calib_pct
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second and if it exceeds the percentage defined by sim_idle_calib_pct
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calibration is suppressed. Thus recalibration only happens if things
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didn't idle too much.
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@ -1606,6 +1633,9 @@ if (w_idle < 500) { /* shorter than 1/2 the
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in_nowait = TRUE;
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return FALSE;
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}
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if (w_ms > 1000) { /* too long a wait */
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sim_debug (DBG_TIK, &sim_timer_dev, "waiting too long: w_ms=%d usecs, w_idle=%d usecs, sim_interval=%d, rtc_currd[tmr]=%d\n", w_ms, w_idle, sim_interval, rtc_currd[tmr]);
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}
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in_nowait = FALSE;
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if (sim_clock_queue == QUEUE_LIST_END)
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sim_debug (DBG_IDL, &sim_timer_dev, "sleeping for %d ms - pending event in %d instructions\n", w_ms, sim_interval);
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@ -1734,7 +1764,7 @@ else {
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if (sim_throt_type == SIM_THROT_SPC) /* Set initial value while correct one is determined */
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sim_throt_cps = (int32)((1000.0 * sim_throt_val) / (double)sim_throt_sleep_time);
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else
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sim_throt_cps = SIM_INITIAL_IPS;
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sim_throt_cps = sim_precalibrate_ips;
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return SCPE_OK;
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}
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@ -2147,12 +2177,12 @@ if ((rtc_hz[tmr] > 0) &&
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if (tnow > (rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr]))) {
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if (!rtc_clock_catchup_pending[tmr]) {
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_tick_catchup_check(%d) - scheduling catchup tick for %s which is behind %s\n", time, sim_uname (sim_clock_unit[tmr]), sim_fmt_secs ((rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr]))- tnow));
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sim_debug (DBG_TIK, &sim_timer_dev, "_rtcn_tick_catchup_check(%d) - scheduling catchup tick %d for %s which is behind %s\n", time, 1 + rtc_ticks[tmr], sim_uname (sim_clock_unit[tmr]), sim_fmt_secs (tnow - (rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr]))));
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rtc_clock_catchup_pending[tmr] = TRUE;
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sim_activate_abs (&sim_timer_units[tmr], (time < 0) ? 0 : time);
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}
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else
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sim_debug (DBG_CAL, &sim_timer_dev, "_rtcn_tick_catchup_check(%d) - already pending catchup tick for %s which is behind %s\n", time, sim_uname (sim_clock_unit[tmr]), sim_fmt_secs ((rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr]))- tnow));
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sim_debug (DBG_TIK, &sim_timer_dev, "_rtcn_tick_catchup_check(%d) - already pending catchup tick %d for %s which is behind %s\n", time, 1 + rtc_ticks[tmr], sim_uname (sim_clock_unit[tmr]), sim_fmt_secs (tnow - (rtc_clock_catchup_base_time[tmr] + (rtc_calib_tick_time[tmr] + rtc_clock_tick_size[tmr]))));
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return TRUE;
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}
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}
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@ -2373,7 +2403,7 @@ if (tmr == SIM_NTIMERS) { /* None found? */
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SIM_INTERNAL_UNIT.action = &sim_timer_clock_tick_svc;
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SIM_INTERNAL_UNIT.flags = UNIT_IDLE;
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sim_register_internal_device (&sim_int_timer_dev); /* Register Internal timer device */
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sim_rtcn_init_unit (&SIM_INTERNAL_UNIT, (CLK_INIT*CLK_TPS)/sim_int_clk_tps, SIM_INTERNAL_CLK);
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sim_rtcn_init_unit (&SIM_INTERNAL_UNIT, (int32)((CLK_INIT*CLK_TPS)/sim_int_clk_tps), SIM_INTERNAL_CLK);
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SIM_INTERNAL_UNIT.action (&SIM_INTERNAL_UNIT); /* Force tick to activate timer */
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}
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return;
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@ -2440,7 +2470,7 @@ for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
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rtc_vtime[tmr] += sim_prompt_time;
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sim_debug (DBG_CAL, &sim_timer_dev, "sim_start_timer_services(tmr=%d) - adjusting calibration real time by %d ms\n", tmr, (int)sim_prompt_time);
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if (rtc_clock_catchup_eligible[tmr])
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rtc_clock_catchup_base_time[tmr] += (((double)sim_prompt_time) / 1000.0);
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rtc_calib_tick_time[tmr] += (((double)sim_prompt_time) / 1000.0);
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}
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}
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if (sim_calb_tmr == -1) {
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@ -3235,7 +3265,6 @@ void sim_timer_precalibrate_execution_rate (void)
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{
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const char **cmd = sim_clock_precalibrate_commands;
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uint32 start, end;
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double ips_rate;
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int32 saved_switches = sim_switches;
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int32 tmr;
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UNIT precalib_unit = { UDATA (&sim_timer_stop_svc, 0, 0) };
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@ -3249,18 +3278,16 @@ while (*cmd)
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exdep_cmd (EX_D, *(cmd++));
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sim_switches = saved_switches;
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sim_cancel (&SIM_INTERNAL_UNIT);
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sim_activate (&precalib_unit, SIM_INITIAL_IPS);
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sim_activate (&precalib_unit, sim_precalibrate_ips);
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start = sim_os_msec();
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sim_instr();
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end = sim_os_msec();
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ips_rate = 1000.0 * (SIM_INITIAL_IPS / (double)(end - start));
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sim_precalibrate_ips = (int32)(1000.0 * (sim_precalibrate_ips / (double)(end - start)));
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for (tmr=0; tmr<=SIM_NTIMERS; tmr++) {
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if (rtc_hz[tmr])
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rtc_initd[tmr] = rtc_currd[tmr] = (int32)(ips_rate / rtc_hz[tmr]);
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rtc_initd[tmr] = rtc_currd[tmr] = (int32)(((double)sim_precalibrate_ips) / rtc_hz[tmr]);
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}
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reset_all_p (0);
|
||||
sim_run_boot_prep (RU_GO);
|
||||
if (sim_switches & SWMASK ('V'))
|
||||
sim_printf ("Pre-Calibrate execution rate: %s cycles/sec\n", sim_fmt_numeric (ips_rate));
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue