From 95c7312669ca0102f6255de4644a8e27aa2f842a Mon Sep 17 00:00:00 2001 From: Mark Pizzolato Date: Sat, 12 Apr 2014 07:22:18 -0700 Subject: [PATCH] PDP10: Added missing UBA DMA debug output of the trailing bytes when a partial word is referenced at the end of a DMA transfer. Added ascii and sixbit decoded contents displayed in the debug output. --- PDP10/pdp10_defs.h | 2 + PDP10/pdp10_ksio.c | 175 +++++++++++++++++++++++++-------------------- 2 files changed, 100 insertions(+), 77 deletions(-) diff --git a/PDP10/pdp10_defs.h b/PDP10/pdp10_defs.h index c876cc91..8be06f71 100644 --- a/PDP10/pdp10_defs.h +++ b/PDP10/pdp10_defs.h @@ -769,6 +769,8 @@ int32 Map_ReadW18 (uint32 ba, int32 bc, uint32 *buf); int32 Map_WriteB (uint32 ba, int32 bc, uint8 *buf); int32 Map_WriteW (uint32 ba, int32 bc, uint16 *buf); int32 Map_WriteW18 (uint32 ba, int32 bc, uint32 *buf); +void uba_debug_dma_in (uint32 ba, a10 pa_start, a10 pa_end); +void uba_debug_dma_out (uint32 ba, a10 pa_start, a10 pa_end); t_stat set_addr (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat set_addr_flt (UNIT *uptr, int32 val, char *cptr, void *desc); diff --git a/PDP10/pdp10_ksio.c b/PDP10/pdp10_ksio.c index 243fc1c8..e9b359f2 100644 --- a/PDP10/pdp10_ksio.c +++ b/PDP10/pdp10_ksio.c @@ -137,10 +137,6 @@ static const int32 ubabr54[UBANUM] = { #define V_WORD0 V_BYTE0 #define V_WORD1 V_BYTE2 -#if 0 -static const int32 ubashf[4] = { V_BYTE0, V_BYTE1, V_BYTE2, V_BYTE3 }; -#endif - /* Bits to preserve when writing each Unibus byte. * This excludes the XX bits so they are cleared. */ @@ -152,10 +148,6 @@ static const int32 ubashf[4] = { V_BYTE0, V_BYTE1, V_BYTE2, V_BYTE3 }; #define M_WORD0 (~INT64_C (0777777000000)) /* Clear word 0 + XX */ #define M_WORD1 (~INT64_C (0000000777777)) /* Clear word 1 + XX */ -#if 0 -static const d10 ubamask[4] = { M_BYTE0, M_BYTE1, M_BYTE2, M_BYTE3 }; -#endif - extern d10 *M; /* main memory */ extern d10 *ac_cur; extern d10 pager_word; @@ -165,11 +157,6 @@ extern UNIT cpu_unit; extern jmp_buf save_env; extern int32 pi_eval (void); -extern int32 rp_inta (void); -extern int32 tu_inta (void); -extern int32 lp20_inta (void); -extern int32 dz_rxinta (void); -extern int32 dz_txinta (void); t_stat ubmap_rd (int32 *data, int32 addr, int32 access); t_stat ubmap_wr (int32 data, int32 addr, int32 access); @@ -180,7 +167,8 @@ t_stat wr_nop (int32 data, int32 addr, int32 access); t_stat uba_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat uba_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw); t_stat uba_reset (DEVICE *dptr); -static void uba_debug_dma (int32 mask, a10 pa_start, a10 pa_end); +void uba_debug_dma_in (a10 pa_start, a10 pa_end); +void uba_debug_dma_out (a10 pa_start, a10 pa_end); d10 ReadIO (a10 ea); void WriteIO (a10 ea, d10 val, int32 mode); @@ -626,7 +614,7 @@ uint32 ea, ofs, cp, np; int32 seg; a10 pa10 = ~0u; d10 m; -a10 mem_pa10 = ~0u; +a10 dpy_pa10 = ~0u; if ((ba & ~((IO_M_UBA< bc) seg = bc; cp = UBMPAGE (ba); /* Only one word, can't cross page */ - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL); /* map addr */ + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL); /* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -681,7 +669,7 @@ if (seg) { /* Unaligned head */ assert (FALSE); } if (bc == 0) { - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); + uba_debug_dma_out (dpy_pa10, pa10); return 0; } } /* Head */ @@ -696,8 +684,8 @@ if (seg > 0) { /* Body: Whole PDP-10 words, 4 bytes */ for ( ; seg; seg -= 4, ba += 4) { /* aligned longwords */ np = UBMPAGE (ba); if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ + uba_debug_dma_out (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -723,15 +711,15 @@ if (bc) { assert (bc <= 3); np = UBMPAGE (ba); /* Only one word, last possible page crossing */ if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ + uba_debug_dma_out (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); return (bc); /* return bc */ } } - m = M[pa10]; + m = M[pa10++]; switch (bc) { case 3: buf[2] = (uint8) (m & M_BYTE); /* V_BYTE2 */ @@ -745,7 +733,7 @@ if (bc) { } } -uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); +uba_debug_dma_out (dpy_pa10, pa10); return 0; } @@ -755,7 +743,7 @@ uint32 ea, cp, np; int32 seg; a10 pa10 = ~0u; d10 m; -a10 mem_pa10 = ~0u; +a10 dpy_pa10 = ~0u; if ((ba & ~((IO_M_UBA< bc) seg = bc; cp = UBMPAGE (ba); /* Only one word, can't cross page */ - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL); /* map addr */ + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL); /* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -800,7 +788,7 @@ if (seg) { /* Unaligned head, can only be W ba += seg; *buf++ = (uint16) (M[pa10++] & M_WORD); if ((bc -= seg) == 0) { - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); + uba_debug_dma_out (dpy_pa10, pa10); return 0; } } /* Head */ @@ -814,8 +802,8 @@ if (seg > 0) { for ( ; seg; seg -= 4, ba += 4) { /* aligned longwords */ np = UBMPAGE (ba); if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ + uba_debug_dma_out (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -837,18 +825,18 @@ if (bc) { assert (bc == 2); np = UBMPAGE (ba); /* Only one word, last possible page crossing */ if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ + uba_debug_dma_out (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); return (bc); /* return bc */ } } - *buf = (uint16) ((M[pa10] >> V_WORD0) & M_WORD); + *buf = (uint16) ((M[pa10++] >> V_WORD0) & M_WORD); } -uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); +uba_debug_dma_out (dpy_pa10, pa10); return 0; } @@ -864,7 +852,7 @@ uint32 ea, cp, np; int32 seg; a10 pa10 = ~0u; d10 m; -a10 mem_pa10 = ~0u; +a10 dpy_pa10 = ~0u; if ((ba & ~((IO_M_UBA< bc) seg = bc; cp = UBMPAGE (ba); /* Only one word, can't cross page */ - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL); /* map addr */ + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL); /* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read 18b Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -909,7 +897,7 @@ if (seg) { /* Unaligned head */ ba += seg; *buf++ = (uint32) (M[pa10++] & M_RH); if ((bc -= seg) == 0) { - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); + uba_debug_dma_out (dpy_pa10, pa10); return 0; } } /* Head */ @@ -923,8 +911,8 @@ if (seg > 0) { for ( ; seg; seg -= 4, ba += 4) { /* aligned longwords */ np = UBMPAGE (ba); if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ + uba_debug_dma_out (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read 18b Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -946,18 +934,18 @@ if (bc) { assert (bc == 2); np = UBMPAGE (ba); /* Only one word, last possible page crossing */ if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ + uba_debug_dma_out (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, NULL);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Read 18b Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); return (bc); /* return bc */ } } - *buf++ = (uint32) ((M[pa10] >> V_WORD0) & M_RH); + *buf++ = (uint32) ((M[pa10++] >> V_WORD0) & M_RH); } -uba_debug_dma (DBG_DMA_OUT, mem_pa10, pa10); +uba_debug_dma_out (dpy_pa10, pa10); return 0; } @@ -969,7 +957,7 @@ uint32 ea, ofs, cp, np; int32 seg, ubm = 0; a10 pa10 = ~0u; d10 m; -a10 mem_pa10 = ~0u; +a10 dpy_pa10 = ~0u; if ((ba & ~((IO_M_UBA< bc) seg = bc; cp = UBMPAGE (ba); /* Only one word, can't cross page */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm); /* map addr */ + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm); /* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1024,7 +1011,7 @@ if (seg) { /* Unaligned head */ } M[pa10++] = m; if (bc == 0) { - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10-mem_pa10); + uba_debug_dma_in (dpy_pa10, pa10-dpy_pa10); return 0; } } /* Head */ @@ -1038,8 +1025,8 @@ if (seg > 0) { for ( ; seg; seg -= 4, ba += 4) { /* aligned longwords */ np = UBMPAGE (ba); if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ + uba_debug_dma_in (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1060,8 +1047,8 @@ if (bc) { assert (bc <= 3); np = UBMPAGE (ba); /* Only one word, last possible page crossing */ if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ + uba_debug_dma_in (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1098,10 +1085,10 @@ if (bc) { assert (FALSE); } } - M[pa10] = m; + M[pa10++] = m; } -uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); +uba_debug_dma_in (dpy_pa10, pa10); return 0; } @@ -1112,7 +1099,7 @@ int32 Map_WriteW (uint32 ba, int32 bc, uint16 *buf) uint32 ea, cp, np; int32 seg, ubm = 0; a10 pa10 = ~0u; -a10 mem_pa10 = ~0u; +a10 dpy_pa10 = ~0u; if ((ba & ~((IO_M_UBA< bc) seg = bc; cp = UBMPAGE (ba); /* Only one word, can't cross page */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm); /* map addr */ + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm); /* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1157,7 +1143,7 @@ if (seg) { /* Unaligned head */ pa10++; if ((bc -= seg) == 0) { - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10-mem_pa10); + uba_debug_dma_in (dpy_pa10, pa10-dpy_pa10); return 0; } ba += seg; @@ -1172,8 +1158,8 @@ if (seg > 0) { for ( ; seg; seg -= 4, ba += 4) { /* aligned longwords */ np = UBMPAGE (ba); if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ + uba_debug_dma_in (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1194,8 +1180,8 @@ if (bc) { assert (bc == 2); np = UBMPAGE (ba); /* Only one word, last possible page crossing */ if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ + uba_debug_dma_in (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1206,9 +1192,10 @@ if (bc) { M[pa10] = (((d10)(buf[0])) << V_WORD0) | (M[pa10] & M_WORD0); else M[pa10] = ((d10)(buf[0])) << V_WORD0; -} + pa10++; + } -uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); +uba_debug_dma_in (dpy_pa10, pa10); return 0; } @@ -1220,7 +1207,7 @@ int32 Map_WriteW18 (uint32 ba, int32 bc, uint32 *buf) uint32 ea, cp, np; int32 seg, ubm = 0; a10 pa10 = ~0u; -a10 mem_pa10 = ~0u; +a10 dpy_pa10 = ~0u; if ((ba & ~((IO_M_UBA< bc) seg = bc; cp = UBMPAGE (ba); /* Only one word, can't cross page */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm); /* map addr */ + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm); /* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write 18b Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1265,7 +1251,7 @@ if (seg) { /* Unaligned head */ pa10++; if ((bc -= seg) == 0) { - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10-mem_pa10); + uba_debug_dma_in (dpy_pa10, pa10-dpy_pa10); return 0; } ba += seg; @@ -1280,8 +1266,8 @@ if (seg > 0) { for ( ; seg; seg -= 4, ba += 4) { /* aligned longwords */ np = UBMPAGE (ba); if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ + uba_debug_dma_in (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) {/* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write 18b Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1300,8 +1286,8 @@ if (bc) { assert (bc == 2); np = UBMPAGE (ba); /* Only one word, last possible page crossing */ if (np != cp) { /* New (or first) page? */ - uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); - mem_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ + uba_debug_dma_in (dpy_pa10, pa10); + dpy_pa10 = pa10 = Map_Addr10 (ba, 1, &ubm);/* map addr */ if ((pa10 < 0) || MEM_ADDR_NXM (pa10)) { /* inv map or NXM? */ ubcs[1] = ubcs[1] | UBCS_TMO; /* UBA timeout */ sim_debug (DBG_DMA_NXM, &uba_dev, "Write 18b Word Error at address %12" LL_FMT "o ba=%o, bc=%o\n", pa10, ba, bc); @@ -1312,13 +1298,14 @@ if (bc) { M[pa10] = (M[pa10] & M_WORD0) | (((d10)(M_WORD18 & buf[0])) << V_WORD0); else M[pa10] = ((d10)(M_WORD18 & buf[0])) << V_WORD0; -} + pa10++; + } -uba_debug_dma (DBG_DMA_IN, mem_pa10, pa10); +uba_debug_dma_in (dpy_pa10, pa10); return 0; } -static void +void uba_debug_dma (int32 mask, a10 pa_start, a10 pa_end) { int32 i; @@ -1326,21 +1313,55 @@ int32 wc = (int32)(pa_end - pa_start); if ((!wc) || (!(sim_deb && (uba_dev.dctrl & mask)))) return; -sim_debug (mask, &uba_dev, "DMA Address: %07o of %o words\n", pa_start, wc); +sim_debug (mask, &uba_dev, "DMA Address: %07o of %o word%s\n", pa_start, wc, (wc>1) ? "s" : ""); for (i=0; i>V_WORD0), (int)((d&~M_WORD1)>>V_WORD1)); - sprintf (bytes, "%02X %02X %02X %02X", (int)((d&~M_BYTE0)>>V_BYTE0), (int)((d&~M_BYTE1)>>V_BYTE1), (int)((d&~M_BYTE2)>>V_BYTE2), (int)((d&~M_BYTE3)>>V_BYTE3)); - sim_debug (mask, &uba_dev, "%s | %s | %s\n", octal, words, bytes); + sprintf (octal, "%07o: %06o,,%06o", pa_start+i, (int)((d>>V_WORD0)&M_WORD18), + (int)((d>>V_WORD1)&M_WORD18)); + sprintf (words, "0x%05X: %04X,,%04X", pa_start+i, (int)((d>>V_WORD0)&M_WORD), + (int)((d>>V_WORD1)&M_WORD)); + sprintf (bytes, "%02X %02X %02X %02X", (int)(((d&~M_BYTE0)>>V_BYTE0)&M_BYTE), + (int)(((d&~M_BYTE1)>>V_BYTE1)&M_BYTE), + (int)(((d&~M_BYTE2)>>V_BYTE2)&M_BYTE), + (int)(((d&~M_BYTE3)>>V_BYTE3)&M_BYTE)); + strcpy (ascii, "'.....'"); + for (j=1; j<=5; j++) + { + c = 0x7F&(d>>(36-(j*7))); + if (isprint(c)) + ascii[j] = c; + } + strcpy (sixbit, "'.....'"); + for (j=1; j<=6; j++) + { + c = 0x3F&(d>>(36-(j*6))); + sixbit[j] = c + 32; + } + sim_debug (mask, &uba_dev, "%s | %s | %s | %s | %s\n", octal, words, bytes, ascii, sixbit); } } +void +uba_debug_dma_in (a10 pa_start, a10 pa_end) +{ +uba_debug_dma (DBG_DMA_IN, pa_start, pa_end); +} + +void +uba_debug_dma_out (a10 pa_start, a10 pa_end) +{ +uba_debug_dma (DBG_DMA_OUT, pa_start, pa_end); +} + /* Evaluate Unibus priority interrupts */ int32 pi_ub_eval ()