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More General cleanup migrate to using sim_printf vs separate calls to printf and fprintf(sim_log).

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This commit is contained in:
Mark Pizzolato 2014-10-24 14:37:37 -07:00
parent ebf53c9cda
commit 995ab8f1e2
23 changed files with 118 additions and 117 deletions
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2
GRI/gri_stddev.c
View file

@ -343,7 +343,7 @@ if ((hsr_unit.flags & UNIT_ATT) == 0) /* attached? */
if ((temp = getc (hsr_unit.fileref)) == EOF) { /* read char */ if ((temp = getc (hsr_unit.fileref)) == EOF) { /* read char */
if (feof (hsr_unit.fileref)) { /* err or eof? */ if (feof (hsr_unit.fileref)) { /* err or eof? */
if (hsr_stopioe) if (hsr_stopioe)
printf ("HSR end of file\n"); sim_printf ("HSR end of file\n");
else return SCPE_OK; else return SCPE_OK;
} }
else perror ("HSR I/O error"); else perror ("HSR I/O error");

4
H316/h316_dp.c
View file

@ -1002,7 +1002,7 @@ else {
if (nr <= 0) if (nr <= 0)
return SCPE_ARG; return SCPE_ARG;
} }
printf ("Proposed format: records/track = %d, record size = %d\n", nr, nw); sim_printf ("Proposed format: records/track = %d, record size = %d\n", nr, nw);
if (!get_yn ("Formatting will destroy all data on this disk; proceed? [N]", FALSE)) if (!get_yn ("Formatting will destroy all data on this disk; proceed? [N]", FALSE))
return SCPE_OK; return SCPE_OK;
for (c = cntr = 0; c < dp_tab[dp_ctype].cyl; c++) { for (c = cntr = 0; c < dp_tab[dp_ctype].cyl; c++) {
@ -1021,7 +1021,7 @@ for (c = cntr = 0; c < dp_tab[dp_ctype].cyl; c++) {
return r; return r;
} }
} }
printf ("Formatting complete\n"); sim_printf ("Formatting complete\n");
return SCPE_OK; return SCPE_OK;
} }

4
H316/h316_stddev.c
View file

@ -395,7 +395,7 @@ else {
if ((c = getc (uptr->fileref)) == EOF) { /* read byte */ if ((c = getc (uptr->fileref)) == EOF) { /* read byte */
if (feof (uptr->fileref)) { if (feof (uptr->fileref)) {
if (ptr_stopioe) if (ptr_stopioe)
printf ("PTR end of file\n"); sim_printf ("PTR end of file\n");
else return SCPE_OK; else return SCPE_OK;
} }
else perror ("PTR I/O error"); else perror ("PTR I/O error");
@ -686,7 +686,7 @@ else if ((ruptr->flags & UNIT_ATT) && /* TTR attached */
if (feof (ruptr->fileref)) { /* EOF? */ if (feof (ruptr->fileref)) { /* EOF? */
ruptr->STA &= ~RUNNING; /* stop reader */ ruptr->STA &= ~RUNNING; /* stop reader */
if (ttr_stopioe) if (ttr_stopioe)
printf ("TTR end of file\n"); sim_printf ("TTR end of file\n");
else return SCPE_OK; else return SCPE_OK;
} }
else perror ("TTR I/O error"); else perror ("TTR I/O error");

5
I1620/i1620_pt.c
View file

@ -332,8 +332,9 @@ do {
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* read char */ if ((temp = getc (ptr_unit.fileref)) == EOF) { /* read char */
ind[IN_RDCHK] = 1; /* err, rd chk */ ind[IN_RDCHK] = 1; /* err, rd chk */
if (feof (ptr_unit.fileref)) if (feof (ptr_unit.fileref))
printf ("PTR end of file\n"); sim_printf ("PTR end of file\n");
else perror ("PTR I/O error"); else
sim_printf ("PTR I/O error: %d\n", errno);
clearerr (ptr_unit.fileref); clearerr (ptr_unit.fileref);
return SCPE_IOERR; return SCPE_IOERR;
} }

2
Ibm1130/ibm1130_gui.c
View file

@ -112,7 +112,7 @@ extern UNIT prt_unit;
void stuff_cmd (char *cmd) {} void stuff_cmd (char *cmd) {}
t_bool stuff_and_wait (char *cmd, int timeout, int delay) {return FALSE;} t_bool stuff_and_wait (char *cmd, int timeout, int delay) {return FALSE;}
char *read_cmdline (char *ptr, int size, FILE *stream) {return read_line(ptr, size, stream);} char *read_cmdline (char *ptr, int size, FILE *stream) {return read_line(ptr, size, stream);}
void remark_cmd (char *remark) sim_printf("%s\n", remark) void remark_cmd (char *remark) {sim_printf("%s\n", remark);}
#else #else
t_stat console_reset (DEVICE *dptr) t_stat console_reset (DEVICE *dptr)

12
PDP1/pdp1_dt.c
View file

@ -1011,13 +1011,13 @@ if (uptr->filebuf == NULL) { /* can't alloc? */
return SCPE_MEM; return SCPE_MEM;
} }
fbuf = (uint32 *) uptr->filebuf; /* file buffer */ fbuf = (uint32 *) uptr->filebuf; /* file buffer */
printf ("%s%d: ", sim_dname (&dt_dev), u); sim_printf ("%s%d: ", sim_dname (&dt_dev), u);
if (uptr->flags & UNIT_8FMT) if (uptr->flags & UNIT_8FMT)
printf ("12b format"); sim_printf ("12b format");
else if (uptr->flags & UNIT_11FMT) else if (uptr->flags & UNIT_11FMT)
printf ("16b format"); sim_printf ("16b format");
else printf ("18b/36b format"); else sim_printf ("18b/36b format");
printf (", buffering file in memory\n"); sim_printf (", buffering file in memory\n");
if (uptr->flags & UNIT_8FMT) { /* 12b? */ if (uptr->flags & UNIT_8FMT) { /* 12b? */
for (ba = 0; ba < uptr->capac; ) { /* loop thru file */ for (ba = 0; ba < uptr->capac; ) { /* loop thru file */
k = fxread (pdp8b, sizeof (uint16), D8_NBSIZE, uptr->fileref); k = fxread (pdp8b, sizeof (uint16), D8_NBSIZE, uptr->fileref);
@ -1083,7 +1083,7 @@ if (sim_is_active (uptr)) {
} }
fbuf = (uint32 *) uptr->filebuf; /* file buffer */ fbuf = (uint32 *) uptr->filebuf; /* file buffer */
if (uptr->hwmark && ((uptr->flags & UNIT_RO) == 0)) { /* any data? */ if (uptr->hwmark && ((uptr->flags & UNIT_RO) == 0)) { /* any data? */
printf ("%s%d: writing buffer to file\n", sim_dname (&dt_dev), u); sim_printf ("%s%d: writing buffer to file\n", sim_dname (&dt_dev), u);
rewind (uptr->fileref); /* start of file */ rewind (uptr->fileref); /* start of file */
if (uptr->flags & UNIT_8FMT) { /* 12b? */ if (uptr->flags & UNIT_8FMT) { /* 12b? */
for (ba = 0; ba < uptr->hwmark; ) { /* loop thru file */ for (ba = 0; ba < uptr->hwmark; ) { /* loop thru file */

2
PDP1/pdp1_stddev.c
View file

@ -343,7 +343,7 @@ if (temp == EOF) { /* end of file? */
ptr_wait = ioh = 0; ptr_wait = ioh = 0;
if (feof (uptr->fileref)) { if (feof (uptr->fileref)) {
if ((cpls & CPLS_PTR) || ptr_stopioe) if ((cpls & CPLS_PTR) || ptr_stopioe)
printf ("PTR end of file\n"); sim_printf ("PTR end of file\n");
else return SCPE_OK; else return SCPE_OK;
} }
else perror ("PTR I/O error"); else perror ("PTR I/O error");

2
PDP10/pdp10_mdfp.c
View file

@ -756,7 +756,7 @@ static int32 normtab[7] = { 1, 2, 4, 8, 16, 32, 63 };
extern a10 pager_PC; extern a10 pager_PC;
if (a->fhi & FP_UCRY) { /* carry set? */ if (a->fhi & FP_UCRY) { /* carry set? */
printf ("%%PDP-10 FP: carry bit set at normalization, PC = %o\n", pager_PC); sim_printf ("%%PDP-10 FP: carry bit set at normalization, PC = %o\n", pager_PC);
a->flo = (a->flo >> 1) | ((a->fhi & 1) << 63); /* try to recover */ a->flo = (a->flo >> 1) | ((a->fhi & 1) << 63); /* try to recover */
a->fhi = a->fhi >> 1; /* but root cause */ a->fhi = a->fhi >> 1; /* but root cause */
a->exp = a->exp + 1; /* should be fixed! */ a->exp = a->exp + 1; /* should be fixed! */

4
PDP8/pdp8_pt.c
View file

@ -164,10 +164,10 @@ if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
if ((temp = getc (ptr_unit.fileref)) == EOF) { if ((temp = getc (ptr_unit.fileref)) == EOF) {
if (feof (ptr_unit.fileref)) { if (feof (ptr_unit.fileref)) {
if (ptr_stopioe) if (ptr_stopioe)
printf ("PTR end of file\n"); sim_printf ("PTR end of file\n");
else return SCPE_OK; else return SCPE_OK;
} }
else perror ("PTR I/O error"); else sim_printf ("PTR I/O error: %d\n", errno);
clearerr (ptr_unit.fileref); clearerr (ptr_unit.fileref);
return SCPE_IOERR; return SCPE_IOERR;
} }

12
PDP8/pdp8_td.c
View file

@ -799,13 +799,13 @@ if (uptr->filebuf == NULL) { /* can't alloc? */
return SCPE_MEM; return SCPE_MEM;
} }
fbuf = (uint16 *) uptr->filebuf; /* file buffer */ fbuf = (uint16 *) uptr->filebuf; /* file buffer */
printf ("%s%d: ", sim_dname (&td_dev), u); sim_printf ("%s%d: ", sim_dname (&td_dev), u);
if (uptr->flags & UNIT_8FMT) if (uptr->flags & UNIT_8FMT)
printf ("12b format"); sim_printf ("12b format");
else if (uptr->flags & UNIT_11FMT) else if (uptr->flags & UNIT_11FMT)
printf ("16b format"); sim_printf ("16b format");
else printf ("18b/36b format"); else sim_printf ("18b/36b format");
printf (", buffering file in memory\n"); sim_printf (", buffering file in memory\n");
uptr->io_flush = td_flush; uptr->io_flush = td_flush;
if (uptr->flags & UNIT_8FMT) /* 12b? */ if (uptr->flags & UNIT_8FMT) /* 12b? */
uptr->hwmark = fxread (uptr->filebuf, sizeof (uint16), uptr->hwmark = fxread (uptr->filebuf, sizeof (uint16),
@ -905,7 +905,7 @@ int u = (int)(uptr - td_dev.units);
if (!(uptr->flags & UNIT_ATT)) if (!(uptr->flags & UNIT_ATT))
return SCPE_OK; return SCPE_OK;
if (uptr->hwmark && ((uptr->flags & UNIT_RO)== 0)) { /* any data? */ if (uptr->hwmark && ((uptr->flags & UNIT_RO)== 0)) { /* any data? */
printf ("%s%d: writing buffer to file\n", sim_dname (&td_dev), u); sim_printf ("%s%d: writing buffer to file\n", sim_dname (&td_dev), u);
td_flush (uptr); td_flush (uptr);
} /* end if hwmark */ } /* end if hwmark */
free (uptr->filebuf); /* release buf */ free (uptr->filebuf); /* release buf */

38
PDQ-3/pdq3_cpu.c
View file

@ -236,7 +236,7 @@ static void AdjustRefCount(uint8 segno, int incr) {
uint16 sib = GetSIB(segno); uint16 sib = GetSIB(segno);
uint16 ref = Get(sib + OFF_SEGREFS); uint16 ref = Get(sib + OFF_SEGREFS);
Put(sib + OFF_SEGREFS, ref + incr); Put(sib + OFF_SEGREFS, ref + incr);
//printf("ref(%x) %s = %d\n",segno,incr>0 ? "increment":"decrement", ref+incr); //sim_printf("ref(%x) %s = %d\n",segno,incr>0 ? "increment":"decrement", ref+incr);
} }
/* save CPU regs into TIB */ /* save CPU regs into TIB */
@ -310,13 +310,13 @@ static t_stat rom_ignore(t_addr ea, uint16 data) {
t_stat cpu_boot(int32 unitnum, DEVICE *dptr) { t_stat cpu_boot(int32 unitnum, DEVICE *dptr) {
t_stat rc; t_stat rc;
uint16 ctp, ssv, rq; uint16 ctp, ssv, rq;
printf("BOOT CPU\n"); sim_printf("BOOT CPU\n");
cpu_reset(dptr); cpu_reset(dptr);
dbg_init(); dbg_init();
/* boot from external ROM? */ /* boot from external ROM? */
if (reg_fc68 != 0) { if (reg_fc68 != 0) {
// printf("Booting from HDT ROM\n"); // sim_printf("Booting from HDT ROM\n");
/* cf. WD9593_PasIII_OSRef_Jul82.pdf */ /* cf. WD9593_PasIII_OSRef_Jul82.pdf */
Read(reg_fc68, 0, &ctp, DBG_NONE); Read(reg_fc68, 0, &ctp, DBG_NONE);
Read(reg_fc68, 1, &ssv, DBG_NONE); Read(reg_fc68, 1, &ssv, DBG_NONE);
@ -343,7 +343,7 @@ void cpu_finishAutoload() {
/* CPU reset */ /* CPU reset */
t_stat cpu_reset (DEVICE *dptr) { t_stat cpu_reset (DEVICE *dptr) {
printf("CPU RESET\n"); sim_printf("CPU RESET\n");
sim_brk_types = SWMASK('E')|SWMASK('R')|SWMASK('W'); sim_brk_types = SWMASK('E')|SWMASK('R')|SWMASK('W');
sim_brk_dflt = SWMASK('E'); sim_brk_dflt = SWMASK('E');
@ -368,10 +368,10 @@ t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw) {
if (seg==0) seg = NIL; if (seg==0) seg = NIL;
addr = MAKE_BADDR(seg,off); addr = MAKE_BADDR(seg,off);
// printf("Examine: addr=%x seg=%x off=%x\n",addr,seg,off); // sim_printf("Examine: addr=%x seg=%x off=%x\n",addr,seg,off);
// printf("sw=%x, isword=%d\n",sw, ADDR_ISWORD(addr)); // sim_printf("sw=%x, isword=%d\n",sw, ADDR_ISWORD(addr));
if (ADDR_ISWORD(addr) || (sw & SWMASK('W'))) { if (ADDR_ISWORD(addr) || (sw & SWMASK('W'))) {
// printf("addr=%x seg=%x off=%x\n",addr,seg,off); // sim_printf("addr=%x seg=%x off=%x\n",addr,seg,off);
if (off >= memorysize || if (off >= memorysize ||
ReadEx(off, 0, &data) != SCPE_OK) return SCPE_IOERR; ReadEx(off, 0, &data) != SCPE_OK) return SCPE_IOERR;
} else if (!ADDR_ISWORD(addr) || (sw & SWMASK('B'))) { } else if (!ADDR_ISWORD(addr) || (sw & SWMASK('B'))) {
@ -427,7 +427,7 @@ static t_stat ssr_write(t_addr ioaddr, uint16 data) {
sim_debug(DBG_CPU_INT2, &cpu_dev, DBG_PCFORMAT1 "Acknowledge INTVL\n", DBG_PC); sim_debug(DBG_CPU_INT2, &cpu_dev, DBG_PCFORMAT1 "Acknowledge INTVL\n", DBG_PC);
} }
if (isbitset(data,SSR_BIT3)) if (isbitset(data,SSR_BIT3))
printf("Warning: Attempt to set SSR bit 3\n"); sim_printf("Warning: Attempt to set SSR bit 3\n");
if (isbitset(data,SSR_PWRF)) { if (isbitset(data,SSR_PWRF)) {
clrbit(reg_ssr,SSR_PWRF); clrbit(reg_ssr,SSR_PWRF);
sim_debug(DBG_CPU_INT2, &cpu_dev, DBG_PCFORMAT1 "Acknowledge PWRF\n", DBG_PC); sim_debug(DBG_CPU_INT2, &cpu_dev, DBG_PCFORMAT1 "Acknowledge PWRF\n", DBG_PC);
@ -449,7 +449,7 @@ static t_stat ssr_write(t_addr ioaddr, uint16 data) {
static t_stat ses_read(t_addr ioaddr, uint16 *data) static t_stat ses_read(t_addr ioaddr, uint16 *data)
{ {
*data = reg_ses; *data = reg_ses;
// printf("ses is %x\n",reg_ses); // sim_printf("ses is %x\n",reg_ses);
return SCPE_OK; return SCPE_OK;
} }
@ -497,7 +497,7 @@ void cpu_assertInt(int level, t_bool tf) {
t_stat cpu_raiseInt(int level) { t_stat cpu_raiseInt(int level) {
if (level > 15) { if (level > 15) {
printf("Implementation error: raiseInt with level>15! Need fix\n"); sim_printf("Implementation error: raiseInt with level>15! Need fix\n");
exit(1); exit(1);
} }
@ -661,14 +661,14 @@ static float PopF() {
T_FLCVT t; T_FLCVT t;
t.i[1] = Pop(); t.i[1] = Pop();
t.i[0] = Pop(); t.i[0] = Pop();
// printf("POPF: %.6e\n",t.f); // sim_printf("POPF: %.6e\n",t.f);
return t.f; return t.f;
}; };
static void PushF(float f) { static void PushF(float f) {
T_FLCVT t; T_FLCVT t;
t.f = f; t.f = f;
// printf("PUSHF: %.6e\n",t.f); // sim_printf("PUSHF: %.6e\n",t.f);
Push(t.i[0]); Push(t.i[0]);
Push(t.i[1]); Push(t.i[1]);
} }
@ -703,11 +703,11 @@ static void DoCXG(uint8 segno, uint8 procno) {
uint8 osegno = (uint8)GetSegno(); /* obtain segment of caller to be set into MSCW */ uint8 osegno = (uint8)GetSegno(); /* obtain segment of caller to be set into MSCW */
uint16 osegb = reg_segb; uint16 osegb = reg_segb;
// printf("CXG: seg=%d proc=%d, osegno=%d\n",segno,procno,osegno); // sim_printf("CXG: seg=%d proc=%d, osegno=%d\n",segno,procno,osegno);
ptbl = SetSEGB(segno); /* get ptbl of new segment */ ptbl = SetSEGB(segno); /* get ptbl of new segment */
AdjustRefCount(segno,1); AdjustRefCount(segno,1);
// printf("CXG: ptbl=%x, reg_segb=%x\n",ptbl,reg_segb); // sim_printf("CXG: ptbl=%x, reg_segb=%x\n",ptbl,reg_segb);
reg_ipc = createMSCW(ptbl, procno, reg_bp, osegno, osegb); /* call new segment */ reg_ipc = createMSCW(ptbl, procno, reg_bp, osegno, osegb); /* call new segment */
sim_interval -= 63; /* actually 63.2 */ sim_interval -= 63; /* actually 63.2 */
} }
@ -744,10 +744,10 @@ static uint16 createMSCW(uint16 ptbl, uint8 procno, uint16 stat, uint8 segno, ui
uint16 procstart = Get(ptbl - procno); /* word index into segment */ uint16 procstart = Get(ptbl - procno); /* word index into segment */
uint16 datasz = Get(reg_segb + procstart); /* word index */ uint16 datasz = Get(reg_segb + procstart); /* word index */
dbg_segtrack(reg_segb); dbg_segtrack(reg_segb);
// printf("createMSCW: ptbl=%x procno=%d stat=%x segno=%x\n",ptbl,procno,stat,segno); // sim_printf("createMSCW: ptbl=%x procno=%d stat=%x segno=%x\n",ptbl,procno,stat,segno);
if (reg_sp < reg_splow || (datasz+MSCW_SZ) > (reg_sp-reg_splow)) { /* verify enough space on stack */ if (reg_sp < reg_splow || (datasz+MSCW_SZ) > (reg_sp-reg_splow)) { /* verify enough space on stack */
// printf("Stk overflow in mscw: sp=%x spl=%x ds=%d dsm=%d sp-spl=%d\n",reg_sp,reg_splow,datasz,datasz+MSCW_SZ, reg_sp-reg_splow); // sim_printf("Stk overflow in mscw: sp=%x spl=%x ds=%d dsm=%d sp-spl=%d\n",reg_sp,reg_splow,datasz,datasz+MSCW_SZ, reg_sp-reg_splow);
Raise(PASERROR_STKOVFL); return reg_ipc; Raise(PASERROR_STKOVFL); return reg_ipc;
} }
reg_sp = reg_sp - MSCW_SZ - datasz; /* allocate space on stack for local data and MSCW */ reg_sp = reg_sp - MSCW_SZ - datasz; /* allocate space on stack for local data and MSCW */
@ -1626,10 +1626,10 @@ static t_stat DoInstr(void) {
} else if (w == -2) { } else if (w == -2) {
reg_ssv = t1; reg_ssv = t1;
} else if (w == -1) { } else if (w == -1) {
// printf("SPR Taskswitch reg_ctp=%x\n",t1); // sim_printf("SPR Taskswitch reg_ctp=%x\n",t1);
reg_rq = t1; reg_rq = t1;
taskswitch5(); taskswitch5();
// printf("SPR Taskswitch done reg_ctp=%x reg_rq=%x\n",reg_ctp,reg_rq); // sim_printf("SPR Taskswitch done reg_ctp=%x reg_rq=%x\n",reg_ctp,reg_rq);
cyc = 53.2; cyc = 53.2;
break; /* mustn't fall through reg_sp +=2 */ break; /* mustn't fall through reg_sp +=2 */
} else if (w >= 1) { } else if (w >= 1) {
@ -1726,7 +1726,7 @@ t_stat sim_instr(void)
reg_intpending |= reg_intlatch; reg_intpending |= reg_intlatch;
if (reg_intpending) { if (reg_intpending) {
if ((rc = cpu_processInt()) != SCPE_OK) { if ((rc = cpu_processInt()) != SCPE_OK) {
printf("processint returns %d\n",rc); fflush(stdout); sim_printf("processint returns %d\n",rc); fflush(stdout);
break; break;
} }
} }

2
PDQ-3/pdq3_debug.c
View file

@ -197,7 +197,7 @@ t_stat dbg_dump_segtbl(FILE* fd) {
t_stat rc; t_stat rc;
if (reg_ssv < 0x2030 || reg_ssv > 0xf000) { if (reg_ssv < 0x2030 || reg_ssv > 0xf000) {
printf("Cannot list segments in bootloader: incomplete tables\n"); sim_printf("Cannot list segments in bootloader: incomplete tables\n");
return SCPE_NXM; return SCPE_NXM;
} }

44
PDQ-3/pdq3_fdc.c
View file

@ -267,7 +267,7 @@ DEVICE fdc_dev = {
t_stat fdc_boot(int32 unitnum, DEVICE *dptr) { t_stat fdc_boot(int32 unitnum, DEVICE *dptr) {
if (unitnum < 0 || (uint32)unitnum > dptr->numunits) if (unitnum < 0 || (uint32)unitnum > dptr->numunits)
return SCPE_NXUN; return SCPE_NXUN;
// printf("BOOT FDC%d\n",unitnum); // sim_printf("BOOT FDC%d\n",unitnum);
return fdc_autoload(unitnum); return fdc_autoload(unitnum);
} }
@ -288,14 +288,14 @@ t_stat fdc_attach(UNIT *uptr, char *cptr) {
if (uptr->capac > 0) { if (uptr->capac > 0) {
fgets(header, 4, uptr->fileref); fgets(header, 4, uptr->fileref);
if (strncmp(header, "IMD", 3) != 0) { if (strncmp(header, "IMD", 3) != 0) {
printf("FDC: Only IMD disk images are supported\n"); sim_printf("FDC: Only IMD disk images are supported\n");
fdc_drv[i].dr_unit = NULL; fdc_drv[i].dr_unit = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
} else { } else {
/* create a disk image file in IMD format. */ /* create a disk image file in IMD format. */
if (pdq3_diskCreate(uptr->fileref, "SIMH pdq3_fdc created") != SCPE_OK) { if (pdq3_diskCreate(uptr->fileref, "SIMH pdq3_fdc created") != SCPE_OK) {
printf("FDC: Failed to create IMD disk.\n"); sim_printf("FDC: Failed to create IMD disk.\n");
fdc_drv[i].dr_unit = NULL; fdc_drv[i].dr_unit = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -305,7 +305,7 @@ t_stat fdc_attach(UNIT *uptr, char *cptr) {
DBG_PC, cptr, uptr->capac); DBG_PC, cptr, uptr->capac);
fdc_drv[i].dr_imd = diskOpenEx(uptr->fileref, isbitset(uptr->flags,UNIT_FDC_VERBOSE), &fdc_dev, DBG_FD_IMD, DBG_FD_IMD2); fdc_drv[i].dr_imd = diskOpenEx(uptr->fileref, isbitset(uptr->flags,UNIT_FDC_VERBOSE), &fdc_dev, DBG_FD_IMD, DBG_FD_IMD2);
if (fdc_drv[i].dr_imd == NULL) { if (fdc_drv[i].dr_imd == NULL) {
printf("FDC: IMD disk corrupt.\n"); sim_printf("FDC: IMD disk corrupt.\n");
fdc_drv[i].dr_unit = NULL; fdc_drv[i].dr_unit = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -476,11 +476,11 @@ static t_bool dma_transfer_to_ram(uint8 *buf, int bufsize) {
} }
if (isbitclr(reg_dma_ctrl,DMA_CTRL_IOM)) if (isbitclr(reg_dma_ctrl,DMA_CTRL_IOM))
printf("Warning: wrong IOM direction for DMA transfer to RAM\n"); sim_printf("Warning: wrong IOM direction for DMA transfer to RAM\n");
for (i=0; i<bufsize; i++) { for (i=0; i<bufsize; i++) {
data = buf[i]; data = buf[i];
// printf("addr=%04x data=%02x\n",_reg_dma_addr, data); // sim_printf("addr=%04x data=%02x\n",_reg_dma_addr, data);
if (WriteB(0, _reg_dma_addr++, data, FALSE) != SCPE_OK) { if (WriteB(0, _reg_dma_addr++, data, FALSE) != SCPE_OK) {
(void)dma_abort(FALSE); (void)dma_abort(FALSE);
@ -514,7 +514,7 @@ static t_bool dma_transfer_from_ram(uint8 *buf, int bufsize) {
DBG_PC, _reg_dma_addr/2, (_reg_dma_addr + xfersz - 1)/2); DBG_PC, _reg_dma_addr/2, (_reg_dma_addr + xfersz - 1)/2);
if (isbitset(reg_dma_ctrl,DMA_CTRL_IOM)) if (isbitset(reg_dma_ctrl,DMA_CTRL_IOM))
printf("Warning: wrong IOM direction for DMA transfer from RAM\n"); sim_printf("Warning: wrong IOM direction for DMA transfer from RAM\n");
for (i=0; i<bufsize; i++) { for (i=0; i<bufsize; i++) {
if (ReadB(0, _reg_dma_addr++, &data, FALSE)) { if (ReadB(0, _reg_dma_addr++, &data, FALSE)) {
@ -737,7 +737,7 @@ t_stat fdc_svc(UNIT *uptr) {
return fdc_restartmulti(curdrv,FDC_WAIT_WRITENEXT); return fdc_restartmulti(curdrv,FDC_WAIT_WRITENEXT);
break; break;
default: default:
printf("fdc_svc: Fix me - command not yet implemented: cmd=0x%x\n", reg_fdc_cmd); sim_printf("fdc_svc: Fix me - command not yet implemented: cmd=0x%x\n", reg_fdc_cmd);
} }
clrbit(reg_fdc_status,FDC_ST1_BUSY); clrbit(reg_fdc_status,FDC_ST1_BUSY);
@ -773,7 +773,7 @@ t_stat fdc_binit() {
t_stat fdc_reset (DEVICE *dptr) { t_stat fdc_reset (DEVICE *dptr) {
int i; int i;
DEVCTXT* ctxt = (DEVCTXT*)dptr->ctxt; DEVCTXT* ctxt = (DEVCTXT*)dptr->ctxt;
// printf("RESET FDC\n"); // sim_printf("RESET FDC\n");
if (dptr->flags & DEV_DIS) if (dptr->flags & DEV_DIS)
del_ioh(ctxt->ioi); del_ioh(ctxt->ioi);
@ -904,7 +904,7 @@ static t_stat fdc_docmd(uint16 data) {
/* type III commands */ /* type III commands */
default: default:
printf("fdc_docmd: Fix me - command not yet implemented: cmd=0x%x\n", reg_fdc_cmd); sim_printf("fdc_docmd: Fix me - command not yet implemented: cmd=0x%x\n", reg_fdc_cmd);
setbit(reg_fdc_status, FDC_ST2_BUSY); setbit(reg_fdc_status, FDC_ST2_BUSY);
return SCPE_NOFNC; return SCPE_NOFNC;
@ -991,7 +991,7 @@ t_stat fdc_write(t_addr ioaddr, uint16 data) {
break; break;
case 9: /* dma status */ case 9: /* dma status */
if (isbitset(reg_dma_status,DMA_ST_BUSY)) if (isbitset(reg_dma_status,DMA_ST_BUSY))
printf("Warning: DMA: write status while BUSY\n"); sim_printf("Warning: DMA: write status while BUSY\n");
reg_dma_status = data & 0x8f; reg_dma_status = data & 0x8f;
break; break;
case 0x0a: /* count low */ case 0x0a: /* count low */
@ -1088,7 +1088,7 @@ t_stat pdq3_diskCreate(FILE *fileref, char *ctlr_comment) {
} }
if(sim_fsize(fileref) != 0) { if(sim_fsize(fileref) != 0) {
printf("PDQ3_IMD: Disk image already has data, do you want to overwrite it? "); sim_printf("PDQ3_IMD: Disk image already has data, do you want to overwrite it? ");
answer = getchar(); answer = getchar();
if((answer != 'y') && (answer != 'Y')) { if((answer != 'y') && (answer != 'Y')) {
@ -1097,15 +1097,15 @@ t_stat pdq3_diskCreate(FILE *fileref, char *ctlr_comment) {
} }
if((curptr = comment = calloc(1, MAX_COMMENT_LEN)) == 0) { if((curptr = comment = calloc(1, MAX_COMMENT_LEN)) == 0) {
printf("PDQ3_IMD: Memory allocation failure.\n"); sim_printf("PDQ3_IMD: Memory allocation failure.\n");
return (SCPE_MEM); return (SCPE_MEM);
} }
printf("PDQ3_IMD: Enter a comment for this disk.\n" sim_printf("PDQ3_IMD: Enter a comment for this disk.\n"
"PDQ3_IMD: Terminate with a '.' on an otherwise blank line.\n"); "PDQ3_IMD: Terminate with a '.' on an otherwise blank line.\n");
remaining = MAX_COMMENT_LEN; remaining = MAX_COMMENT_LEN;
do { do {
printf("IMD> "); sim_printf("IMD> ");
fgets(curptr, remaining - 3, stdin); fgets(curptr, remaining - 3, stdin);
if (strcmp(curptr, ".\n") == 0) { if (strcmp(curptr, ".\n") == 0) {
remaining = 0; remaining = 0;
@ -1135,12 +1135,12 @@ t_stat pdq3_diskCreate(FILE *fileref, char *ctlr_comment) {
fflush(fileref); fflush(fileref);
if((myDisk = diskOpen(fileref, 0)) == NULL) { if((myDisk = diskOpen(fileref, 0)) == NULL) {
printf("PDQ3_IMD: Error opening disk for format.\n"); sim_printf("PDQ3_IMD: Error opening disk for format.\n");
return(SCPE_OPENERR); return(SCPE_OPENERR);
} }
if(pdq3_diskFormat(myDisk) != SCPE_OK) { if(pdq3_diskFormat(myDisk) != SCPE_OK) {
printf("PDQ3_IMD: error formatting disk.\n"); sim_printf("PDQ3_IMD: error formatting disk.\n");
} }
return diskClose(&myDisk); return diskClose(&myDisk);
@ -1151,25 +1151,25 @@ t_stat pdq3_diskFormat(DISK_INFO *myDisk) {
uint8 sector_map[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}; uint8 sector_map[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26};
uint32 flags; uint32 flags;
printf("PDQ3_IMD: Formatting disk in PDQ3 format.\n"); sim_printf("PDQ3_IMD: Formatting disk in PDQ3 format.\n");
/* format first track as 26 sectors with 128 bytes */ /* format first track as 26 sectors with 128 bytes */
if((trackWrite(myDisk, 0, 0, 26, 128, sector_map, IMD_MODE_500K_FM, 0xE5, &flags)) != 0) { if((trackWrite(myDisk, 0, 0, 26, 128, sector_map, IMD_MODE_500K_FM, 0xE5, &flags)) != 0) {
printf("PDQ3_IMD: Error formatting track %d\n", i); sim_printf("PDQ3_IMD: Error formatting track %d\n", i);
return SCPE_IOERR; return SCPE_IOERR;
} }
putchar('.'); sim_printf(".");
/* format the remaining tracks as 26 sectors with 256 bytes */ /* format the remaining tracks as 26 sectors with 256 bytes */
for(i=1;i<77;i++) { for(i=1;i<77;i++) {
if((trackWrite(myDisk, i, 0, 26, 256, sector_map, IMD_MODE_500K_MFM, 0xE5, &flags)) != 0) { if((trackWrite(myDisk, i, 0, 26, 256, sector_map, IMD_MODE_500K_MFM, 0xE5, &flags)) != 0) {
printf("PDQ3_IMD: Error formatting track %d\n", i); sim_printf("PDQ3_IMD: Error formatting track %d\n", i);
return SCPE_IOERR; return SCPE_IOERR;
} else { } else {
putchar('.'); putchar('.');
} }
} }
printf("\nPDQ3_IMD: Format Complete.\n"); sim_printf("\nPDQ3_IMD: Format Complete.\n");
return SCPE_OK; return SCPE_OK;
} }

6
SAGE/i8251.c
View file

@ -60,7 +60,7 @@ t_stat i8251_write(I8251* chip,int port,uint32 value)
TRACE_PRINT1(DBG_UART_WR,"WR DATA = 0x%02x",chip->obuf); TRACE_PRINT1(DBG_UART_WR,"WR DATA = 0x%02x",chip->obuf);
if (chip->init==3) { /* is fully initialized */ if (chip->init==3) { /* is fully initialized */
if ((chip->mode & I8251_MODE_BAUD)==I8251_MODE_SYNC) { if ((chip->mode & I8251_MODE_BAUD)==I8251_MODE_SYNC) {
printf("i8251: sync mode not implemented\n"); sim_printf("i8251: sync mode not implemented\n");
return STOP_IMPL; return STOP_IMPL;
} }
if (chip->cmd & I8251_CMD_TXEN) { if (chip->cmd & I8251_CMD_TXEN) {
@ -93,7 +93,7 @@ t_stat i8251_write(I8251* chip,int port,uint32 value)
chip->cmd = value; chip->cmd = value;
TRACE_PRINT1(DBG_UART_WR,"WR CMD = 0x%02x",value); TRACE_PRINT1(DBG_UART_WR,"WR CMD = 0x%02x",value);
if (value & I8251_CMD_EH) { if (value & I8251_CMD_EH) {
printf("i8251: hunt mode not implemented\n"); sim_printf("i8251: hunt mode not implemented\n");
return STOP_IMPL; return STOP_IMPL;
} }
if (value & I8251_CMD_IR) if (value & I8251_CMD_IR)
@ -101,7 +101,7 @@ t_stat i8251_write(I8251* chip,int port,uint32 value)
if (value & I8251_CMD_ER) if (value & I8251_CMD_ER)
chip->status &= ~(I8251_ST_FE|I8251_ST_OE|I8251_ST_PE); chip->status &= ~(I8251_ST_FE|I8251_ST_OE|I8251_ST_PE);
if (value & I8251_CMD_SBRK) if (value & I8251_CMD_SBRK)
printf("i8251: BREAK sent\n"); sim_printf("i8251: BREAK sent\n");
if (value & I8251_CMD_RXE) { if (value & I8251_CMD_RXE) {
sim_activate(chip->in,chip->in->wait); sim_activate(chip->in,chip->in->wait);
} else { } else {

2
SAGE/i8255.c
View file

@ -32,7 +32,7 @@
static t_stat i8255_error(const char* err) static t_stat i8255_error(const char* err)
{ {
printf("I8255: Missing method '%s'\n",err); sim_printf("I8255: Missing method '%s'\n",err);
return STOP_IMPL; return STOP_IMPL;
} }

14
SAGE/i8259.c
View file

@ -64,7 +64,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
switch (chip->state) { switch (chip->state) {
default: default:
case 0: /* after reset */ case 0: /* after reset */
printf("PIC: write addr=1 without initialization\n"); sim_printf("PIC: write addr=1 without initialization\n");
return SCPE_IOERR; return SCPE_IOERR;
case 1: /* expect ICW2 */ case 1: /* expect ICW2 */
TRACE_PRINT2(DBG_PIC_WR,"WR ICW2: addr=%d data=0x%x",addr,value); TRACE_PRINT2(DBG_PIC_WR,"WR ICW2: addr=%d data=0x%x",addr,value);
@ -73,7 +73,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
chip->state = (chip->icw1 & I8259_ICW1_IC4) ? 4 : 5; chip->state = (chip->icw1 & I8259_ICW1_IC4) ? 4 : 5;
} else { } else {
/* attempt to program cascade mode */ /* attempt to program cascade mode */
printf("PIC: attempt to program chip for cascade mode - not wired for this!\n"); sim_printf("PIC: attempt to program chip for cascade mode - not wired for this!\n");
chip->state = 0; chip->state = 0;
return SCPE_IOERR; return SCPE_IOERR;
} }
@ -82,15 +82,15 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
TRACE_PRINT2(DBG_PIC_WR,"WR ICW4 addr=%d data=0x%x",addr,value); TRACE_PRINT2(DBG_PIC_WR,"WR ICW4 addr=%d data=0x%x",addr,value);
chip->icw4 = value; chip->icw4 = value;
if (chip->icw4 & I8259_ICW4_AEOI) { if (chip->icw4 & I8259_ICW4_AEOI) {
printf("PIC: attempt to program chip for AEOI mode - not wired for this!\n"); sim_printf("PIC: attempt to program chip for AEOI mode - not wired for this!\n");
return SCPE_IOERR; return SCPE_IOERR;
} }
if (chip->icw4 & I8259_ICW4_BUF) { if (chip->icw4 & I8259_ICW4_BUF) {
printf("PIC: attempt to program chip for buffered mode - not wired for this!\n"); sim_printf("PIC: attempt to program chip for buffered mode - not wired for this!\n");
return SCPE_IOERR; return SCPE_IOERR;
} }
if (chip->icw4 & I8259_ICW4_SFNM) { if (chip->icw4 & I8259_ICW4_SFNM) {
printf("PIC: attempt to program chip for spc nested mode - not wired for this!\n"); sim_printf("PIC: attempt to program chip for spc nested mode - not wired for this!\n");
return SCPE_IOERR; return SCPE_IOERR;
} }
chip->state = 5; chip->state = 5;
@ -115,7 +115,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
if (value & I8259_OCW3) { /* ocw3 */ if (value & I8259_OCW3) { /* ocw3 */
TRACE_PRINT2(DBG_PIC_WR,"WR OCW3 addr=%d data=0x%x",addr,value); TRACE_PRINT2(DBG_PIC_WR,"WR OCW3 addr=%d data=0x%x",addr,value);
if (value & I8259_OCW3_ESMM) { if (value & I8259_OCW3_ESMM) {
printf("PIC: ESMM not yet supported\n"); sim_printf("PIC: ESMM not yet supported\n");
return STOP_IMPL; return STOP_IMPL;
} }
if (value & I8259_OCW3_POLL) { if (value & I8259_OCW3_POLL) {
@ -148,7 +148,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
break; break;
case 0x80: /* rotate in autoeoi (set) */ case 0x80: /* rotate in autoeoi (set) */
case 0x00: /* rotate in autoeoi (clear) */ case 0x00: /* rotate in autoeoi (clear) */
printf("PIC: AEOI not supported\n"); sim_printf("PIC: AEOI not supported\n");
return SCPE_IOERR; return SCPE_IOERR;
case 0xc0: /* set prio */ case 0xc0: /* set prio */
chip->prio = value & 7; chip->prio = value & 7;

26
SAGE/i8272.c
View file

@ -230,14 +230,14 @@ t_stat i8272_attach(UNIT *uptr, char *cptr)
if(uptr->capac > 0) { if(uptr->capac > 0) {
fgets(header, 4, uptr->fileref); fgets(header, 4, uptr->fileref);
if(strncmp(header, "IMD", 3)) { if(strncmp(header, "IMD", 3)) {
printf("I8272: Only IMD disk images are supported\n"); sim_printf("I8272: Only IMD disk images are supported\n");
chip->drive[i].uptr = NULL; chip->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
} else { } else {
/* create a disk image file in IMD format. */ /* create a disk image file in IMD format. */
if (diskCreate(uptr->fileref, "$Id: i8272.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) { if (diskCreate(uptr->fileref, "$Id: i8272.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) {
printf("I8272: Failed to create IMD disk.\n"); sim_printf("I8272: Failed to create IMD disk.\n");
chip->drive[i].uptr = NULL; chip->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -247,19 +247,19 @@ t_stat i8272_attach(UNIT *uptr, char *cptr)
uptr->u3 = IMAGE_TYPE_IMD; uptr->u3 = IMAGE_TYPE_IMD;
if (uptr->flags & UNIT_I8272_VERBOSE) { if (uptr->flags & UNIT_I8272_VERBOSE) {
printf("I8272%d: attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("I8272%d: attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
} }
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if (uptr->flags & UNIT_I8272_VERBOSE) if (uptr->flags & UNIT_I8272_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
chip->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_I8272_VERBOSE, dptr, DBG_FD_IMD, 0); chip->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_I8272_VERBOSE, dptr, DBG_FD_IMD, 0);
if (uptr->flags & UNIT_I8272_VERBOSE) if (uptr->flags & UNIT_I8272_VERBOSE)
printf("\n"); sim_printf("\n");
if (chip->drive[i].imd == NULL) { if (chip->drive[i].imd == NULL) {
printf("I8272: IMD disk corrupt.\n"); sim_printf("I8272: IMD disk corrupt.\n");
chip->drive[i].uptr = NULL; chip->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -443,7 +443,7 @@ static t_stat i8272_secread(I8272* chip)
dip->track, chip->fdc_head, chip->fdc_sector, chip->fdc_secsz)); dip->track, chip->fdc_head, chip->fdc_sector, chip->fdc_secsz));
if (dip->imd == NULL) { if (dip->imd == NULL) {
printf(".imd is NULL!" NLP); sim_printf(".imd is NULL!" NLP);
return SCPE_STOP; return SCPE_STOP;
} }
@ -479,7 +479,7 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value)
t_stat rc; t_stat rc;
I8272_DRIVE_INFO* dip; I8272_DRIVE_INFO* dip;
if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) { if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) {
printf("i8272_read: chip->drive returns NULL, fdc_curdrv=%d\n",chip->fdc_curdrv); sim_printf("i8272_read: chip->drive returns NULL, fdc_curdrv=%d\n",chip->fdc_curdrv);
return SCPE_IERR; return SCPE_IERR;
} }
@ -504,7 +504,7 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value)
*value &= ~I8272_MSR_FDC_BUSY; *value &= ~I8272_MSR_FDC_BUSY;
break; break;
default: default:
printf("Default case in i8272_read(FDC_MSR): state=%d\n",chip->fdc_state); sim_printf("Default case in i8272_read(FDC_MSR): state=%d\n",chip->fdc_state);
return SCPE_IERR; return SCPE_IERR;
} }
TRACE_PRINT1(DBG_FD_STATUS,"RD FDC MSR = 0x%02x",*value); TRACE_PRINT1(DBG_FD_STATUS,"RD FDC MSR = 0x%02x",*value);
@ -551,7 +551,7 @@ t_stat i8272_read(I8272* chip,int addr,uint32* value)
return SCPE_OK; return SCPE_OK;
default: default:
printf("Default case in i8272_read(FDC_DATA): state=%d\n",chip->fdc_state); sim_printf("Default case in i8272_read(FDC_DATA): state=%d\n",chip->fdc_state);
return SCPE_IERR; return SCPE_IERR;
} }
} }
@ -763,7 +763,7 @@ static t_stat i8272_sensedrive(I8272* chip)
t_bool track0; t_bool track0;
if ((dip = i8272_select_drive(chip,chip->cmd[1])) == NULL) { if ((dip = i8272_select_drive(chip,chip->cmd[1])) == NULL) {
printf("i8272_sensedrive: i8272_select_drive returns 0\n"); sim_printf("i8272_sensedrive: i8272_select_drive returns 0\n");
st3 = DRIVE_STATUS_FAULT; st3 = DRIVE_STATUS_FAULT;
track0 = FALSE; track0 = FALSE;
} else { } else {
@ -929,7 +929,7 @@ t_stat i8272_write(I8272* chip, int addr, uint32 value)
uint8 cmd; uint8 cmd;
I8272_DRIVE_INFO* dip; I8272_DRIVE_INFO* dip;
if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) { if ((dip = &chip->drive[chip->fdc_curdrv]) == NULL) {
printf("i8272_write: chip->drive returns 0 fdc_curdrv=%d\n",chip->fdc_curdrv); sim_printf("i8272_write: chip->drive returns 0 fdc_curdrv=%d\n",chip->fdc_curdrv);
return SCPE_IERR; return SCPE_IERR;
} }
@ -1008,7 +1008,7 @@ t_stat i8272_write(I8272* chip, int addr, uint32 value)
return i8272_format(chip); return i8272_format(chip);
case I8272_READ_TRACK: case I8272_READ_TRACK:
printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX); sim_printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX);
chip->fdc_sector = 1; /* Read entire track from sector 1...eot */ chip->fdc_sector = 1; /* Read entire track from sector 1...eot */
case I8272_READ_DATA: case I8272_READ_DATA:
case I8272_READ_DELETED_DATA: case I8272_READ_DELETED_DATA:

18
TX-0/tx0_cpu.c
View file

@ -426,16 +426,16 @@ void tx0_dump_regs(char *desc)
/* Check regs sanity */ /* Check regs sanity */
if (AC > DMASK) { if (AC > DMASK) {
printf("Error: AC > DMASK\n"); sim_printf("Error: AC > DMASK\n");
} }
if (MBR > DMASK) { if (MBR > DMASK) {
printf("Error: MBR > DMASK\n"); sim_printf("Error: MBR > DMASK\n");
} }
if (LR > DMASK) { if (LR > DMASK) {
printf("Error: LR > DMASK\n"); sim_printf("Error: LR > DMASK\n");
} }
if (!MEM_ADDR_OK(MAR)) { if (!MEM_ADDR_OK(MAR)) {
printf("Error: MAR > %06o\n", MEMSIZE); sim_printf("Error: MAR > %06o\n", MEMSIZE);
} }
} }
@ -812,7 +812,7 @@ t_stat sim_instr (void)
char *tape_cmd[] = {"Backspace Tape", "Read/Select Tape", "Rewind Tape", "Write/Select Tape" }; char *tape_cmd[] = {"Backspace Tape", "Read/Select Tape", "Rewind Tape", "Write/Select Tape" };
TRACE_PRINT(ERROR_MSG, ("[%06o] TODO: SEL (magtape)\n", PC-1)); TRACE_PRINT(ERROR_MSG, ("[%06o] TODO: SEL (magtape)\n", PC-1));
printf("Device %d: CLRA=%d, BINDEC=%d: %s\n", device, CLRA, BINDEC, tape_cmd[tape_ord]); sim_printf("Device %d: CLRA=%d, BINDEC=%d: %s\n", device, CLRA, BINDEC, tape_cmd[tape_ord]);
} }
break; break;
case IOS_RPF: /* These are used for Magtape control. */ case IOS_RPF: /* These are used for Magtape control. */
@ -1108,13 +1108,13 @@ t_stat cpu_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_ext (UNIT *uptr, int32 val, char *cptr, void *desc) t_stat cpu_set_ext (UNIT *uptr, int32 val, char *cptr, void *desc)
{ {
printf("Set CPU Extended Mode\n"); sim_printf("Set CPU Extended Mode\n");
return SCPE_OK; return SCPE_OK;
} }
t_stat cpu_set_noext (UNIT *uptr, int32 val, char *cptr, void *desc) t_stat cpu_set_noext (UNIT *uptr, int32 val, char *cptr, void *desc)
{ {
printf("Set CPU Non-Extended Mode\n"); sim_printf("Set CPU Non-Extended Mode\n");
return SCPE_OK; return SCPE_OK;
} }
@ -1231,7 +1231,7 @@ t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) {
} }
} }
printf("%d words %s [%06o - %06o].\n", j - lo, flag ? "dumped" : "loaded", lo, j-1); sim_printf("%d words %s [%06o - %06o].\n", j - lo, flag ? "dumped" : "loaded", lo, j-1);
return SCPE_OK; return SCPE_OK;
} }
@ -1314,7 +1314,7 @@ t_stat sim_opr_orig(int32 op)
int32 rbuf; int32 rbuf;
rbuf = tti(0,0,0); rbuf = tti(0,0,0);
TRACE_PRINT(IOS_MSG, ("TTI: character received='%c'\n", rbuf &077)); TRACE_PRINT(IOS_MSG, ("TTI: character received='%c'\n", rbuf &077));
printf("TTI: character received='%c'\n", rbuf &077); sim_printf("TTI: character received='%c'\n", rbuf &077);
LR &= 0266666; /* Clear bits 0,2,5,8,...,17 */ LR &= 0266666; /* Clear bits 0,2,5,8,...,17 */
LR |= SIGN; /* Set bit 0, character available. */ LR |= SIGN; /* Set bit 0, character available. */

8
TX-0/tx0_stddev.c
View file

@ -320,7 +320,7 @@ int32 petr (int32 inst, int32 dev, int32 dat)
do { do {
result = petr_svc(&petr_unit); result = petr_svc(&petr_unit);
if (result != SCPE_OK) { if (result != SCPE_OK) {
printf("PETR: Read error\n"); sim_printf("PETR: Read error\n");
break; break;
} }
} while ((petr_unit.buf & 0100) == 0); /* NOTE: Lines without seventh hole are ignored by PETR. */ } while ((petr_unit.buf & 0100) == 0); /* NOTE: Lines without seventh hole are ignored by PETR. */
@ -436,7 +436,7 @@ t_stat petr_boot (int32 unitno, DEVICE *dptr)
case 03: /* Storage (opr x) */ case 03: /* Storage (opr x) */
MBR = petr(3,0,0); /* Read three characters from tape. */ MBR = petr(3,0,0); /* Read three characters from tape. */
TRACE_PRINT(petr_dev, ERROR_MSG, ("READIN: sto @%06o = %06o\n", MAR, MBR)); TRACE_PRINT(petr_dev, ERROR_MSG, ("READIN: sto @%06o = %06o\n", MAR, MBR));
printf("[%06o] = %06o\n", MAR, MBR); sim_printf("[%06o] = %06o\n", MAR, MBR);
break; break;
case 02: /* Transfer Control (trn x) Start Execution */ case 02: /* Transfer Control (trn x) Start Execution */
PC = MAR; PC = MAR;
@ -482,7 +482,7 @@ t_stat petr_boot (int32 unitno, DEVICE *dptr)
la = (~la) & 0177777; la = (~la) & 0177777;
printf("First Address=%06o, Last Address=%06o\n", fa, la); sim_printf("First Address=%06o, Last Address=%06o\n", fa, la);
for(addr = fa; addr <= la; addr++) { for(addr = fa; addr <= la; addr++) {
tdata = petr(3,0,0); /* Read three characters from tape. */ tdata = petr(3,0,0); /* Read three characters from tape. */
@ -501,7 +501,7 @@ t_stat petr_boot (int32 unitno, DEVICE *dptr)
reason = SCPE_FMT; reason = SCPE_FMT;
} }
printf("Block %d: Calculated checksum=%06o, real checksum=%06o, %s\n", blkcnt, chksum, tdata, chksum == tdata ? "OK" : "BAD Checksum!"); sim_printf("Block %d: Calculated checksum=%06o, real checksum=%06o, %s\n", blkcnt, chksum, tdata, chksum == tdata ? "OK" : "BAD Checksum!");
blkcnt++; blkcnt++;
} }

2
VAX/vax730_stddev.c
View file

@ -594,7 +594,7 @@ switch (opcode) {
break; break;
default: default:
//printf("TU58: Unknown opcode %d\n", opcode); //sim_printf("TU58: Unknown opcode %d\n", opcode);
break; break;
} }
} }

2
VAX/vax750_stddev.c
View file

@ -587,7 +587,7 @@ switch (opcode) {
break; break;
default: default:
//printf("TU58: Unknown opcode %d\n", opcode); //sim_printf("TU58: Unknown opcode %d\n", opcode);
break; break;
} }
} }

20
sigma/sigma_io.c
View file

@ -859,7 +859,7 @@ for (i = 0, curr = 0; i < INTG_MAX; i++) { /* loop thru groups */
return NO_INT; /* no pending intr */ return NO_INT; /* no pending intr */
} }
} }
printf ("%%int eval consistency error = %X\r\n", t); sim_printf ("%%int eval consistency error = %X\r\n", t);
int_req[curr] = 0; /* "impossible" */ int_req[curr] = 0; /* "impossible" */
} }
if (curr == INT_GETGRP (int_hiact)) /* at active group? */ if (curr == INT_GETGRP (int_hiact)) /* at active group? */
@ -868,7 +868,7 @@ for (i = 0, curr = 0; i < INTG_MAX; i++) { /* loop thru groups */
if (curr == 0) /* end of list? */ if (curr == 0) /* end of list? */
return NO_INT; /* no pending intr */ return NO_INT; /* no pending intr */
} }
printf ("%%int eval consistency error, list end not found\r\n"); sim_printf ("%%int eval consistency error, list end not found\r\n");
return NO_INT; return NO_INT;
} }
@ -886,7 +886,7 @@ for (i = 0, curr = 0; i < INTG_MAX; i++) { /* loop thru groups */
if (curr == 0) /* end of list? */ if (curr == 0) /* end of list? */
return FALSE; /* no int possible */ return FALSE; /* no int possible */
} }
printf ("%%int possible consistency error, list end not found\r\n"); sim_printf ("%%int possible consistency error, list end not found\r\n");
return FALSE; return FALSE;
} }
@ -922,14 +922,14 @@ for (i = 0, curr = 0; i < INTG_MAX; i++) { /* loop thru groups */
if (t & mask) /* req active? */ if (t & mask) /* req active? */
return INTV (curr, j); /* return int num */ return INTV (curr, j); /* return int num */
} }
printf ("%%int actv consistency error = %X\r\n", t); sim_printf ("%%int actv consistency error = %X\r\n", t);
int_req[curr] = 0; /* "impossible" */ int_req[curr] = 0; /* "impossible" */
} }
curr = int_lnk[curr]; /* next group */ curr = int_lnk[curr]; /* next group */
if (curr == 0) /* end of list? */ if (curr == 0) /* end of list? */
return NO_INT; /* no pending interupt */ return NO_INT; /* no pending interupt */
} }
printf ("%%int actv consistency error, list end not found\r\n"); sim_printf ("%%int actv consistency error, list end not found\r\n");
return NO_INT; return NO_INT;
} }
@ -944,7 +944,7 @@ if (hireq >= NO_INT) /* none pending? */
grp = INT_GETGRP (hireq); /* get grp, bit */ grp = INT_GETGRP (hireq); /* get grp, bit */
bit = INT_GETBIT (hireq); bit = INT_GETBIT (hireq);
if (bit >= int_tab[grp].nbits) { /* validate bit */ if (bit >= int_tab[grp].nbits) { /* validate bit */
printf ("%%int ack consistency error, hireq=%X\r\n", hireq); sim_printf ("%%int ack consistency error, hireq=%X\r\n", hireq);
return 0; return 0;
} }
mask = 1u << (int_tab[grp].nbits - bit - 1); mask = 1u << (int_tab[grp].nbits - bit - 1);
@ -952,7 +952,7 @@ int_arm[grp] &= ~mask; /* clear armed */
int_hiact = hireq; /* now active */ int_hiact = hireq; /* now active */
int_hireq = io_eval_int (); /* paranoia */ int_hireq = io_eval_int (); /* paranoia */
if (int_hireq != NO_INT) if (int_hireq != NO_INT)
printf ("%%int ack consistency error, post iack req=%X\r\n", int_hireq); sim_printf ("%%int ack consistency error, post iack req=%X\r\n", int_hireq);
return int_tab[grp].vecbase + bit; return int_tab[grp].vecbase + bit;
} }
@ -966,7 +966,7 @@ if (hiact < NO_INT) { /* intr active? */
grp = INT_GETGRP (hiact); /* get grp, bit */ grp = INT_GETGRP (hiact); /* get grp, bit */
bit = INT_GETBIT (hiact); bit = INT_GETBIT (hiact);
if (bit >= int_tab[grp].nbits) { /* validate bit */ if (bit >= int_tab[grp].nbits) { /* validate bit */
printf ("%%int release consistency error, hiact=%X\r\n", hiact); sim_printf ("%%int release consistency error, hiact=%X\r\n", hiact);
return 0; return 0;
} }
mask = 1u << (int_tab[grp].nbits - bit - 1); mask = 1u << (int_tab[grp].nbits - bit - 1);
@ -997,7 +997,7 @@ if (inum < NO_INT) { /* valid? */
grp = INT_GETGRP (inum); /* get grp, bit */ grp = INT_GETGRP (inum); /* get grp, bit */
bit = INT_GETBIT (inum); bit = INT_GETBIT (inum);
if (bit >= int_tab[grp].nbits) { /* validate bit */ if (bit >= int_tab[grp].nbits) { /* validate bit */
printf ("%%intreq set/clear consistency error, inum=%X\r\n", inum); sim_printf ("%%intreq set/clear consistency error, inum=%X\r\n", inum);
return; return;
} }
mask = 1u << (int_tab[grp].nbits - bit - 1); mask = 1u << (int_tab[grp].nbits - bit - 1);
@ -1018,7 +1018,7 @@ if (inum < NO_INT) { /* valid? */
grp = INT_GETGRP (inum); /* get grp, bit */ grp = INT_GETGRP (inum); /* get grp, bit */
bit = INT_GETBIT (inum); bit = INT_GETBIT (inum);
if (bit >= int_tab[grp].nbits) { /* validate bit */ if (bit >= int_tab[grp].nbits) { /* validate bit */
printf ("%%intarm set/clear consistency error, inum=%X\r\n", inum); sim_printf ("%%intarm set/clear consistency error, inum=%X\r\n", inum);
return; return;
} }
mask = 1u << (int_tab[grp].nbits - bit - 1); mask = 1u << (int_tab[grp].nbits - bit - 1);

4
sim_disk.c
View file

@ -1796,7 +1796,7 @@ if (DeviceIoControl((HANDLE)Disk, /* handle to volume */
(DWORD) sizeof(Device), /* size of output buffer */ (DWORD) sizeof(Device), /* size of output buffer */
(LPDWORD) &IoctlReturnSize, /* number of bytes returned */ (LPDWORD) &IoctlReturnSize, /* number of bytes returned */
(LPOVERLAPPED) NULL)) /* OVERLAPPED structure */ (LPOVERLAPPED) NULL)) /* OVERLAPPED structure */
printf ("Device OK - Type: %s, Number: %d\n", _device_type_name (Device.DeviceType), (int)Device.DeviceNumber); sim_printf ("Device OK - Type: %s, Number: %d\n", _device_type_name (Device.DeviceType), (int)Device.DeviceNumber);
if (sector_size) if (sector_size)
*sector_size = 512; *sector_size = 512;
@ -1871,7 +1871,7 @@ if (1) {
} }
#endif #endif
if (removable && *removable) if (removable && *removable)
printf ("Removable Device\n"); sim_printf ("Removable Device\n");
return SCPE_OK; return SCPE_OK;
} }