PDQ-3, SAGE: Coverity Fixes

CID       Action
   1416081   changed variable answer to int
   1416082   checked returned values with ASSURE - read error means corrupted target code.
   1416088   added return
   1416109   This fallthru was intentional - duplicated code to make coverity happy
   1416111   This fallthru was intentional - duplicated code to make coverity happy
   1416116   This fallthru was intentional - duplicated code to make coverity happy
   1416117   This fallthru was intentional - duplicated code to make coverity happy
   1416124   protected against negative return
   1416142   added ASSURE, however this case won't happen since reg_intpending==true implies positive int level
   1416145   checked non-NULL, return SCPE_ARG if NULL
   1416150   since only 2 drives are supported, fdc_selected is decoded to 0 and 1 only (allowed 2 and 3 before)
   1416152   restrict to 2 drives only
   1416166   checked value with ASSURE

   1416101   typo: should have been resx
   1416106   unnecessary code removed
   1416110   this fallthru was intentional - duplicated code to make coverity happy
   1416112   this fallthru was intentional - duplicated code to make coverity happy
   1416148   change condition to check for negative value
   1416179   break was remainder from former logic - removed
   1415866   code was remainder from former unimplemented instruction trap - removed

PDQ-3/pdq3_cpu.c

@@ -798,6 +798,7 @@ static t_stat taskswitch6() {
       sim_debug(DBG_CPU_CONC3, &cpu_dev, DBG_PCFORMAT0 "Taskswitch6: reg_intpending=%08x\n",DBG_PC, reg_intpending);
       reg_ctp = NIL; /* set no active task */
       level = getIntLevel(); /* obtain highest pending interupt */
+      ASSURE(level >= 0); /* won't happen, as reg_intpending is known to be true */
       vector = int_vectors[level];
       sem = Get(vector);
       sim_debug(DBG_CPU_CONC3, &cpu_dev, DBG_PCFORMAT0 "Taskswitch6: SIGNAL sem=$%04x\n",DBG_PC, sem);

PDQ-3/pdq3_debug.c

@@ -69,6 +69,7 @@ static void dbg_opdbginit() {
   while (!feof(fd)) {
     fgets(line,100,fd);
     sscanf(line,"%x %d", &i, &f);
+    ASSURE(i >= DEBUG_MINOPCODE && i < DEBUG_MAXOPCODE);
     opdebug[i-DEBUG_MINOPCODE] = f;
   }
   fclose(fd);
@@ -371,12 +372,12 @@ static PROCINFO* new_procinfo(uint16 segbase, uint16 procno, uint16 mscw, uint16
   p->seg = find_seginfo(segbase, &dummy);
   p->segb = osegb;
   p->instipc = ADDR_OFF(PCX);
-  ReadEx(mscw,OFF_MSIPC, &p->ipc);
+  ASSURE(ReadEx(mscw,OFF_MSIPC, &p->ipc) == SCPE_OK);
-  ReadEx(segbase, 0, &procbase);
+  ASSURE(ReadEx(segbase, 0, &procbase)  == SCPE_OK);
-  ReadEx(segbase+procbase-procno, 0, &procaddr);
+  ASSURE(ReadEx(segbase+procbase-procno, 0, &procaddr) == SCPE_OK);
-  ReadEx(segbase+procaddr, 0, &p->localsz);
+  ASSURE(ReadEx(segbase+procaddr, 0, &p->localsz) == SCPE_OK);
-  ReadEx(segbase+procaddr-1, 0, &exitic);
+  ASSURE(ReadEx(segbase+procaddr-1, 0, &exitic)  == SCPE_OK);
-  ReadBEx(segbase, exitic, &sz1);
+  ASSURE(ReadBEx(segbase, exitic, &sz1) == SCPE_OK);
   if (sz1==0x96) {
     ReadBEx(segbase, exitic+1, &sz1);
     if (sz1 & 0x80) {

PDQ-3/pdq3_fdc.c

@@ -780,7 +780,8 @@ t_stat fdc_reset (DEVICE *dptr) {
   else
     add_ioh(ctxt->ioi);
 
-  for (i=0; i<4; i++) {
+  /* allow for 2 drives */
+  for (i=0; i<2; i++) {
     DRVDATA *cur = &fdc_drv[i];
     cur->dr_unit = &fdc_unit[i];
     cur->dr_trk = 0;
@@ -797,8 +798,8 @@ static DRVDATA *fdc_select() {
 
   if (isbitset(reg_fdc_drvsel,FDC_SEL_UNIT0)) fdc_selected = 0;
   else if (isbitset(reg_fdc_drvsel,FDC_SEL_UNIT1)) fdc_selected = 1;
-  else if (isbitset(reg_fdc_drvsel,FDC_SEL_UNIT2)) fdc_selected = 2;
+  else if (isbitset(reg_fdc_drvsel,FDC_SEL_UNIT2)) fdc_selected = 0;
-  else if (isbitset(reg_fdc_drvsel,FDC_SEL_UNIT3)) fdc_selected = 3;
+  else if (isbitset(reg_fdc_drvsel,FDC_SEL_UNIT3)) fdc_selected = 1;
   else fdc_selected = -1;
  
   if (fdc_selected >= 0)  {
@@ -968,21 +969,29 @@ t_stat fdc_write(t_addr ioaddr, uint16 data) {
   switch (io) {
   case 4: /* cmd + drvsel */
     reg_fdc_drvsel = (data >> 8) & 0xff;
+    fdc_docmd(data);
+    break;
   case 0: /* cmd writeonly */
     fdc_docmd(data);
     break;
   case 5: /* track + drvsel */
     reg_fdc_drvsel = (data >> 8) & 0xff;
+    reg_fdc_track = data & 0xff;
+    break;
   case 1: /* track */
     reg_fdc_track = data & 0xff;
     break;
   case 6: /* sector + drvsel */
     reg_fdc_drvsel = (data >> 8) & 0xff;
+    reg_fdc_sector = data & 0xff;
+    break;
   case 2: /* sector */
     reg_fdc_sector = data & 0xff;
     break;
   case 7: /* data + drvsel */
     reg_fdc_drvsel = (data >> 8) & 0xff;
+    reg_fdc_data = data & 0xff;
+    break;
   case 3: /* data */
     reg_fdc_data = data & 0xff;
     break;
@@ -1080,8 +1089,9 @@ t_stat pdq3_diskCreate(FILE *fileref, const char *ctlr_comment) {
     DISK_INFO *myDisk = NULL;
     char *comment;
     char *curptr;
-    uint8 answer;
+    int answer;
     int32 len, remaining;
+    long fsize;
 
     if(fileref == NULL) {
         return (SCPE_OPENERR);
@@ -1125,7 +1135,8 @@ t_stat pdq3_diskCreate(FILE *fileref, const char *ctlr_comment) {
     rewind(fileref);
 
     /* Erase the contents of the IMD file in case we are overwriting an existing image. */
-    sim_set_fsize(fileref, ftell (fileref));
+    fsize = ftell(fileref);
+    sim_set_fsize(fileref, fsize<0 ? 0 : fsize);
 
     fprintf(fileref, "IMD SIMH %s %s\n", __DATE__, __TIME__);
     fputs(comment, fileref);

PDQ-3/pdq3_stddev.c

@@ -264,7 +264,7 @@ t_stat con_pollsvc(UNIT *uptr) {
 
     if (isbitset(con_ctrl1, CONC1_ECHO)) { /* echo? XXX handle in telnet handler? */
       /* XXX use direct send here, not sending via con_termsvc */
-      sim_putchar_s(ch);
+      return sim_putchar_s(ch);
     }
   }
   return SCPE_OK;

PDQ-3/pdq3_sys.c

@@ -266,7 +266,7 @@ static t_stat pdq3_cmd_namealias(int32 arg, CONST char *buf) {
   strncpy (gbuf, buf, sizeof(gbuf)-1);
   name = strtok(gbuf, " \t");
   alias = strtok(NULL, " \t\n");
-  return dbg_enteralias(name,alias);
+  return name == NULL || alias == NULL ? SCPE_ARG : dbg_enteralias(name, alias);
 }
 
 /**************************************************************************************

SAGE/i8259.c

@@ -134,7 +134,7 @@ t_stat i8259_write(I8259* chip,int addr,uint32 value)
                         if (chip->isr & bit) break;
                         bit = bit << 1; if (bit==0x100) bit = 1;
                     }
-                    chip->isr &= ~bit; break;
+                    chip->isr &= ~bit;
                     if ((value & I8259_OCW2_MODE) == 0xa0) { 
                         chip->prio = 7 - i + chip->prio; if (chip->prio>7) chip->prio -= 8;
                     }

SAGE/m68k_cpu.c

@@ -245,7 +245,6 @@ t_stat m68kcpu_peripheral_reset()
     t_stat rc;
     DEVICE** devs = sim_devices;
     DEVICE* dptr;
-    if (!devs) return SCPE_IERR;
     
     while ((dptr = *devs) != NULL) {
         if (dptr != cpudev_self) { 
@@ -1804,7 +1803,7 @@ do_bclr8:       SETZ8(res & src1);
             case 000600: case 001600: case 002600: case 003600:
             case 004600: case 005600: case 006600: case 007600: /*chk*/
                 src1 = DRX;
-                SETF(src1 < 0,FLAG_N);
+                SETF((src1 & BIT31) != 0,FLAG_N);
                 ASSERT_OK(ea_src_w(IR_EAMOD,IR_EAREG,&res,&PC));
                 rc = CCR_N || src1 > res ? m68k_gen_exception(6,&PC) : SCPE_OK;
                 break;
@@ -2534,7 +2533,6 @@ do_neg32:       res = m68k_sub32(0,srcx1,0,TRUE);
                 CLRF(FLAG_C|FLAG_V);
                 rc = ea_dst_w(EA_DDIR,IR_REGX,res,&PC);
                 break;
-                rc = STOP_IMPL; break;
             case 0000200: case 00000220: case 0000230: case 0000240:
             case 0000250: case 00000260: case 0000270: /* and.l -> d*/
                 ASSERT_OK(ea_src_l(IR_EAMOD,IR_EAREG,&src1,&PC));
@@ -3186,7 +3184,7 @@ do_ror32:       reg = DR+IR_REGY;
                 if (cnt) {
                     cnt &= 31;
                     resx = (resx>>cnt) | (resx<<(32-cnt));
-                    SETF(MASK_33(res),FLAG_C);
+                    SETF(MASK_33(resx),FLAG_C);
                     *reg = (int32)resx;
                 } else {
                     CLRF(FLAG_C);

SAGE/sage_cons.c

@@ -115,6 +115,7 @@ static t_stat sioterm_svc(UNIT* uptr)
         chip->crlf = chip->crlf==1 ? 2 : 0; break;
     case 0:
         if (chip->crlf==2) goto set_stat;
+        chip->crlf = 0; break;
     default:
         chip->crlf = 0;
     }
@@ -390,6 +391,7 @@ static t_stat consterm_svc(UNIT* uptr)
         chip->crlf = (chip->crlf==1) ? 2 : 0; break;
     case 0:
         if (chip->crlf==2) goto set_stat;
+        chip->crlf = 0; break;
     default:
         chip->crlf = 0;
     }