diff --git a/H316/h316_stddev.c b/H316/h316_stddev.c index 32005811..c48ac7f8 100644 --- a/H316/h316_stddev.c +++ b/H316/h316_stddev.c @@ -872,7 +872,8 @@ t_stat clk_svc (UNIT *uptr) M[M_CLK] = (M[M_CLK] + 1) & DMASK; /* increment mem ctr */ if (M[M_CLK] == 0) /* = 0? set flag */ SET_INT (INT_CLK); -sim_activate (&clk_unit, sim_rtc_calb (clk_tps)); /* reactivate */ +sim_rtc_calb (clk_tps); /* recalibrate */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ return SCPE_OK; } diff --git a/HP2100/hp2100_defs.h b/HP2100/hp2100_defs.h index 2f65fe9d..3c969c9f 100644 --- a/HP2100/hp2100_defs.h +++ b/HP2100/hp2100_defs.h @@ -453,13 +453,6 @@ struct dib { /* Device information bl extern uint32 SR; /* S register (for IBL) */ extern uint32 dev_prl [2], dev_irq [2], dev_srq [2]; /* I/O signal vectors */ -/* Simulator state */ - -extern FILE *sim_deb; -extern FILE *sim_log; -extern int32 sim_step; -extern int32 sim_switches; - /* CPU functions */ extern t_stat ibl_copy (const BOOT_ROM rom, int32 dev); diff --git a/I7094/i7094_clk.c b/I7094/i7094_clk.c index d3020093..311757fb 100644 --- a/I7094/i7094_clk.c +++ b/I7094/i7094_clk.c @@ -74,7 +74,8 @@ if ((clk_dev.flags & DEV_DIS) == 0) { /* clock enabled? */ WriteP (CLK_CTR, ctr); if (ctr == 0) /* overflow? req trap */ chtr_clk = 1; - sim_activate (uptr, sim_rtcn_calb (CLK_TPS, TMR_CLK)); /* reactivate unit */ + sim_rtcn_calb (CLK_TPS, TMR_CLK); /* calibrate clock */ + sim_activate_after (uptr, 1000000/CLK_TPS); /* reactivate unit */ } return SCPE_OK; } diff --git a/NOVA/nova_clk.c b/NOVA/nova_clk.c index 0f9bbdb3..47042808 100644 --- a/NOVA/nova_clk.c +++ b/NOVA/nova_clk.c @@ -140,7 +140,7 @@ if ( DEV_IS_BUSY(INT_CLK) ) DEV_UPDATE_INTR ; } t = sim_rtc_calb (clk_tps[clk_sel]); /* calibrate delay */ -sim_activate (&clk_unit, t); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps[clk_sel]); /* reactivate unit */ if (clk_adj[clk_sel] > 0) /* clk >= 60Hz? */ tmxr_poll = t * clk_adj[clk_sel]; /* poll is longer */ else diff --git a/PDP1/pdp1_clk.c b/PDP1/pdp1_clk.c index acc32533..56a5accb 100644 --- a/PDP1/pdp1_clk.c +++ b/PDP1/pdp1_clk.c @@ -101,7 +101,7 @@ t_stat clk_svc (UNIT *uptr) if (clk_dev.flags & DEV_DIS) /* disabled? */ return SCPE_OK; tmxr_poll = sim_rtcn_calb (CLK_TPS, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, tmxr_poll); /* reactivate unit */ +sim_activate_after (uptr, 1000000/CLK_TPS); /* reactivate unit */ clk_cntr = clk_cntr + CLK_CNTS; /* incr counter */ if ((clk_cntr % CLK_C32MS) == 0) /* 32ms interval? */ dev_req_int (clk32ms_sbs); /* req intr */ diff --git a/PDP11/pdp11_cpu.c b/PDP11/pdp11_cpu.c index 96049f30..78a87620 100644 --- a/PDP11/pdp11_cpu.c +++ b/PDP11/pdp11_cpu.c @@ -253,8 +253,6 @@ typedef struct { /* Global state */ -extern FILE *sim_log; - uint16 *M = NULL; /* memory */ int32 REGFILE[6][2] = { {0} }; /* R0-R5, two sets */ int32 STACKFILE[4] = { 0 }; /* SP, four modes */ diff --git a/PDP11/pdp11_rq.c b/PDP11/pdp11_rq.c index 7a7f4790..da9c760e 100644 --- a/PDP11/pdp11_rq.c +++ b/PDP11/pdp11_rq.c @@ -699,7 +699,6 @@ static struct ctlrtyp ctlr_tab[] = { }; extern int32 int_req[IPL_HLVL]; -extern int32 tmr_poll, clk_tps; int32 rq_itime = 200; /* init time, except */ int32 rq_itime4 = 10; /* stage 4 */ @@ -1429,7 +1428,7 @@ if (cp->csta < CST_UP) { /* still init? */ sim_debug (DBG_REQ, dptr, "initialization complete\n"); cp->csta = CST_UP; /* we're up */ cp->sa = 0; /* clear SA */ - sim_activate (dptr->units + RQ_TIMER, tmr_poll * clk_tps); + sim_activate_after (dptr->units + RQ_TIMER, 1000000); if ((cp->saw & SA_S4H_LF) && cp->perr) rq_plf (cp, cp->perr); cp->perr = 0; @@ -1495,7 +1494,7 @@ MSC *cp = rq_ctxmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum]; sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_tmrsvc\n"); -sim_activate (uptr, tmr_poll * clk_tps); /* reactivate */ +sim_activate_after (uptr, 1000000); /* reactivate */ for (i = 0; i < RQ_NUMDR; i++) { /* poll */ nuptr = dptr->units + i; if ((nuptr->flags & UNIT_ATP) && /* ATN pending? */ diff --git a/PDP11/pdp11_stddev.c b/PDP11/pdp11_stddev.c index 1bc6777f..ab15699b 100644 --- a/PDP11/pdp11_stddev.c +++ b/PDP11/pdp11_stddev.c @@ -444,7 +444,7 @@ clk_csr = clk_csr | CSR_DONE; /* set done */ if ((clk_csr & CSR_IE) || clk_fie) SET_INT (CLK); t = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, t); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ tmr_poll = t; /* set timer poll */ tmxr_poll = t; /* set mux poll */ return SCPE_OK; diff --git a/PDP11/pdp11_tq.c b/PDP11/pdp11_tq.c index f6c6f886..4b4603f0 100644 --- a/PDP11/pdp11_tq.c +++ b/PDP11/pdp11_tq.c @@ -245,7 +245,6 @@ static struct drvtyp drv_tab[] = { /* Data */ extern int32 int_req[IPL_HLVL]; -extern int32 tmr_poll, clk_tps; uint32 tq_sa = 0; /* status, addr */ uint32 tq_saw = 0; /* written data */ @@ -713,7 +712,7 @@ if (tq_csta < CST_UP) { /* still init? */ sim_debug (DBG_REQ, &tq_dev, "initialization complete\n"); tq_csta = CST_UP; /* we're up */ tq_sa = 0; /* clear SA */ - sim_activate (&tq_unit[TQ_TIMER], tmr_poll * clk_tps); + sim_activate_after (&tq_unit[TQ_TIMER], 1000000); if ((tq_saw & SA_S4H_LF) && tq_perr) tq_plf (tq_perr); tq_perr = 0; @@ -786,7 +785,7 @@ UNIT *nuptr; sim_debug(DBG_TRC, &tq_dev, "tq_tmrsvc\n"); -sim_activate (uptr, tmr_poll * clk_tps); /* reactivate */ +sim_activate_after (uptr, 1000000); /* reactivate */ for (i = 0; i < TQ_NUMDR; i++) { /* poll */ nuptr = tq_dev.units + i; if ((nuptr->flags & UNIT_ATP) && /* ATN pending? */ @@ -1193,10 +1192,9 @@ if ((uptr = tq_getucb (lu))) { /* unit exist? */ sts = tq_mot_valid (uptr, OP_POS); /* validity checks */ if (sts == ST_SUC) { /* ok? */ uptr->cpkt = pkt; /* op in progress */ - tq_rwtime = 2 * tmr_poll * clk_tps; /* 2 second rewind time */ if ((tq_pkt[pkt].d[CMD_MOD] & MD_RWD) && /* rewind? */ (!(tq_pkt[pkt].d[CMD_MOD] & MD_IMM))) /* !immediate? */ - sim_activate (uptr, tq_rwtime); /* use 2 sec rewind execute time */ + sim_activate_after (uptr, 2000000); /* use 2 sec rewind execute time */ else { /* otherwise */ uptr->iostarttime = sim_grtime(); sim_activate (uptr, 0); /* use normal execute time */ diff --git a/PDP11/pdp11_xq.c b/PDP11/pdp11_xq.c index 4d50c87b..fefc6396 100644 --- a/PDP11/pdp11_xq.c +++ b/PDP11/pdp11_xq.c @@ -2483,7 +2483,7 @@ t_stat xq_reset(DEVICE* dptr) xq_csr_set_clr(xq, XQ_CSR_OK, 0); /* start service timer */ - sim_activate_abs(&xq->unit[1], (tmr_poll * clk_tps) / 4); + sim_activate_after(&xq->unit[1], 250000); /* stop the receiver */ eth_clr_async(xq->var->etherface); @@ -2672,7 +2672,7 @@ t_stat xq_tmrsvc(UNIT* uptr) } /* resubmit service timer */ - sim_activate(uptr, (tmr_poll * clk_tps) / 4); + sim_activate_after(uptr, 250000); return SCPE_OK; } diff --git a/PDP11/pdp11_xu.c b/PDP11/pdp11_xu.c index 0a422e21..c41da85a 100644 --- a/PDP11/pdp11_xu.c +++ b/PDP11/pdp11_xu.c @@ -99,8 +99,7 @@ #include "pdp11_xu.h" -extern int32 tmxr_poll, tmr_poll, clk_tps, cpu_astop; -extern FILE *sim_log; +extern int32 tmxr_poll; t_stat xu_rd(int32* data, int32 PA, int32 access); t_stat xu_wr(int32 data, int32 PA, int32 access); @@ -583,7 +582,6 @@ t_stat xu_tmrsvc(UNIT* uptr) { CTLR* xu = xu_unit2ctlr(uptr); const ETH_MAC mop_multicast = {0xAB, 0x00, 0x00, 0x02, 0x00, 0x00}; - const int one_second = clk_tps * tmr_poll; /* send identity packet when timer expires */ if (--xu->var->idtmr <= 0) { @@ -596,7 +594,7 @@ t_stat xu_tmrsvc(UNIT* uptr) upd_stat16 (&xu->var->stats.secs, 1); /* resubmit service timer */ - sim_activate(uptr, one_second); + sim_activate_after(uptr, 1000000); return SCPE_OK; } @@ -677,7 +675,7 @@ t_stat xu_sw_reset (CTLR* xu) sim_clock_coschedule (&xu->unit[0], tmxr_poll); /* start service timer */ - sim_activate_abs(&xu->unit[1], tmr_poll * clk_tps); + sim_activate_after (&xu->unit[1], 1000000); } /* clear load_server address */ diff --git a/PDP18B/pdp18b_stddev.c b/PDP18B/pdp18b_stddev.c index 15019a49..987f2f1d 100644 --- a/PDP18B/pdp18b_stddev.c +++ b/PDP18B/pdp18b_stddev.c @@ -427,7 +427,7 @@ int32 t; t = sim_rtc_calb (clk_tps); /* calibrate clock */ tmxr_poll = t; /* set mux poll */ -sim_activate (&clk_unit, t); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ #if defined (PDP15) clk_task_upd (FALSE); /* update task timer */ #endif diff --git a/PDP8/pdp8_clk.c b/PDP8/pdp8_clk.c index 327d6f80..9d81d5ae 100644 --- a/PDP8/pdp8_clk.c +++ b/PDP8/pdp8_clk.c @@ -146,8 +146,8 @@ int32 t; dev_done = dev_done | INT_CLK; /* set done */ int_req = INT_UPDATE; /* update interrupts */ t = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, t); /* reactivate unit */ tmxr_poll = t; /* set mux poll */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ return SCPE_OK; } diff --git a/VAX/vax610_stddev.c b/VAX/vax610_stddev.c index 2c095bde..74faa632 100644 --- a/VAX/vax610_stddev.c +++ b/VAX/vax610_stddev.c @@ -399,9 +399,10 @@ int32 t; if (clk_csr & CSR_IE) SET_INT (CLK); t = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, t); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ tmr_poll = t; /* set tmr poll */ tmxr_poll = t * TMXR_MULT; /* set mux poll */ +AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */ return SCPE_OK; } diff --git a/VAX/vax630_stddev.c b/VAX/vax630_stddev.c index ac3ee57a..e3c0b55a 100644 --- a/VAX/vax630_stddev.c +++ b/VAX/vax630_stddev.c @@ -335,9 +335,10 @@ int32 t; if (clk_csr & CSR_IE) SET_INT (CLK); t = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, t); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ tmr_poll = t; /* set tmr poll */ tmxr_poll = t * TMXR_MULT; /* set mux poll */ +AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */ return SCPE_OK; } diff --git a/VAX/vax730_stddev.c b/VAX/vax730_stddev.c index bf2ee949..30b6484b 100644 --- a/VAX/vax730_stddev.c +++ b/VAX/vax730_stddev.c @@ -182,7 +182,6 @@ int32 tmr_use_100hz = 1; /* use 100Hz for timer * int32 clk_tps = 100; /* ticks/second */ int32 tmxr_poll = CLK_DELAY * TMXR_MULT; /* term mux poll */ int32 tmr_poll = CLK_DELAY; /* pgm timer poll */ -int32 todr_reg = 0; /* TODR register */ struct todr_battery_info { uint32 toy_gmtbase; /* GMT base of set value */ uint32 toy_gmtbasemsec; /* The milliseconds of the set value */ @@ -302,7 +301,6 @@ DEVICE tto_dev = { UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE+UNIT_FIX, sizeof(TOY)), CLK_DELAY };/* 100Hz */ REG clk_reg[] = { - { DRDATAD (TODR, todr_reg, 32, "time-of-day register"), PV_LEFT }, { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, { DRDATAD (POLL, tmr_poll, 24, "calibrated poll interval"), REG_NZ + PV_LEFT + REG_HRO }, { DRDATAD (TPS, clk_tps, 8, "ticks per second (100)"), REG_NZ + PV_LEFT }, @@ -798,8 +796,9 @@ tmr_nicr = val; t_stat clk_svc (UNIT *uptr) { tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, tmr_poll); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ +AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */ if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */ tmr_incr (TMR_INC); /* do timer service */ return SCPE_OK; diff --git a/VAX/vax750_stddev.c b/VAX/vax750_stddev.c index e1ea0891..3a06175e 100644 --- a/VAX/vax750_stddev.c +++ b/VAX/vax750_stddev.c @@ -181,7 +181,6 @@ int32 tmr_use_100hz = 1; /* use 100Hz for timer * int32 clk_tps = 100; /* ticks/second */ int32 tmxr_poll = CLK_DELAY * TMXR_MULT; /* term mux poll */ int32 tmr_poll = CLK_DELAY; /* pgm timer poll */ -int32 todr_reg = 0; /* TODR register */ struct todr_battery_info { uint32 toy_gmtbase; /* GMT base of set value */ uint32 toy_gmtbasemsec; /* The milliseconds of the set value */ @@ -302,7 +301,6 @@ DEVICE tto_dev = { UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE+UNIT_FIX, sizeof(TOY)), CLK_DELAY };/* 100Hz */ REG clk_reg[] = { - { DRDATAD (TODR, todr_reg, 32, "time-of-day register"), PV_LEFT }, { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, { DRDATAD (POLL, tmr_poll, 24, "calibrated poll interval"), REG_NZ + PV_LEFT + REG_HRO }, { DRDATAD (TPS, clk_tps, 8, "ticks per second (100)"), REG_NZ + PV_LEFT }, @@ -794,7 +792,7 @@ tmr_nicr = val; t_stat clk_svc (UNIT *uptr) { tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, tmr_poll); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */ if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */ diff --git a/VAX/vax780_stddev.c b/VAX/vax780_stddev.c index e75dec32..1237884b 100644 --- a/VAX/vax780_stddev.c +++ b/VAX/vax780_stddev.c @@ -198,7 +198,6 @@ int32 tmr_use_100hz = 1; /* use 100Hz for timer * int32 clk_tps = 100; /* ticks/second */ int32 tmxr_poll = CLK_DELAY * TMXR_MULT; /* term mux poll */ int32 tmr_poll = CLK_DELAY; /* pgm timer poll */ -int32 todr_reg = 0; /* TODR register */ struct todr_battery_info { uint32 toy_gmtbase; /* GMT base of set value */ uint32 toy_gmtbasemsec; /* The milliseconds of the set value */ @@ -318,7 +317,6 @@ DEVICE tto_dev = { UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE+UNIT_FIX, sizeof(TOY)), CLK_DELAY };/* 100Hz */ REG clk_reg[] = { - { DRDATAD (TODR, todr_reg, 32, "time-of-day register"), PV_LEFT }, { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, { DRDATAD (POLL, tmr_poll, 24, "calibrated poll interval"), REG_NZ + PV_LEFT + REG_HRO }, { DRDATAD (TPS, clk_tps, 8, "ticks per second (100)"), REG_NZ + PV_LEFT }, @@ -612,7 +610,7 @@ tmr_nicr = val; t_stat clk_svc (UNIT *uptr) { tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, tmr_poll); /* reactivate unit */ +sim_activate_after (uptr, 1000000/clk_tps); /* reactivate unit */ tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */ if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */ diff --git a/VAX/vax860_stddev.c b/VAX/vax860_stddev.c index e8fa5c00..760d8cb7 100644 --- a/VAX/vax860_stddev.c +++ b/VAX/vax860_stddev.c @@ -207,7 +207,6 @@ int32 tmr_use_100hz = 1; /* use 100Hz for timer * int32 clk_tps = 100; /* ticks/second */ int32 tmxr_poll = CLK_DELAY * TMXR_MULT; /* term mux poll */ int32 tmr_poll = CLK_DELAY; /* pgm timer poll */ -int32 todr_reg = 0; /* TODR register */ struct todr_battery_info { uint32 toy_gmtbase; /* GMT base of set value */ uint32 toy_gmtbasemsec; /* The milliseconds of the set value */ @@ -344,7 +343,6 @@ DEVICE tto_dev = { UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE+UNIT_FIX, sizeof(TOY)), CLK_DELAY };/* 100Hz */ REG clk_reg[] = { - { DRDATAD (TODR, todr_reg, 32, "time-of-day register"), PV_LEFT }, { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, { DRDATAD (POLL, tmr_poll, 24, "calibrated poll interval"), REG_NZ + PV_LEFT + REG_HRO }, { DRDATAD (TPS, clk_tps, 8, "ticks per second (100)"), REG_NZ + PV_LEFT }, @@ -749,9 +747,9 @@ tmr_nicr = val; t_stat clk_svc (UNIT *uptr) { tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */ -sim_activate (&clk_unit, tmr_poll); /* reactivate unit */ +sim_activate_after (&clk_unit, 1000000/clk_tps); /* reactivate unit */ tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ -todr_reg = todr_reg + 1; /* incr TODR */ +AIO_SET_INTERRUPT_LATENCY(tmr_poll*clk_tps); /* set interrrupt latency */ if ((tmr_iccs & TMR_CSR_RUN) && tmr_use_100hz) /* timer on, std intvl? */ tmr_incr (TMR_INC); /* do timer service */ return SCPE_OK; diff --git a/scp.h b/scp.h index 6eee016e..47454a0b 100644 --- a/scp.h +++ b/scp.h @@ -152,6 +152,7 @@ extern DEVICE *sim_dflt_dev; extern int32 sim_interval; extern int32 sim_switches; extern int32 sim_quiet; +extern int32 sim_step; extern FILE *sim_log; /* log file */ extern FILEREF *sim_log_ref; /* log file file reference */ extern FILE *sim_deb; /* debug file */ diff --git a/sim_timer.c b/sim_timer.c index b5c56617..3b558728 100644 --- a/sim_timer.c +++ b/sim_timer.c @@ -1437,6 +1437,11 @@ else uptr->next = sim_clock_cosched_queue; sim_clock_cosched_queue = uptr; pthread_mutex_unlock (&sim_timer_lock); +#else + int32 t; + + t = sim_activate_time (sim_clock_unit); + return sim_activate (uptr, t? t - 1: interval); #endif } return SCPE_OK;