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VAX: Add octaword result information to instruction history

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Also reworked drom result bitfield macros to use standard shift and masks
This commit is contained in:
Mark Pizzolato 2016-05-28 06:03:21 -07:00
parent 4e7fada26c
commit a71a7c6882
4 changed files with 129 additions and 99 deletions
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69
VAX/vax_cpu.c
View file

@ -230,19 +230,6 @@
rh = arh
#define HIST_MIN 64
#define HIST_MAX 250000
typedef struct {
double time;
int32 iPC;
int32 PSL;
int32 opc;
uint8 inst[INST_SIZE];
uint32 opnd[OPND_SIZE];
uint32 res[6];
} InstHistory;
uint32 *M = NULL; /* memory */
int32 R[16]; /* registers */
int32 STK[5]; /* stack pointers */
@ -603,32 +590,35 @@ for ( ;; ) {
if (hst_lnt) {
InstHistory *hlast = &hst[hst_p ? hst_p-1 : hst_lnt -1];
int res = (drom[hlast->opc][0] & DR_M_RESMASK) >> DR_V_RESMASK;
switch ((drom[hlast->opc][0] & DR_M_RESMASK) >> DR_V_RESMASK) {
case RB_O>>DR_V_RESMASK:
switch (DR_GETRES(drom[hlast->opc][0]) << DR_V_RESMASK) {
case RB_O:
case RB_OB:
case RB_OW:
case RB_OL:
case RB_OQ:
break;
case RB_Q>>DR_V_RESMASK:
case RB_Q:
hlast->res[1] = rh;
hlast->res[0] = r;
break;
case RB_B>>DR_V_RESMASK:
case RB_W>>DR_V_RESMASK:
case RB_L>>DR_V_RESMASK:
case RB_B:
case RB_W:
case RB_L:
hlast->res[0] = r;
break;
case RB_R5>>DR_V_RESMASK:
case RB_R5:
hlast->res[5] = R[5];
hlast->res[4] = R[4];
case RB_R3>>DR_V_RESMASK:
case RB_R3:
hlast->res[3] = R[3];
hlast->res[2] = R[2];
case RB_R1>>DR_V_RESMASK:
case RB_R1:
hlast->res[1] = R[1];
case RB_R0>>DR_V_RESMASK:
case RB_R0:
hlast->res[0] = R[0];
break;
case RB_SP>>DR_V_RESMASK:
case RB_SP:
hlast->res[0] = Read (SP, L_LONG, RA);
break;
default:
@ -3104,7 +3094,8 @@ for ( ;; ) {
case ADDH2: case ADDH3: case SUBH2: case SUBH3:
case MULH2: case MULH3: case DIVH2: case DIVH3:
case ACBH: case POLYH: case EMODH:
cc = op_octa (opnd, cc, opc, acc, spec, va);
cc = op_octa (opnd, cc, opc, acc, spec, va,
(hst_lnt ? &hst[hst_p ? hst_p-1 : hst_lnt -1] : NULL) );
if (cc & LSIGN) { /* ACBH branch? */
BRANCHW (brdisp);
cc = cc & CC_MASK; /* mask off flag */
@ -3569,33 +3560,33 @@ for (i = 1, j = 0, more = FALSE; i <= numspec; i++) { /* loop thru specs */
break;
} /* end case */
} /* end for */
if ((line == 0) && ((drom[h->opc][0] & DR_M_RESMASK) >> DR_V_RESMASK)) {
if ((line == 0) && (DR_GETRES(drom[h->opc][0]))) {
fprintf (st, " ->");
switch ((drom[h->opc][0] & DR_M_RESMASK) >> DR_V_RESMASK) {
case RB_O>>DR_V_RESMASK:
switch (DR_GETRES(drom[h->opc][0]) << DR_V_RESMASK) {
case RB_O:
fprintf (st, " %08X %08X %08X %08X", h->res[0], h->res[1], h->res[2], h->res[3]);
break;
case RB_Q>>DR_V_RESMASK:
case RB_Q:
fprintf (st, " %08X %08X", h->res[0], h->res[1]);
break;
case RB_B>>DR_V_RESMASK:
case RB_W>>DR_V_RESMASK:
case RB_L>>DR_V_RESMASK:
case RB_B:
case RB_W:
case RB_L:
fprintf (st, " %08X", h->res[0]);
break;
case RB_R5>>DR_V_RESMASK:
case RB_R3>>DR_V_RESMASK:
case RB_R1>>DR_V_RESMASK:
case RB_R0>>DR_V_RESMASK:
case RB_R5:
case RB_R3:
case RB_R1:
case RB_R0:
if (1) {
static const int rcnts[] = {1, 2, 4, 6};
int i;
for (i = 0; i < rcnts[((drom[h->opc][0] & DR_M_RESMASK) - RB_R0) >> DR_V_RESMASK]; i++)
for (i = 0; i < rcnts[DR_GETRES(drom[h->opc][0]) - DR_GETRES(RB_R0)]; i++)
fprintf (st, " R%d:%08X", i, h->res[i]);
}
break;
case RB_SP>>DR_V_RESMASK:
case RB_SP:
fprintf (st, " SP: %08X", h->res[0]);
break;
default:

41
VAX/vax_defs.h
View file

@ -379,25 +379,30 @@ extern jmp_buf save_env;
#define DR_F 0x80 /* FPD ok flag */
#define DR_NSPMASK 0x07 /* #specifiers */
#define DR_V_USPMASK 4
#define DR_M_USPMASK 0x70 /* #spec, sym_ */
#define DR_M_USPMASK 0x07 /* #spec, sym_ */
#define DR_GETNSP(x) ((x) & DR_NSPMASK)
#define DR_GETUSP(x) (((x) & DR_M_USPMASK) >> DR_V_USPMASK)
#define DR_GETUSP(x) (((x) >> DR_V_USPMASK) & DR_M_USPMASK)
/* Extra bits in the opcode flag word of the Decode ROM array only for history results */
#define DR_V_RESMASK 8
#define DR_M_RESMASK 0x0F00
#define DR_M_RESMASK 0x000F
#define RB_0 (0 << DR_V_RESMASK) /* No Results */
#define RB_B (1 << DR_V_RESMASK) /* Byte Result */
#define RB_W (2 << DR_V_RESMASK) /* Word Result */
#define RB_L (3 << DR_V_RESMASK) /* Long Result */
#define RB_Q (4 << DR_V_RESMASK) /* Quad Result */
#define RB_O (5 << DR_V_RESMASK) /* Octa Result */
#define RB_R0 (6 << DR_V_RESMASK) /* Reg R0 */
#define RB_R1 (7 << DR_V_RESMASK) /* Regs R0-R1 */
#define RB_R3 (8 << DR_V_RESMASK) /* Regs R0-R3 */
#define RB_R5 (9 << DR_V_RESMASK) /* Regs R0-R5 */
#define RB_SP (10 << DR_V_RESMASK) /* @SP */
#define RB_OB (6 << DR_V_RESMASK) /* Octa Byte Result */
#define RB_OW (7 << DR_V_RESMASK) /* Octa Word Result */
#define RB_OL (8 << DR_V_RESMASK) /* Octa Long Result */
#define RB_OQ (9 << DR_V_RESMASK) /* Octa Quad Result */
#define RB_R0 (10 << DR_V_RESMASK) /* Reg R0 */
#define RB_R1 (11 << DR_V_RESMASK) /* Regs R0-R1 */
#define RB_R3 (12 << DR_V_RESMASK) /* Regs R0-R3 */
#define RB_R5 (13 << DR_V_RESMASK) /* Regs R0-R5 */
#define RB_SP (14 << DR_V_RESMASK) /* @SP */
#define DR_GETRES(x) (((x) >> DR_V_RESMASK) & DR_M_RESMASK)
/* Decode ROM: specifier entry */
@ -760,6 +765,24 @@ enum opcodes {
extern uint32 cpu_idle_mask; /* idle mask */
void cpu_idle (void);
/* Instruction History */
#define HIST_MIN 64
#define HIST_MAX 250000
#define OPND_SIZE 16
#define INST_SIZE 52
typedef struct {
double time;
int32 iPC;
int32 PSL;
int32 opc;
uint8 inst[INST_SIZE];
uint32 opnd[OPND_SIZE];
uint32 res[6];
} InstHistory;
/* CPU Register definitions */
extern int32 R[16]; /* registers */
@ -850,7 +873,7 @@ extern void op_polyd (int32 *opnd, int32 acc);
extern void op_polyg (int32 *opnd, int32 acc);
/* vax_octa.c externals */
extern int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va);
extern int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va, InstHistory *hst);
/* vax_cmode.c externals */
extern int32 op_cmode (int32 cc);

90
VAX/vax_octa.c
View file

@ -83,11 +83,11 @@ int32 op_mulh (int32 *opnd, int32 *hf);
int32 op_divh (int32 *opnd, int32 *hf);
int32 op_emodh (int32 *opnd, int32 *hflt, int32 *intgr, int32 *flg);
void op_polyh (int32 *opnd, int32 acc);
void h_write_b (int32 spec, int32 va, int32 val, int32 acc);
void h_write_w (int32 spec, int32 va, int32 val, int32 acc);
void h_write_l (int32 spec, int32 va, int32 val, int32 acc);
void h_write_q (int32 spec, int32 va, int32 vl, int32 vh, int32 acc);
void h_write_o (int32 spec, int32 va, int32 *val, int32 acc);
void h_write_b (int32 spec, int32 va, int32 val, int32 acc, InstHistory *hst);
void h_write_w (int32 spec, int32 va, int32 val, int32 acc, InstHistory *hst);
void h_write_l (int32 spec, int32 va, int32 val, int32 acc, InstHistory *hst);
void h_write_q (int32 spec, int32 va, int32 vl, int32 vh, int32 acc, InstHistory *hst);
void h_write_o (int32 spec, int32 va, int32 *val, int32 acc, InstHistory *hst);
void vax_hadd (UFPH *a, UFPH *b, uint32 mlo);
void vax_hmul (UFPH *a, UFPH *b, uint32 mlo);
void vax_hmod (UFPH *a, int32 *intgr, int32 *flg);
@ -112,7 +112,7 @@ static int32 z_octa[4] = { 0, 0, 0, 0 };
/* Octaword instructions */
int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va)
int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va, InstHistory *hst)
{
int32 r, rh, temp, flg;
int32 r_octa[4];
@ -139,7 +139,7 @@ switch (opc) {
*/
case MOVAO:
h_write_l (spec, va, opnd[0], acc); /* write operand */
h_write_l (spec, va, opnd[0], acc, hst); /* write operand */
CC_IIZP_L (opnd[0]); /* set cc's */
break;
@ -151,7 +151,7 @@ switch (opc) {
*/
case CLRO:
h_write_o (spec, va, z_octa, acc); /* write 0's */
h_write_o (spec, va, z_octa, acc, hst); /* write 0's */
CC_ZZ1P; /* set cc's */
break;
@ -174,17 +174,17 @@ switch (opc) {
*/
case MOVO:
h_write_o (spec, va, opnd, acc); /* write src */
h_write_o (spec, va, opnd, acc, hst); /* write src */
CC_IIZP_O (opnd[0], opnd[1], opnd[2], opnd[3]); /* set cc's */
break;
case MOVH:
if ((r = op_tsth (opnd[0]))) { /* test for 0 */
h_write_o (spec, va, opnd, acc); /* nz, write result */
h_write_o (spec, va, opnd, acc, hst); /* nz, write result */
CC_IIZP_FP (r); /* set cc's */
}
else { /* zero */
h_write_o (spec, va, z_octa, acc); /* write 0 */
h_write_o (spec, va, z_octa, acc, hst); /* write 0 */
cc = (cc & CC_C) | CC_Z; /* set cc's */
}
break;
@ -192,11 +192,11 @@ switch (opc) {
case MNEGH:
if ((r = op_tsth (opnd[0]))) { /* test for 0 */
opnd[0] = opnd[0] ^ FPSIGN; /* nz, invert sign */
h_write_o (spec, va, opnd, acc); /* write result */
h_write_o (spec, va, opnd, acc, hst); /* write result */
CC_IIZZ_FP (opnd[0]); /* set cc's */
}
else { /* zero */
h_write_o (spec, va, z_octa, acc); /* write 0 */
h_write_o (spec, va, z_octa, acc, hst); /* write 0 */
cc = CC_Z; /* set cc's */
}
break;
@ -221,19 +221,19 @@ switch (opc) {
case CVTBH:
r = op_cvtih (SXTB (opnd[0]), r_octa); /* convert */
h_write_o (spec, va, r_octa, acc); /* write reslt */
h_write_o (spec, va, r_octa, acc, hst); /* write reslt */
CC_IIZZ_FP (r); /* set cc's */
break;
case CVTWH:
r = op_cvtih (SXTW (opnd[0]), r_octa); /* convert */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case CVTLH:
r = op_cvtih (opnd[0], r_octa); /* convert */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
@ -247,7 +247,7 @@ switch (opc) {
case CVTHB:
r = op_cvthi (opnd, &flg, opc) & BMASK; /* convert */
h_write_b (spec, va, r, acc); /* write result */
h_write_b (spec, va, r, acc, hst); /* write result */
CC_IIZZ_B (r); /* set cc's */
if (flg) {
V_INTOV;
@ -256,7 +256,7 @@ switch (opc) {
case CVTHW:
r = op_cvthi (opnd, &flg, opc) & WMASK; /* convert */
h_write_w (spec, va, r, acc); /* write result */
h_write_w (spec, va, r, acc, hst); /* write result */
CC_IIZZ_W (r); /* set cc's */
if (flg) {
V_INTOV;
@ -265,7 +265,7 @@ switch (opc) {
case CVTHL: case CVTRHL:
r = op_cvthi (opnd, &flg, opc) & LMASK; /* convert */
h_write_l (spec, va, r, acc); /* write result */
h_write_l (spec, va, r, acc, hst); /* write result */
CC_IIZZ_L (r); /* set cc's */
if (flg) {
V_INTOV;
@ -282,7 +282,7 @@ switch (opc) {
case CVTFH:
r = op_cvtfdh (opnd[0], 0, r_octa); /* convert */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
@ -296,13 +296,13 @@ switch (opc) {
case CVTDH:
r = op_cvtfdh (opnd[0], opnd[1], r_octa); /* convert */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case CVTGH:
r = op_cvtgh (opnd[0], opnd[1], r_octa); /* convert */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
@ -316,19 +316,19 @@ switch (opc) {
case CVTHF:
r = op_cvthfd (opnd, NULL); /* convert */
h_write_l (spec, va, r, acc); /* write result */
h_write_l (spec, va, r, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case CVTHD:
r = op_cvthfd (opnd, &rh); /* convert */
h_write_q (spec, va, r, rh, acc); /* write result */
h_write_q (spec, va, r, rh, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case CVTHG:
r = op_cvthg (opnd, &rh); /* convert */
h_write_q (spec, va, r, rh, acc); /* write result */
h_write_q (spec, va, r, rh, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
@ -351,25 +351,25 @@ switch (opc) {
case ADDH2: case ADDH3:
r = op_addh (opnd, r_octa, FALSE); /* add */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case SUBH2: case SUBH3:
r = op_addh (opnd, r_octa, TRUE); /* subtract */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case MULH2: case MULH3:
r = op_mulh (opnd, r_octa); /* multiply */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
case DIVH2: case DIVH3:
r = op_divh (opnd, r_octa); /* divide */
h_write_o (spec, va, r_octa, acc); /* write result */
h_write_o (spec, va, r_octa, acc, hst); /* write result */
CC_IIZZ_FP (r); /* set cc's */
break;
@ -387,7 +387,7 @@ switch (opc) {
r = op_addh (opnd + 4, r_octa, FALSE); /* add + index */
CC_IIZP_FP (r); /* set cc's */
temp = op_cmph (r_octa, opnd); /* result : limit */
h_write_o (spec, va, r_octa, acc); /* write 2nd */
h_write_o (spec, va, r_octa, acc, hst); /* write 2nd */
if ((temp & CC_Z) || ((opnd[4] & FPSIGN)? /* test br cond */
!(temp & CC_N): (temp & CC_N)))
cc = cc | LSIGN; /* hack for branch */
@ -425,7 +425,7 @@ switch (opc) {
if (opnd[9] >= 0) /* store 1st */
R[opnd[9]] = temp;
else Write (opnd[10], temp, L_LONG, WA);
h_write_o (spec, va, r_octa, acc); /* write 2nd */
h_write_o (spec, va, r_octa, acc, hst); /* write 2nd */
CC_IIZZ_FP (r); /* set cc's */
if (flg) {
V_INTOV;
@ -1163,10 +1163,12 @@ hflt[3] = WORDSWAP (r->frac.f0);
return hflt[0];
}
void h_write_b (int32 spec, int32 va, int32 val, int32 acc)
void h_write_b (int32 spec, int32 va, int32 val, int32 acc, InstHistory *hst)
{
int32 rn;
if (hst)
hst->res[0] = val;
if (spec > (GRN | nPC))
Write (va, val, L_BYTE, WA);
else {
@ -1176,10 +1178,12 @@ else {
return;
}
void h_write_w (int32 spec, int32 va, int32 val, int32 acc)
void h_write_w (int32 spec, int32 va, int32 val, int32 acc, InstHistory *hst)
{
int32 rn;
if (hst)
hst->res[0] = val;
if (spec > (GRN | nPC))
Write (va, val, L_WORD, WA);
else {
@ -1189,18 +1193,24 @@ else {
return;
}
void h_write_l (int32 spec, int32 va, int32 val, int32 acc)
void h_write_l (int32 spec, int32 va, int32 val, int32 acc, InstHistory *hst)
{
if (hst)
hst->res[0] = val;
if (spec > (GRN | nPC))
Write (va, val, L_LONG, WA);
else R[spec & 0xF] = val;
return;
}
void h_write_q (int32 spec, int32 va, int32 vl, int32 vh, int32 acc)
void h_write_q (int32 spec, int32 va, int32 vl, int32 vh, int32 acc, InstHistory *hst)
{
int32 rn, mstat;
if (hst) {
hst->res[0] = vl;
hst->res[1] = vh;
}
if (spec > (GRN | nPC)) {
if ((Test (va + 7, WA, &mstat) >= 0) ||
(Test (va, WA, &mstat) < 0))
@ -1217,10 +1227,16 @@ else {
return;
}
void h_write_o (int32 spec, int32 va, int32 *val, int32 acc)
void h_write_o (int32 spec, int32 va, int32 *val, int32 acc, InstHistory *hst)
{
int32 rn, mstat;
if (hst) {
hst->res[0] = val[0];
hst->res[1] = val[0];
hst->res[2] = val[0];
hst->res[3] = val[0];
}
if (spec > (GRN | nPC)) {
if ((Test (va + 15, WA, &mstat) >= 0) ||
(Test (va, WA, &mstat) < 0))
@ -1243,7 +1259,7 @@ return;
#else
int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va)
int32 op_octa (int32 *opnd, int32 cc, int32 opc, int32 acc, int32 spec, int32 va, InstHistory *hst)
{
RSVD_INST_FAULT;
return cc;

28
VAX/vax_sys.c
View file

@ -200,7 +200,7 @@ const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
{2 +RB_L, RF, WL, 0, 0, 0, 0}, /* MNEGF */
{1, RF, 0, 0, 0, 0, 0}, /* TSTF */
{5, RF, RB, RF, WL, WL, 0}, /* EMODF */
{3 +RB_R0, RF, RW, AB, 0, 0, 0}, /* POLYF */
{3 +RB_R3, RF, RW, AB, 0, 0, 0}, /* POLYF */
{2 +RB_Q, RF, WQ, 0, 0, 0, 0}, /* CVTFD */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
{2 +RB_W, RW, WW, 0, 0, 0, 0}, /* ADAWI */
@ -232,7 +232,7 @@ const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
{2 +RB_Q, RD, WQ, 0, 0, 0, 0}, /* MNEGD */
{1, RD, 0, 0, 0, 0, 0}, /* TSTD */
{5, RD, RB, RD, WL, WQ, 0}, /* EMODD */
{3 +RB_R1, RD, RW, AB, 0, 0, 0}, /* POLYD */
{3 +RB_R5, RD, RW, AB, 0, 0, 0}, /* POLYD */
{2 +RB_L, RD, WL, 0, 0, 0, 0}, /* CVTDF */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
{3 +RB_L, RB, RL, WL, 0, 0, 0}, /* ASHL */
@ -456,7 +456,7 @@ const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
{2 +RB_Q, RG, WQ, 0, 0, 0, 0}, /* MNEGG */
{1, RG, 0, 0, 0, 0, 0}, /* TSTG */
{5, RG, RW, RG, WL, WQ, 0}, /* EMODG */
{3 +RB_R1, RG, RW, AB, 0, 0, 0}, /* POLYG */
{3 +RB_R5, RG, RW, AB, 0, 0, 0}, /* POLYG */
{ODC(2) +RB_O, RG, WO, 0, 0, 0, 0}, /* CVTGH */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
@ -475,21 +475,21 @@ const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
{ODC(3) +RB_O, RH, RH, WO, 0, 0, 0}, /* MULH3 */
{ODC(2) +RB_O, RH, MO, 0, 0, 0, 0}, /* DIVH2 */
{ODC(3) +RB_O, RH, RH, WO, 0, 0, 0}, /* DIVH3 */
{ODC(2) +RB_B, RH, WB, 0, 0, 0, 0}, /* CVTHB */
{ODC(2) +RB_W, RH, WW, 0, 0, 0, 0}, /* CVTHW */
{ODC(2) +RB_L, RH, WL, 0, 0, 0, 0}, /* CVTHL */
{ODC(2) +RB_O, RH, WL, 0, 0, 0, 0}, /* CVTRHL */
{ODC(2) +RB_OB, RH, WB, 0, 0, 0, 0}, /* CVTHB */
{ODC(2) +RB_OW, RH, WW, 0, 0, 0, 0}, /* CVTHW */
{ODC(2) +RB_OL, RH, WL, 0, 0, 0, 0}, /* CVTHL */
{ODC(2) +RB_OL, RH, WL, 0, 0, 0, 0}, /* CVTRHL */
{ODC(2) +RB_O, RB, WO, 0, 0, 0, 0}, /* CVTBH */
{ODC(2) +RB_O, RW, WO, 0, 0, 0, 0}, /* CVTWH */
{ODC(2) +RB_O, RL, WO, 0, 0, 0, 0}, /* CVTLH */
{ODC(4), RH, RH, MO, BW, 0, 0}, /* ACBH */
{ODC(4) +RB_O, RH, RH, MO, BW, 0, 0}, /* ACBH */
{ODC(2) +RB_O, RH, RO, 0, 0, 0, 0}, /* MOVH */
{ODC(2), RH, RH, 0, 0, 0, 0}, /* CMPH */
{ODC(2) +RB_O, RH, WO, 0, 0, 0, 0}, /* MNEGH */
{ODC(1), RH, 0, 0, 0, 0, 0}, /* TSTH */
{ODC(5), RH, RW, RH, WL, WO, 0}, /* EMODH */
{ODC(3) +RB_R3, RH, RW, AB, 0, 0, 0}, /* POLYH */
{ODC(2) +RB_Q, RH, WQ, 0, 0, 0, 0}, /* CVTHG */
{ODC(5) +RB_O, RH, RW, RH, WL, WO, 0}, /* EMODH */
{ODC(3) +RB_R5, RH, RW, AB, 0, 0, 0}, /* POLYH */
{ODC(2) +RB_OQ, RH, WQ, 0, 0, 0, 0}, /* CVTHG */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
@ -497,7 +497,7 @@ const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
{0, 0, 0, 0, 0, 0, 0}, /* reserved */
{ODC(1) +RB_O, WO, 0, 0, 0, 0, 0}, /* CLRO */
{ODC(2) +RB_O, RO, RO, 0, 0, 0, 0}, /* MOVO */
{ODC(2) +RB_L, AO, WL, 0, 0, 0, 0}, /* MOVAO*/
{ODC(2) +RB_OL, AO, WL, 0, 0, 0, 0}, /* MOVAO*/
{ODC(1) +RB_SP, AO, 0, 0, 0, 0, 0}, /* PUSHAO*/
{0, 0, 0, 0, 0, 0, 0}, /* 180-18F */
{0, 0, 0, 0, 0, 0, 0},
@ -617,8 +617,8 @@ const uint16 drom[NUM_INST][MAX_SPEC + 1] = {
{0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0},
{ODC(2) +RB_B, RH, WL, 0, 0, 0, 0}, /* CVTHF */
{ODC(2) +RB_Q, RH, WQ, 0, 0, 0, 0}, /* CVTHD */
{ODC(2) +RB_OL, RH, WL, 0, 0, 0, 0}, /* CVTHF */
{ODC(2) +RB_OQ, RH, WQ, 0, 0, 0, 0}, /* CVTHD */
{0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0},