PDP11: Change all boot routines to use WrMemW() to access memory
This commit is contained in:
parent
488b91a62c
commit
ac40e513cb
19 changed files with 62 additions and 61 deletions
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@ -1618,9 +1618,9 @@ t_stat hk_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & CS2_M_UNIT;
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WrMemW (BOOT_UNIT, unitno & CS2_M_UNIT);
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M[BOOT_CSR >> 1] = hk_dib.ba & DMASK;
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WrMemW (BOOT_CSR, hk_dib.ba & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -468,8 +468,8 @@ t_stat rf_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_CSR >> 1] = (rf_dib.ba & DMASK) + 012;
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WrMemW (BOOT_CSR, (rf_dib.ba & DMASK) + 012);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -563,7 +563,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
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if (pbc > (bc - i)) /* limit to rem xfr */
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if (pbc > (bc - i)) /* limit to rem xfr */
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pbc = bc - i;
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pbc = bc - i;
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for (j = 0; j < pbc; j = j + 2) { /* loop by words */
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for (j = 0; j < pbc; j = j + 2) { /* loop by words */
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*buf++ = M[pa >> 1]; /* fetch word */
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*buf++ = RdMemW (pa); /* fetch word */
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if (!(massbus[mb].cs2 & CS2_UAI)) { /* if not inhb */
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if (!(massbus[mb].cs2 & CS2_UAI)) { /* if not inhb */
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ba = ba + 2; /* incr ba, pa */
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ba = ba + 2; /* incr ba, pa */
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pa = pa + 2;
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pa = pa + 2;
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@ -602,7 +602,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
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if (pbc > (bc - i)) /* limit to rem xfr */
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if (pbc > (bc - i)) /* limit to rem xfr */
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pbc = bc - i;
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pbc = bc - i;
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for (j = 0; j < pbc; j = j + 2) { /* loop by words */
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for (j = 0; j < pbc; j = j + 2) { /* loop by words */
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M[pa >> 1] = *buf++; /* put word */
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WrMemW (pa, *buf++); /* put word */
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if (!(massbus[mb].cs2 & CS2_UAI)) { /* if not inhb */
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if (!(massbus[mb].cs2 & CS2_UAI)) { /* if not inhb */
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ba = ba + 2; /* incr ba, pa */
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ba = ba + 2; /* incr ba, pa */
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pa = pa + 2;
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pa = pa + 2;
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@ -641,7 +641,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
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pbc = bc - i;
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pbc = bc - i;
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for (j = 0; j < pbc; j = j + 2) { /* loop by words */
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for (j = 0; j < pbc; j = j + 2) { /* loop by words */
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massbus[mb].db = *buf++; /* get dev word */
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massbus[mb].db = *buf++; /* get dev word */
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if (M[pa >> 1] != massbus[mb].db) { /* miscompare? */
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if (RdMemW (pa) != massbus[mb].db) { /* miscompare? */
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mba_set_cs2 (CS2_WCE, mb); /* set error */
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mba_set_cs2 (CS2_WCE, mb); /* set error */
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massbus[mb].cs3 = massbus[mb].cs3 | /* set even/odd */
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massbus[mb].cs3 = massbus[mb].cs3 | /* set even/odd */
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((pa & 1)? CS3_WCO: CS3_WCE);
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((pa & 1)? CS3_WCO: CS3_WCE);
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@ -931,9 +931,9 @@ t_stat rk_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & RK_M_NUMDR;
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WrMemW (BOOT_UNIT, unitno & RK_M_NUMDR);
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M[BOOT_CSR >> 1] = (rk_dib.ba & DMASK) + 012;
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WrMemW (BOOT_CSR, (rk_dib.ba & DMASK) + 012);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1224,9 +1224,9 @@ t_stat rl_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & RLCS_M_DRIVE;
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WrMemW (BOOT_UNIT, unitno & RLCS_M_DRIVE);
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M[BOOT_CSR >> 1] = rl_dib.ba & 0177777;
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WrMemW (BOOT_CSR, rl_dib.ba & 0177777);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1479,12 +1479,13 @@ size_t i;
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UNIT *uptr = dptr->units + unitno;
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UNIT *uptr = dptr->units + unitno;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & (RP_NUMDR - 1);
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WrMemW (BOOT_UNIT, unitno & (RP_NUMDR - 1));
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M[BOOT_CSR >> 1] = mba_get_csr (rp_dib.ba) & DMASK;
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WrMemW (BOOT_CSR, mba_get_csr (rp_dib.ba) & DMASK);
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if (drv_tab[GET_DTYPE (uptr->flags)].ctrl == RP_CTRL)
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if (drv_tab[GET_DTYPE (uptr->flags)].ctrl == RP_CTRL)
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M[BOOT_START >> 1] = 042102; /* "BD" */
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WrMemW (BOOT_START, 042102); /* "BD" */
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else M[BOOT_START >> 1] = 042122; /* "RD" */
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else
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WrMemW (BOOT_START, 042122); /* "RD" */
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -3096,9 +3096,9 @@ DIB *dibp = (DIB *) dptr->ctxt;
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UNIT *uptr = &dptr->units[unitno];
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UNIT *uptr = &dptr->units[unitno];
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = (uint16)uptr->unit_plug;
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WrMemW (BOOT_UNIT, (uint16)uptr->unit_plug);
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M[BOOT_CSR >> 1] = dibp->ba & DMASK;
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WrMemW (BOOT_CSR, dibp->ba & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -691,9 +691,9 @@ t_stat rs_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & (RS_NUMDR - 1);
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WrMemW (BOOT_UNIT, unitno & (RS_NUMDR - 1));
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M[BOOT_CSR >> 1] = mba_get_csr (rs_dib.ba) & DMASK;
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WrMemW (BOOT_CSR, mba_get_csr (rs_dib.ba) & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -526,9 +526,9 @@ t_stat rx_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & RX_M_NUMDR;
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WrMemW (BOOT_UNIT, unitno & RX_M_NUMDR);
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M[BOOT_CSR >> 1] = rx_dib.ba & DMASK;
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WrMemW (BOOT_CSR, rx_dib.ba & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -693,9 +693,9 @@ size_t i;
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if ((ry_unit[unitno & RX_M_NUMDR].flags & UNIT_DEN) == 0)
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if ((ry_unit[unitno & RX_M_NUMDR].flags & UNIT_DEN) == 0)
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return SCPE_NOFNC;
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return SCPE_NOFNC;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & RX_M_NUMDR;
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WrMemW (BOOT_UNIT, unitno & RX_M_NUMDR);
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M[BOOT_CSR >> 1] = ry_dib.ba & DMASK;
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WrMemW (BOOT_CSR, ry_dib.ba & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -661,8 +661,8 @@ t_stat ta_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_CSR >> 1] = ta_dib.ba & DMASK;
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WrMemW (BOOT_CSR, ta_dib.ba & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1236,9 +1236,9 @@ size_t i;
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dt_unit[unitno].pos = DT_EZLIN;
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dt_unit[unitno].pos = DT_EZLIN;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & DT_M_NUMDR;
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WrMemW (BOOT_UNIT, unitno & DT_M_NUMDR);
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M[BOOT_CSR >> 1] = (dt_dib.ba & DMASK) + 02;
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WrMemW (BOOT_CSR, (dt_dib.ba & DMASK) + 02);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1590,9 +1590,9 @@ static t_stat td_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & 1;
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WrMemW (BOOT_UNIT, unitno & 1);
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M[BOOT_CSR >> 1] = (td_dib.ba & DMASK) + (unitno >> 1) * 010;
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WrMemW (BOOT_CSR, (td_dib.ba & DMASK) + (unitno >> 1) * 010);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -720,14 +720,14 @@ size_t i;
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sim_tape_rewind (&tm_unit[unitno]);
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sim_tape_rewind (&tm_unit[unitno]);
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if (sim_switches & SWMASK ('O')) {
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if (sim_switches & SWMASK ('O')) {
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for (i = 0; i < BOOT1_LEN; i++)
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for (i = 0; i < BOOT1_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot1_rom[i];
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WrMemW (BOOT_START + (2 * i), boot1_rom[i]);
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}
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}
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else {
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else {
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for (i = 0; i < BOOT2_LEN; i++)
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for (i = 0; i < BOOT2_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot2_rom[i];
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WrMemW (BOOT_START + (2 * i), boot2_rom[i]);
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}
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}
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M[BOOT_UNIT >> 1] = (uint16)unitno;
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WrMemW (BOOT_UNIT, (uint16)unitno);
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M[BOOT_CSR >> 1] = (tm_dib.ba & DMASK) + 06;
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WrMemW (BOOT_CSR, (tm_dib.ba & DMASK) + 06);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -2240,9 +2240,9 @@ size_t i;
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UNIT *uptr = &dptr->units[unitno];
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UNIT *uptr = &dptr->units[unitno];
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = (uint16)uptr->unit_plug;
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WrMemW (BOOT_UNIT, (uint16)uptr->unit_plug);
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M[BOOT_CSR >> 1] = tq_dib.ba & DMASK;
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WrMemW (BOOT_CSR, tq_dib.ba & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1170,9 +1170,9 @@ size_t i;
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sim_tape_rewind (&ts_unit);
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sim_tape_rewind (&ts_unit);
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_CSR0 >> 1] = ts_dib.ba & DMASK;
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WrMemW (BOOT_CSR0, ts_dib.ba & DMASK);
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M[BOOT_CSR1 >> 1] = (ts_dib.ba & DMASK) + 02;
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WrMemW (BOOT_CSR1, (ts_dib.ba & DMASK) + 02);
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cpu_set_boot (BOOT_START);
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cpu_set_boot (BOOT_START);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -1054,9 +1054,9 @@ t_stat tu_boot (int32 unitno, DEVICE *dptr)
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size_t i;
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size_t i;
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for (i = 0; i < BOOT_LEN; i++)
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for (i = 0; i < BOOT_LEN; i++)
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M[(BOOT_START >> 1) + i] = boot_rom[i];
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WrMemW (BOOT_START + (2 * i), boot_rom[i]);
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M[BOOT_UNIT >> 1] = unitno & (TU_NUMDR - 1);
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WrMemW (BOOT_UNIT, unitno & (TU_NUMDR - 1));
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M[BOOT_CSR >> 1] = mba_get_csr (tu_dib.ba) & DMASK;
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WrMemW (BOOT_CSR, mba_get_csr (tu_dib.ba) & DMASK);
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cpu_set_boot (BOOT_ENTRY);
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cpu_set_boot (BOOT_ENTRY);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -731,14 +731,14 @@ vt_boot(int32 unit, DEVICE *dptr)
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sim_set_memory_load_file (NULL, 0);
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sim_set_memory_load_file (NULL, 0);
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/* Lunar Lander presumes a VT device vector base of 320 */
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/* Lunar Lander presumes a VT device vector base of 320 */
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if (0320 != vt_dib.vec) { /* If that is not the case, then copy the 320 vectors to the right place */
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if (0320 != vt_dib.vec) { /* If that is not the case, then copy the 320 vectors to the right place */
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M[(vt_dib.vec >> 1) + 0] = M[(0320 >> 1) + 0];
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WrMemW (vt_dib.vec + 000, RdMemW (0320 + 0));
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M[(vt_dib.vec >> 1) + 1] = M[(0320 >> 1) + 1];
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WrMemW (vt_dib.vec + 002, RdMemW (0320 + 2));
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M[(vt_dib.vec >> 1) + 2] = M[(0324 >> 1) + 0];
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WrMemW (vt_dib.vec + 004, RdMemW (0324 + 0));
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M[(vt_dib.vec >> 1) + 3] = M[(0324 >> 1) + 1];
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WrMemW (vt_dib.vec + 006, RdMemW (0324 + 2));
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M[(vt_dib.vec >> 1) + 4] = M[(0330 >> 1) + 0];
|
WrMemW (vt_dib.vec + 010, RdMemW (0330 + 0));
|
||||||
M[(vt_dib.vec >> 1) + 5] = M[(0330 >> 1) + 1];
|
WrMemW (vt_dib.vec + 012, RdMemW (0330 + 2));
|
||||||
M[(vt_dib.vec >> 1) + 6] = M[(0334 >> 1) + 0];
|
WrMemW (vt_dib.vec + 014, RdMemW (0334 + 0));
|
||||||
M[(vt_dib.vec >> 1) + 7] = M[(0334 >> 1) + 1];
|
WrMemW (vt_dib.vec + 016, RdMemW (0334 + 2));
|
||||||
}
|
}
|
||||||
cpu_set_boot (saved_PC);
|
cpu_set_boot (saved_PC);
|
||||||
set_cmd (0, "VT SCALE=1");
|
set_cmd (0, "VT SCALE=1");
|
||||||
|
|
|
@ -3153,7 +3153,7 @@ DIB *dib = (DIB *)dptr->ctxt;
|
||||||
extern int32 REGFILE[6][2]; /* R0-R5, two sets */
|
extern int32 REGFILE[6][2]; /* R0-R5, two sets */
|
||||||
|
|
||||||
for (i = 0; i < BOOT_LEN; i++)
|
for (i = 0; i < BOOT_LEN; i++)
|
||||||
M[(BOOT_START >> 1) + i] = boot_rom[i];
|
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
|
||||||
cpu_set_boot (BOOT_ENTRY);
|
cpu_set_boot (BOOT_ENTRY);
|
||||||
REGFILE[0][0] = ((dptr == &xq_dev) ? 4 : 5);
|
REGFILE[0][0] = ((dptr == &xq_dev) ? 4 : 5);
|
||||||
return SCPE_OK;
|
return SCPE_OK;
|
||||||
|
|
Loading…
Add table
Reference in a new issue