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PDP11: Change all boot routines to use WrMemW() to access memory

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This commit is contained in:
Mark Pizzolato 2018-09-09 19:08:33 -07:00
parent 488b91a62c
commit ac40e513cb
19 changed files with 62 additions and 61 deletions
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6
PDP11/pdp11_hk.c
View file

@ -1618,9 +1618,9 @@ t_stat hk_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & CS2_M_UNIT;
M[BOOT_CSR >> 1] = hk_dib.ba & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & CS2_M_UNIT);
WrMemW (BOOT_CSR, hk_dib.ba & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

4
PDP11/pdp11_rf.c
View file

@ -468,8 +468,8 @@ t_stat rf_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_CSR >> 1] = (rf_dib.ba & DMASK) + 012;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_CSR, (rf_dib.ba & DMASK) + 012);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_rh.c
View file

@ -563,7 +563,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
if (pbc > (bc - i)) /* limit to rem xfr */
pbc = bc - i;
for (j = 0; j < pbc; j = j + 2) { /* loop by words */
*buf++ = M[pa >> 1]; /* fetch word */
*buf++ = RdMemW (pa); /* fetch word */
if (!(massbus[mb].cs2 & CS2_UAI)) { /* if not inhb */
ba = ba + 2; /* incr ba, pa */
pa = pa + 2;
@ -602,7 +602,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
if (pbc > (bc - i)) /* limit to rem xfr */
pbc = bc - i;
for (j = 0; j < pbc; j = j + 2) { /* loop by words */
M[pa >> 1] = *buf++; /* put word */
WrMemW (pa, *buf++); /* put word */
if (!(massbus[mb].cs2 & CS2_UAI)) { /* if not inhb */
ba = ba + 2; /* incr ba, pa */
pa = pa + 2;
@ -641,7 +641,7 @@ for (i = 0; i < bc; i = i + pbc) { /* loop by pages */
pbc = bc - i;
for (j = 0; j < pbc; j = j + 2) { /* loop by words */
massbus[mb].db = *buf++; /* get dev word */
if (M[pa >> 1] != massbus[mb].db) { /* miscompare? */
if (RdMemW (pa) != massbus[mb].db) { /* miscompare? */
mba_set_cs2 (CS2_WCE, mb); /* set error */
massbus[mb].cs3 = massbus[mb].cs3 | /* set even/odd */
((pa & 1)? CS3_WCO: CS3_WCE);

6
PDP11/pdp11_rk.c
View file

@ -931,9 +931,9 @@ t_stat rk_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & RK_M_NUMDR;
M[BOOT_CSR >> 1] = (rk_dib.ba & DMASK) + 012;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & RK_M_NUMDR);
WrMemW (BOOT_CSR, (rk_dib.ba & DMASK) + 012);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_rl.c
View file

@ -1224,9 +1224,9 @@ t_stat rl_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & RLCS_M_DRIVE;
M[BOOT_CSR >> 1] = rl_dib.ba & 0177777;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & RLCS_M_DRIVE);
WrMemW (BOOT_CSR, rl_dib.ba & 0177777);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

11
PDP11/pdp11_rp.c
View file

@ -1479,12 +1479,13 @@ size_t i;
UNIT *uptr = dptr->units + unitno;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & (RP_NUMDR - 1);
M[BOOT_CSR >> 1] = mba_get_csr (rp_dib.ba) & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & (RP_NUMDR - 1));
WrMemW (BOOT_CSR, mba_get_csr (rp_dib.ba) & DMASK);
if (drv_tab[GET_DTYPE (uptr->flags)].ctrl == RP_CTRL)
M[BOOT_START >> 1] = 042102; /* "BD" */
else M[BOOT_START >> 1] = 042122; /* "RD" */
WrMemW (BOOT_START, 042102); /* "BD" */
else
WrMemW (BOOT_START, 042122); /* "RD" */
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_rq.c
View file

@ -3096,9 +3096,9 @@ DIB *dibp = (DIB *) dptr->ctxt;
UNIT *uptr = &dptr->units[unitno];
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = (uint16)uptr->unit_plug;
M[BOOT_CSR >> 1] = dibp->ba & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, (uint16)uptr->unit_plug);
WrMemW (BOOT_CSR, dibp->ba & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_rs.c
View file

@ -691,9 +691,9 @@ t_stat rs_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & (RS_NUMDR - 1);
M[BOOT_CSR >> 1] = mba_get_csr (rs_dib.ba) & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & (RS_NUMDR - 1));
WrMemW (BOOT_CSR, mba_get_csr (rs_dib.ba) & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_rx.c
View file

@ -526,9 +526,9 @@ t_stat rx_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & RX_M_NUMDR;
M[BOOT_CSR >> 1] = rx_dib.ba & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & RX_M_NUMDR);
WrMemW (BOOT_CSR, rx_dib.ba & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_ry.c
View file

@ -693,9 +693,9 @@ size_t i;
if ((ry_unit[unitno & RX_M_NUMDR].flags & UNIT_DEN) == 0)
return SCPE_NOFNC;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & RX_M_NUMDR;
M[BOOT_CSR >> 1] = ry_dib.ba & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & RX_M_NUMDR);
WrMemW (BOOT_CSR, ry_dib.ba & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

4
PDP11/pdp11_ta.c
View file

@ -661,8 +661,8 @@ t_stat ta_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_CSR >> 1] = ta_dib.ba & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_CSR, ta_dib.ba & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_tc.c
View file

@ -1236,9 +1236,9 @@ size_t i;
dt_unit[unitno].pos = DT_EZLIN;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & DT_M_NUMDR;
M[BOOT_CSR >> 1] = (dt_dib.ba & DMASK) + 02;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & DT_M_NUMDR);
WrMemW (BOOT_CSR, (dt_dib.ba & DMASK) + 02);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_td.c
View file

@ -1590,9 +1590,9 @@ static t_stat td_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & 1;
M[BOOT_CSR >> 1] = (td_dib.ba & DMASK) + (unitno >> 1) * 010;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & 1);
WrMemW (BOOT_CSR, (td_dib.ba & DMASK) + (unitno >> 1) * 010);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

8
PDP11/pdp11_tm.c
View file

@ -720,14 +720,14 @@ size_t i;
sim_tape_rewind (&tm_unit[unitno]);
if (sim_switches & SWMASK ('O')) {
for (i = 0; i < BOOT1_LEN; i++)
M[(BOOT_START >> 1) + i] = boot1_rom[i];
WrMemW (BOOT_START + (2 * i), boot1_rom[i]);
}
else {
for (i = 0; i < BOOT2_LEN; i++)
M[(BOOT_START >> 1) + i] = boot2_rom[i];
WrMemW (BOOT_START + (2 * i), boot2_rom[i]);
}
M[BOOT_UNIT >> 1] = (uint16)unitno;
M[BOOT_CSR >> 1] = (tm_dib.ba & DMASK) + 06;
WrMemW (BOOT_UNIT, (uint16)unitno);
WrMemW (BOOT_CSR, (tm_dib.ba & DMASK) + 06);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_tq.c
View file

@ -2240,9 +2240,9 @@ size_t i;
UNIT *uptr = &dptr->units[unitno];
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = (uint16)uptr->unit_plug;
M[BOOT_CSR >> 1] = tq_dib.ba & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, (uint16)uptr->unit_plug);
WrMemW (BOOT_CSR, tq_dib.ba & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

6
PDP11/pdp11_ts.c
View file

@ -1170,9 +1170,9 @@ size_t i;
sim_tape_rewind (&ts_unit);
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_CSR0 >> 1] = ts_dib.ba & DMASK;
M[BOOT_CSR1 >> 1] = (ts_dib.ba & DMASK) + 02;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_CSR0, ts_dib.ba & DMASK);
WrMemW (BOOT_CSR1, (ts_dib.ba & DMASK) + 02);
cpu_set_boot (BOOT_START);
return SCPE_OK;
}

6
PDP11/pdp11_tu.c
View file

@ -1054,9 +1054,9 @@ t_stat tu_boot (int32 unitno, DEVICE *dptr)
size_t i;
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
M[BOOT_UNIT >> 1] = unitno & (TU_NUMDR - 1);
M[BOOT_CSR >> 1] = mba_get_csr (tu_dib.ba) & DMASK;
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
WrMemW (BOOT_UNIT, unitno & (TU_NUMDR - 1));
WrMemW (BOOT_CSR, mba_get_csr (tu_dib.ba) & DMASK);
cpu_set_boot (BOOT_ENTRY);
return SCPE_OK;
}

16
PDP11/pdp11_vt.c
View file

@ -731,14 +731,14 @@ vt_boot(int32 unit, DEVICE *dptr)
sim_set_memory_load_file (NULL, 0);
/* Lunar Lander presumes a VT device vector base of 320 */
if (0320 != vt_dib.vec) { /* If that is not the case, then copy the 320 vectors to the right place */
M[(vt_dib.vec >> 1) + 0] = M[(0320 >> 1) + 0];
M[(vt_dib.vec >> 1) + 1] = M[(0320 >> 1) + 1];
M[(vt_dib.vec >> 1) + 2] = M[(0324 >> 1) + 0];
M[(vt_dib.vec >> 1) + 3] = M[(0324 >> 1) + 1];
M[(vt_dib.vec >> 1) + 4] = M[(0330 >> 1) + 0];
M[(vt_dib.vec >> 1) + 5] = M[(0330 >> 1) + 1];
M[(vt_dib.vec >> 1) + 6] = M[(0334 >> 1) + 0];
M[(vt_dib.vec >> 1) + 7] = M[(0334 >> 1) + 1];
WrMemW (vt_dib.vec + 000, RdMemW (0320 + 0));
WrMemW (vt_dib.vec + 002, RdMemW (0320 + 2));
WrMemW (vt_dib.vec + 004, RdMemW (0324 + 0));
WrMemW (vt_dib.vec + 006, RdMemW (0324 + 2));
WrMemW (vt_dib.vec + 010, RdMemW (0330 + 0));
WrMemW (vt_dib.vec + 012, RdMemW (0330 + 2));
WrMemW (vt_dib.vec + 014, RdMemW (0334 + 0));
WrMemW (vt_dib.vec + 016, RdMemW (0334 + 2));
}
cpu_set_boot (saved_PC);
set_cmd (0, "VT SCALE=1");

2
PDP11/pdp11_xq.c
View file

@ -3153,7 +3153,7 @@ DIB *dib = (DIB *)dptr->ctxt;
extern int32 REGFILE[6][2]; /* R0-R5, two sets */
for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i];
WrMemW (BOOT_START + (2 * i), boot_rom[i]);
cpu_set_boot (BOOT_ENTRY);
REGFILE[0][0] = ((dptr == &xq_dev) ? 4 : 5);
return SCPE_OK;