VAX: Add slightly more precise TODR initialization logic with debug support

This commit is contained in:
Mark Pizzolato 2017-01-19 16:56:40 -08:00
parent 1bb42b83ef
commit acbb92091b
5 changed files with 48 additions and 25 deletions

View file

@ -305,12 +305,19 @@ REG clk_reg[] = {
{ NULL } { NULL }
}; };
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB todr_deb[] = {
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 }
};
DEVICE clk_dev = { DEVICE clk_dev = {
"TODR", &clk_unit, clk_reg, NULL, "TODR", &clk_unit, clk_reg, NULL,
1, 0, 8, 4, 0, 32, 1, 0, 8, 4, 0, 32,
NULL, NULL, &clk_reset, NULL, NULL, &clk_reset,
NULL, &clk_attach, &clk_detach, NULL, &clk_attach, &clk_detach,
NULL, 0, 0, NULL, NULL, NULL, &clk_help, NULL, NULL, NULL, DEV_DEBUG, 0, todr_deb, NULL, NULL, &clk_help, NULL, NULL,
&clk_description &clk_description
}; };
@ -330,14 +337,12 @@ REG tmr_reg[] = {
#define TMR_DB_TICK 0x02 /* Ticks */ #define TMR_DB_TICK 0x02 /* Ticks */
#define TMR_DB_SCHED 0x04 /* Scheduling */ #define TMR_DB_SCHED 0x04 /* Scheduling */
#define TMR_DB_INT 0x08 /* Interrupts */ #define TMR_DB_INT 0x08 /* Interrupts */
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB tmr_deb[] = { DEBTAB tmr_deb[] = {
{ "REG", TMR_DB_REG, "Register Access"}, { "REG", TMR_DB_REG, "Register Access"},
{ "TICK", TMR_DB_TICK, "Ticks"}, { "TICK", TMR_DB_TICK, "Ticks"},
{ "SCHED", TMR_DB_SCHED, "Scheduling"}, { "SCHED", TMR_DB_SCHED, "Scheduling"},
{ "INT", TMR_DB_INT, "Interrupts"}, { "INT", TMR_DB_INT, "Interrupts"},
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 } { NULL, 0 }
}; };
@ -922,7 +927,7 @@ sim_rtcn_get_time(&now, TMR_CLK); /* get curr time */
base.tv_sec = toy->toy_gmtbase; base.tv_sec = toy->toy_gmtbase;
base.tv_nsec = toy->toy_gmtbasemsec * 1000000; base.tv_nsec = toy->toy_gmtbasemsec * 1000000;
sim_timespec_diff (&val, &now, &base); sim_timespec_diff (&val, &now, &base);
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000))); sim_debug (TMR_DB_TODR, &clk_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000)));
return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */ return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */
} }
@ -942,7 +947,7 @@ sim_timespec_diff (&base, &now, &val); /* base = now - data */
toy->toy_gmtbase = (uint32)base.tv_sec; toy->toy_gmtbase = (uint32)base.tv_sec;
tbase = (time_t)base.tv_sec; tbase = (time_t)base.tv_sec;
toy->toy_gmtbasemsec = base.tv_nsec/1000000; toy->toy_gmtbasemsec = base.tv_nsec/1000000;
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000)); sim_debug (TMR_DB_TODR, &clk_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000));
} }
t_stat todr_resync (void) t_stat todr_resync (void)

View file

@ -298,12 +298,19 @@ REG clk_reg[] = {
{ NULL } { NULL }
}; };
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB todr_deb[] = {
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 }
};
DEVICE clk_dev = { DEVICE clk_dev = {
"TODR", &clk_unit, clk_reg, NULL, "TODR", &clk_unit, clk_reg, NULL,
1, 0, 8, 4, 0, 32, 1, 0, 8, 4, 0, 32,
NULL, NULL, &clk_reset, NULL, NULL, &clk_reset,
NULL, &clk_attach, &clk_detach, NULL, &clk_attach, &clk_detach,
NULL, 0, 0, NULL, NULL, NULL, &clk_help, NULL, NULL, NULL, DEV_DEBUG, 0, todr_deb, NULL, NULL, &clk_help, NULL, NULL,
&clk_description &clk_description
}; };
@ -323,14 +330,12 @@ REG tmr_reg[] = {
#define TMR_DB_TICK 0x02 /* Ticks */ #define TMR_DB_TICK 0x02 /* Ticks */
#define TMR_DB_SCHED 0x04 /* Scheduling */ #define TMR_DB_SCHED 0x04 /* Scheduling */
#define TMR_DB_INT 0x08 /* Interrupts */ #define TMR_DB_INT 0x08 /* Interrupts */
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB tmr_deb[] = { DEBTAB tmr_deb[] = {
{ "REG", TMR_DB_REG, "Register Access"}, { "REG", TMR_DB_REG, "Register Access"},
{ "TICK", TMR_DB_TICK, "Ticks"}, { "TICK", TMR_DB_TICK, "Ticks"},
{ "SCHED", TMR_DB_SCHED, "Scheduling"}, { "SCHED", TMR_DB_SCHED, "Scheduling"},
{ "INT", TMR_DB_INT, "Interrupts"}, { "INT", TMR_DB_INT, "Interrupts"},
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 } { NULL, 0 }
}; };
@ -919,7 +924,7 @@ sim_rtcn_get_time(&now, TMR_CLK); /* get curr time */
base.tv_sec = toy->toy_gmtbase; base.tv_sec = toy->toy_gmtbase;
base.tv_nsec = toy->toy_gmtbasemsec * 1000000; base.tv_nsec = toy->toy_gmtbasemsec * 1000000;
sim_timespec_diff (&val, &now, &base); sim_timespec_diff (&val, &now, &base);
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000))); sim_debug (TMR_DB_TODR, &clk_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000)));
return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */ return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */
} }
@ -939,7 +944,7 @@ sim_timespec_diff (&base, &now, &val); /* base = now - data */
toy->toy_gmtbase = (uint32)base.tv_sec; toy->toy_gmtbase = (uint32)base.tv_sec;
tbase = (time_t)base.tv_sec; tbase = (time_t)base.tv_sec;
toy->toy_gmtbasemsec = base.tv_nsec/1000000; toy->toy_gmtbasemsec = base.tv_nsec/1000000;
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000)); sim_debug (TMR_DB_TODR, &clk_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000));
} }
t_stat todr_resync (void) t_stat todr_resync (void)

View file

@ -345,12 +345,19 @@ REG clk_reg[] = {
{ NULL } { NULL }
}; };
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB todr_deb[] = {
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 }
};
DEVICE clk_dev = { DEVICE clk_dev = {
"TODR", &clk_unit, clk_reg, NULL, "TODR", &clk_unit, clk_reg, NULL,
1, 0, 8, 4, 0, 32, 1, 0, 8, 4, 0, 32,
NULL, NULL, &clk_reset, NULL, NULL, &clk_reset,
NULL, &clk_attach, &clk_detach, NULL, &clk_attach, &clk_detach,
NULL, 0, 0, NULL, NULL, NULL, &clk_help, NULL, NULL, NULL, DEV_DEBUG, 0, todr_deb, NULL, NULL, &clk_help, NULL, NULL,
&clk_description &clk_description
}; };
@ -370,14 +377,12 @@ REG tmr_reg[] = {
#define TMR_DB_TICK 0x02 /* Ticks */ #define TMR_DB_TICK 0x02 /* Ticks */
#define TMR_DB_SCHED 0x04 /* Scheduling */ #define TMR_DB_SCHED 0x04 /* Scheduling */
#define TMR_DB_INT 0x08 /* Interrupts */ #define TMR_DB_INT 0x08 /* Interrupts */
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB tmr_deb[] = { DEBTAB tmr_deb[] = {
{ "REG", TMR_DB_REG, "Register Access"}, { "REG", TMR_DB_REG, "Register Access"},
{ "TICK", TMR_DB_TICK, "Ticks"}, { "TICK", TMR_DB_TICK, "Ticks"},
{ "SCHED", TMR_DB_SCHED, "Scheduling"}, { "SCHED", TMR_DB_SCHED, "Scheduling"},
{ "INT", TMR_DB_INT, "Interrupts"}, { "INT", TMR_DB_INT, "Interrupts"},
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 } { NULL, 0 }
}; };
@ -889,7 +894,7 @@ sim_rtcn_get_time(&now, TMR_CLK); /* get curr time */
base.tv_sec = toy->toy_gmtbase; base.tv_sec = toy->toy_gmtbase;
base.tv_nsec = toy->toy_gmtbasemsec * 1000000; base.tv_nsec = toy->toy_gmtbasemsec * 1000000;
sim_timespec_diff (&val, &now, &base); sim_timespec_diff (&val, &now, &base);
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000))); sim_debug (TMR_DB_TODR, &clk_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000)));
return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */ return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */
} }
@ -909,7 +914,7 @@ sim_timespec_diff (&base, &now, &val); /* base = now - data */
toy->toy_gmtbase = (uint32)base.tv_sec; toy->toy_gmtbase = (uint32)base.tv_sec;
tbase = (time_t)base.tv_sec; tbase = (time_t)base.tv_sec;
toy->toy_gmtbasemsec = base.tv_nsec/1000000; toy->toy_gmtbasemsec = base.tv_nsec/1000000;
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000)); sim_debug (TMR_DB_TODR, &clk_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000));
} }
t_stat todr_resync (void) t_stat todr_resync (void)

View file

@ -370,12 +370,19 @@ REG clk_reg[] = {
{ NULL } { NULL }
}; };
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB todr_deb[] = {
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 }
};
DEVICE clk_dev = { DEVICE clk_dev = {
"TODR", &clk_unit, clk_reg, NULL, "TODR", &clk_unit, clk_reg, NULL,
1, 0, 8, 4, 0, 32, 1, 0, 8, 4, 0, 32,
NULL, NULL, &clk_reset, NULL, NULL, &clk_reset,
NULL, &clk_attach, &clk_detach, NULL, &clk_attach, &clk_detach,
NULL, 0, 0, NULL, NULL, NULL, &clk_help, NULL, NULL, NULL, DEV_DEBUG, 0, todr_deb, NULL, NULL, &clk_help, NULL, NULL,
&clk_description &clk_description
}; };
@ -395,14 +402,12 @@ REG tmr_reg[] = {
#define TMR_DB_TICK 0x02 /* Ticks */ #define TMR_DB_TICK 0x02 /* Ticks */
#define TMR_DB_SCHED 0x04 /* Scheduling */ #define TMR_DB_SCHED 0x04 /* Scheduling */
#define TMR_DB_INT 0x08 /* Interrupts */ #define TMR_DB_INT 0x08 /* Interrupts */
#define TMR_DB_TODR 0x10 /* TODR */
DEBTAB tmr_deb[] = { DEBTAB tmr_deb[] = {
{ "REG", TMR_DB_REG, "Register Access"}, { "REG", TMR_DB_REG, "Register Access"},
{ "TICK", TMR_DB_TICK, "Ticks"}, { "TICK", TMR_DB_TICK, "Ticks"},
{ "SCHED", TMR_DB_SCHED, "Scheduling"}, { "SCHED", TMR_DB_SCHED, "Scheduling"},
{ "INT", TMR_DB_INT, "Interrupts"}, { "INT", TMR_DB_INT, "Interrupts"},
{ "TODR", TMR_DB_TODR, "TODR activities"},
{ NULL, 0 } { NULL, 0 }
}; };
@ -1023,7 +1028,7 @@ sim_rtcn_get_time(&now, TMR_CLK); /* get curr time */
base.tv_sec = toy->toy_gmtbase; base.tv_sec = toy->toy_gmtbase;
base.tv_nsec = toy->toy_gmtbasemsec * 1000000; base.tv_nsec = toy->toy_gmtbasemsec * 1000000;
sim_timespec_diff (&val, &now, &base); sim_timespec_diff (&val, &now, &base);
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000))); sim_debug (TMR_DB_TODR, &clk_dev, "todr_rd() - TODR=0x%X - %s\n", (int32)(val.tv_sec*100 + val.tv_nsec/10000000), todr_fmt_vms_todr ((int32)(val.tv_sec*100 + val.tv_nsec/10000000)));
return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */ return (int32)(val.tv_sec*100 + val.tv_nsec/10000000); /* 100hz Clock Ticks */
} }
@ -1043,7 +1048,7 @@ sim_timespec_diff (&base, &now, &val); /* base = now - data */
toy->toy_gmtbase = (uint32)base.tv_sec; toy->toy_gmtbase = (uint32)base.tv_sec;
tbase = (time_t)base.tv_sec; tbase = (time_t)base.tv_sec;
toy->toy_gmtbasemsec = base.tv_nsec/1000000; toy->toy_gmtbasemsec = base.tv_nsec/1000000;
sim_debug (TMR_DB_TODR, &tmr_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000)); sim_debug (TMR_DB_TODR, &clk_dev, "todr_wr(0x%X) - %s - GMTBASE=%8.8s.%03d\n", data, todr_fmt_vms_todr (data), 11+ctime(&tbase), (int)(base.tv_nsec/1000000));
} }
t_stat todr_resync (void) t_stat todr_resync (void)

View file

@ -542,8 +542,10 @@ else { /* Not-Attached means */
uint32 base; /* behave like simh VMS default */ uint32 base; /* behave like simh VMS default */
time_t curr; time_t curr;
struct tm *ctm; struct tm *ctm;
struct timespec now;
curr = time (NULL); /* get curr time */ sim_rtcn_get_time(&now, TMR_CLK); /* get curr time */
curr = (time_t)now.tv_sec;
if (curr == (time_t) -1) /* error? */ if (curr == (time_t) -1) /* error? */
return SCPE_NOFNC; return SCPE_NOFNC;
ctm = localtime (&curr); /* decompose */ ctm = localtime (&curr); /* decompose */
@ -553,7 +555,8 @@ else { /* Not-Attached means */
ctm->tm_hour) * 60) + ctm->tm_hour) * 60) +
ctm->tm_min) * 60) + ctm->tm_min) * 60) +
ctm->tm_sec; ctm->tm_sec;
todr_wr ((base * 100) + 0x10000000); /* use VMS form */ todr_wr ((base * 100) + 0x10000000 + /* use VMS form */
(int32)(now.tv_nsec / 10000000));
} }
return SCPE_OK; return SCPE_OK;
} }