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AltairZ80: Fixed keyboard polling on non UNIX platform and daylight savings time issue with CP/M 3 clock

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This commit is contained in:
Peter Schorn 2015-04-25 08:31:05 +02:00
parent 71b99c6fa1
commit ad3767a2bd
5 changed files with 28 additions and 11 deletions
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5
AltairZ80/altairz80_cpu.c
View file

@ -2099,8 +2099,11 @@ static t_stat sim_instr_mmu (void) {
while (switch_cpu_now == TRUE) { /* loop until halted */ while (switch_cpu_now == TRUE) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
#if !UNIX_PLATFORM #if !UNIX_PLATFORM
if ((reason = sim_poll_kbd()) == SCPE_STOP) /* poll on platforms without reliable signalling */ /* poll on platforms without reliable signalling */
if ((sim_poll_kbd() == SCPE_OK) && stop_cpu) {
reason = SCPE_STOP;
break; break;
}
#endif #endif
if ((reason = sim_process_event())) if ((reason = sim_process_event()))
break; break;

7
AltairZ80/altairz80_cpu_nommu.c
View file

@ -1016,8 +1016,11 @@ t_stat sim_instr_nommu(void) {
while (TRUE) { /* loop until halted */ while (TRUE) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
#if !UNIX_PLATFORM #if !UNIX_PLATFORM
if ((reason = sim_poll_kbd()) == SCPE_STOP) /* poll on platforms without reliable signalling */
break; /* poll on platforms without reliable signalling */ if ((sim_poll_kbd() == SCPE_OK) && stop_cpu) {
reason = SCPE_STOP;
break;
}
#endif #endif
if ((reason = sim_process_event())) if ((reason = sim_process_event()))
break; break;

16
AltairZ80/altairz80_sio.c
View file

@ -736,12 +736,11 @@ static int32 sio0sCore(const int32 port, const int32 io, const int32 data) {
if (sio_unit.u3) /* character available? */ if (sio_unit.u3) /* character available? */
return spi.sio_can_read | spi.sio_can_write; return spi.sio_can_read | spi.sio_can_write;
ch = sim_poll_kbd(); /* no, try to get a character */ ch = sim_poll_kbd(); /* no, try to get a character */
if (ch) { /* character available? */ if ((ch == SCPE_OK) && stop_cpu) {
if (ch == SCPE_STOP) { /* stop CPU in case ^E (default) was typed */
stop_cpu = TRUE;
sim_interval = 0; /* detect stop condition as soon as possible*/ sim_interval = 0; /* detect stop condition as soon as possible*/
return spi.sio_cannot_read | spi.sio_can_write; /* do not consume stop character */ return spi.sio_cannot_read | spi.sio_can_write; /* do not consume stop character */
} }
if (ch) { /* character available? */
sio_unit.u3 = TRUE; /* indicate character available */ sio_unit.u3 = TRUE; /* indicate character available */
sio_unit.buf = ch; /* store character in buffer */ sio_unit.buf = ch; /* store character in buffer */
return spi.sio_can_read | spi.sio_can_write; return spi.sio_can_read | spi.sio_can_write;
@ -1363,11 +1362,18 @@ static time_t mkCPM3Origin(void) {
3 BCD byte: MM 3 BCD byte: MM
4 BCD byte: SS */ 4 BCD byte: SS */
static void setClockCPM3(void) { static void setClockCPM3(void) {
ClockCPM3Delta = mkCPM3Origin() + struct tm targetDate;
const time_t targetSeconds = mkCPM3Origin() +
(GetBYTEWrapper(setClockCPM3Adr) + GetBYTEWrapper(setClockCPM3Adr + 1) * 256) * SECONDS_PER_DAY + (GetBYTEWrapper(setClockCPM3Adr) + GetBYTEWrapper(setClockCPM3Adr + 1) * 256) * SECONDS_PER_DAY +
fromBCD(GetBYTEWrapper(setClockCPM3Adr + 2)) * SECONDS_PER_HOUR + fromBCD(GetBYTEWrapper(setClockCPM3Adr + 2)) * SECONDS_PER_HOUR +
fromBCD(GetBYTEWrapper(setClockCPM3Adr + 3)) * SECONDS_PER_MINUTE + fromBCD(GetBYTEWrapper(setClockCPM3Adr + 3)) * SECONDS_PER_MINUTE +
fromBCD(GetBYTEWrapper(setClockCPM3Adr + 4)) - time(NULL); fromBCD(GetBYTEWrapper(setClockCPM3Adr + 4));
// compute target year, month and day and replace hour, minute and second fields
targetDate = *localtime(&targetSeconds);
targetDate.tm_hour = fromBCD(GetBYTEWrapper(setClockCPM3Adr + 2));
targetDate.tm_min = fromBCD(GetBYTEWrapper(setClockCPM3Adr + 3));
targetDate.tm_sec = fromBCD(GetBYTEWrapper(setClockCPM3Adr + 4));
ClockCPM3Delta = mktime(&targetDate) - time(NULL);
} }
static int32 simh_in(const int32 port) { static int32 simh_in(const int32 port) {

5
AltairZ80/i86_decode.c
View file

@ -209,8 +209,11 @@ t_stat sim_instr_8086(void) {
while (switch_cpu_now == TRUE) { /* loop until halted */ while (switch_cpu_now == TRUE) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
#if !UNIX_PLATFORM #if !UNIX_PLATFORM
if ((reason = sim_poll_kbd()) == SCPE_STOP) /* poll on platforms without reliable signalling */ /* poll on platforms without reliable signalling */
if ((sim_poll_kbd() == SCPE_OK) && stop_cpu) {
reason = SCPE_STOP;
break; break;
}
#endif #endif
if ( (reason = sim_process_event()) ) if ( (reason = sim_process_event()) )
break; break;

6
AltairZ80/m68ksim.c
View file

@ -215,9 +215,11 @@ t_stat sim_instr_m68k(void) {
while (TRUE) { while (TRUE) {
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
#if !UNIX_PLATFORM #if !UNIX_PLATFORM
if ((reason = sim_poll_kbd()) == SCPE_STOP) /* poll on platforms without reliable /* poll on platforms without reliable signalling */
signalling */ if ((sim_poll_kbd() == SCPE_OK) && stop_cpu) {
reason = SCPE_STOP;
break; break;
}
#endif #endif
if ((reason = sim_process_event())) if ((reason = sim_process_event()))
break; break;