PDP11, VAX730, VAX750, VAX780, VAX8600: Moved CR11/CD11 from BR4 to BR6
This commit is contained in:
Mark Pizzolato
parent
0db0236bed
commit
ae25c72a8e
5 changed files with 23 additions and 16 deletions
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@ -1,6 +1,6 @@
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/* pdp11_defs.h: PDP-11 simulator definitions
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Copyright (c) 1993-2015, Robert M Supnik
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Copyright (c) 1993-2017, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@ -26,6 +26,7 @@
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The author gratefully acknowledges the help of Max Burnet, Megan Gentry,
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and John Wilson in resolving questions about the PDP-11
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06-Jan-17 RMS Moved CR11/CD11 to BR6 (Mark Pizzolato)
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30-Dec-15 RMS Added NOBVT option
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23-Oct-13 RMS Added cpu_set_boot prototype
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02-Sep-13 RMS Added third Massbus adapter and RS drive
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@ -595,6 +596,7 @@ typedef struct pdp_dib DIB;
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#define INT_V_PCLK 2
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#define INT_V_DTA 3
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#define INT_V_TA 4
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#define INT_V_CR 5
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#define INT_V_PIR5 0 /* BR5 */
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#define INT_V_RK 1
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@ -630,7 +632,7 @@ typedef struct pdp_dib DIB;
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#define INT_V_LPT 5
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#define INT_V_VHRX 6
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#define INT_V_VHTX 7
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#define INT_V_CR 8
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//#define XXXXXX 8 /* former CR */
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#define INT_V_DLI 9
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#define INT_V_DLO 10
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#define INT_V_DCI 11
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@ -716,6 +718,7 @@ typedef struct pdp_dib DIB;
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#define IPL_PCLK 6
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#define IPL_DTA 6
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#define IPL_TA 6
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#define IPL_CR 6
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#define IPL_RK 5
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#define IPL_RL 5
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#define IPL_RX 5
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@ -747,7 +750,6 @@ typedef struct pdp_dib DIB;
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#define IPL_LPT 4
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#define IPL_VHRX 4
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#define IPL_VHTX 4
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#define IPL_CR 4
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#define IPL_DLI 4
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#define IPL_DLO 4
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#define IPL_DCI 4
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@ -256,6 +256,7 @@ typedef struct {
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/* Interrupt assignments; within each level, priority is right to left */
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#define INT_V_DTA 0 /* BR6 */
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#define INT_V_CR 1
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#define INT_V_DZRX 0 /* BR5 */
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#define INT_V_DZTX 1
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@ -276,13 +277,14 @@ typedef struct {
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#define INT_V_LPT 0 /* BR4 */
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#define INT_V_PTR 1
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#define INT_V_PTP 2
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#define INT_V_CR 3
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//#define XXXXXXXX 3 /* Former CR */
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#define INT_V_VHRX 4
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#define INT_V_VHTX 5
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#define INT_V_TDRX 6
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#define INT_V_TDTX 7
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#define INT_DTA (1u << INT_V_DTA)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DZRX (1u << INT_V_DZRX)
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#define INT_DZTX (1u << INT_V_DZTX)
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#define INT_HK (1u << INT_V_HK)
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@ -298,7 +300,6 @@ typedef struct {
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#define INT_VHTX (1u << INT_V_VHTX)
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#define INT_PTR (1u << INT_V_PTR)
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#define INT_PTP (1u << INT_V_PTP)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DMCRX (1u << INT_V_DMCRX)
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#define INT_DMCTX (1u << INT_V_DMCTX)
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#define INT_DUPRX (1u << INT_V_DUPRX)
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@ -308,6 +309,7 @@ typedef struct {
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#define INT_TDTX (1u << INT_V_TDTX)
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#define IPL_DTA (0x16 - IPL_HMIN)
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#define IPL_CR (0x16 - IPL_HMIN)
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#define IPL_DZRX (0x15 - IPL_HMIN)
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#define IPL_DZTX (0x15 - IPL_HMIN)
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#define IPL_HK (0x15 - IPL_HMIN)
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@ -321,7 +323,6 @@ typedef struct {
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#define IPL_LPT (0x14 - IPL_HMIN)
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#define IPL_PTR (0x14 - IPL_HMIN)
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#define IPL_PTP (0x14 - IPL_HMIN)
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#define IPL_CR (0x14 - IPL_HMIN)
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#define IPL_VHRX (0x14 - IPL_HMIN)
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#define IPL_VHTX (0x14 - IPL_HMIN)
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#define IPL_DMCRX (0x15 - IPL_HMIN)
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@ -298,6 +298,7 @@ typedef struct {
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/* Interrupt assignments; within each level, priority is right to left */
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#define INT_V_DTA 0 /* BR6 */
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#define INT_V_CR 1
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#define INT_V_DZRX 0 /* BR5 */
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#define INT_V_DZTX 1
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@ -317,13 +318,14 @@ typedef struct {
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#define INT_V_LPT 0 /* BR4 */
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#define INT_V_PTR 1
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#define INT_V_PTP 2
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#define INT_V_CR 3
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//#define XXXXXXXX 3 /* Former CR */
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#define INT_V_VHRX 4
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#define INT_V_VHTX 5
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#define INT_V_TDRX 6
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#define INT_V_TDTX 7
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#define INT_DTA (1u << INT_V_DTA)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DZRX (1u << INT_V_DZRX)
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#define INT_DZTX (1u << INT_V_DZTX)
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#define INT_HK (1u << INT_V_HK)
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@ -338,7 +340,6 @@ typedef struct {
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#define INT_VHTX (1u << INT_V_VHTX)
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#define INT_PTR (1u << INT_V_PTR)
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#define INT_PTP (1u << INT_V_PTP)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DMCRX (1u << INT_V_DMCRX)
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#define INT_DMCTX (1u << INT_V_DMCTX)
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#define INT_DUPRX (1u << INT_V_DUPRX)
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@ -348,6 +349,7 @@ typedef struct {
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#define INT_TDTX (1u << INT_V_TDTX)
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#define IPL_DTA (0x16 - IPL_HMIN)
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#define IPL_CR (0x16 - IPL_HMIN)
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#define IPL_DZRX (0x15 - IPL_HMIN)
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#define IPL_DZTX (0x15 - IPL_HMIN)
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#define IPL_HK (0x15 - IPL_HMIN)
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@ -360,7 +362,6 @@ typedef struct {
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#define IPL_LPT (0x14 - IPL_HMIN)
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#define IPL_PTR (0x14 - IPL_HMIN)
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#define IPL_PTP (0x14 - IPL_HMIN)
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#define IPL_CR (0x14 - IPL_HMIN)
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#define IPL_VHRX (0x14 - IPL_HMIN)
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#define IPL_VHTX (0x14 - IPL_HMIN)
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#define IPL_DMCRX (0x15 - IPL_HMIN)
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@ -1,6 +1,6 @@
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/* vax780_defs.h: VAX 780 model-specific definitions file
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Copyright (c) 2004-2015, Robert M Supnik
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Copyright (c) 2004-2017, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@ -23,6 +23,7 @@
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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06-Jan-17 RMS Moved CR to BR6 (Mark Pizzolato)
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29-Mar-15 RMS Added model specific IPR max
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16-Dec-14 RMS Removed TQ boot code (780 VMB doesn't support tape boot)
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05-Sep-14 RMS Fixed SBR test (found by Mark Pizzolato)
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@ -312,6 +313,7 @@ typedef struct {
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/* Interrupt assignments; within each level, priority is right to left */
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#define INT_V_DTA 0 /* BR6 */
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#define INT_V_CR 1
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#define INT_V_DZRX 0 /* BR5 */
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#define INT_V_DZTX 1
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@ -331,13 +333,14 @@ typedef struct {
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#define INT_V_LPT 0 /* BR4 */
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#define INT_V_PTR 1
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#define INT_V_PTP 2
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#define INT_V_CR 3
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//#define XXXXXXXX 3 /* Former CR */
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#define INT_V_VHRX 4
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#define INT_V_VHTX 5
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#define INT_V_TDRX 6
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#define INT_V_TDTX 7
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#define INT_DTA (1u << INT_V_DTA)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DZRX (1u << INT_V_DZRX)
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#define INT_DZTX (1u << INT_V_DZTX)
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#define INT_HK (1u << INT_V_HK)
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@ -352,7 +355,6 @@ typedef struct {
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#define INT_VHTX (1u << INT_V_VHTX)
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#define INT_PTR (1u << INT_V_PTR)
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#define INT_PTP (1u << INT_V_PTP)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DMCRX (1u << INT_V_DMCRX)
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#define INT_DMCTX (1u << INT_V_DMCTX)
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#define INT_DUPRX (1u << INT_V_DUPRX)
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@ -362,6 +364,7 @@ typedef struct {
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#define INT_TDTX (1u << INT_V_TDTX)
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#define IPL_DTA (0x16 - IPL_HMIN)
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#define IPL_CR (0x16 - IPL_HMIN)
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#define IPL_DZRX (0x15 - IPL_HMIN)
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#define IPL_DZTX (0x15 - IPL_HMIN)
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#define IPL_HK (0x15 - IPL_HMIN)
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@ -374,7 +377,6 @@ typedef struct {
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#define IPL_LPT (0x14 - IPL_HMIN)
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#define IPL_PTR (0x14 - IPL_HMIN)
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#define IPL_PTP (0x14 - IPL_HMIN)
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#define IPL_CR (0x14 - IPL_HMIN)
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#define IPL_VHRX (0x14 - IPL_HMIN)
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#define IPL_VHTX (0x14 - IPL_HMIN)
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#define IPL_DMCRX (0x15 - IPL_HMIN)
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@ -342,6 +342,7 @@ typedef struct {
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/* Interrupt assignments; within each level, priority is right to left */
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#define INT_V_DTA 0 /* BR6 */
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#define INT_V_CR 1
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#define INT_V_DZRX 0 /* BR5 */
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#define INT_V_DZTX 1
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@ -361,13 +362,14 @@ typedef struct {
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#define INT_V_LPT 0 /* BR4 */
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#define INT_V_PTR 1
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#define INT_V_PTP 2
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#define INT_V_CR 3
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//#define XXXXXXXX 3 /* Former CR */
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#define INT_V_VHRX 4
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#define INT_V_VHTX 5
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#define INT_V_TDRX 6
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#define INT_V_TDTX 7
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#define INT_DTA (1u << INT_V_DTA)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DZRX (1u << INT_V_DZRX)
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#define INT_DZTX (1u << INT_V_DZTX)
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#define INT_HK (1u << INT_V_HK)
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@ -382,7 +384,6 @@ typedef struct {
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#define INT_VHTX (1u << INT_V_VHTX)
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#define INT_PTR (1u << INT_V_PTR)
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#define INT_PTP (1u << INT_V_PTP)
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#define INT_CR (1u << INT_V_CR)
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#define INT_DMCRX (1u << INT_V_DMCRX)
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#define INT_DMCTX (1u << INT_V_DMCTX)
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#define INT_DUPRX (1u << INT_V_DUPRX)
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@ -392,6 +393,7 @@ typedef struct {
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#define INT_TDTX (1u << INT_V_TDTX)
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#define IPL_DTA (0x16 - IPL_HMIN)
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#define IPL_CR (0x16 - IPL_HMIN)
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#define IPL_DZRX (0x15 - IPL_HMIN)
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#define IPL_DZTX (0x15 - IPL_HMIN)
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#define IPL_HK (0x15 - IPL_HMIN)
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@ -404,7 +406,6 @@ typedef struct {
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#define IPL_LPT (0x14 - IPL_HMIN)
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#define IPL_PTR (0x14 - IPL_HMIN)
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#define IPL_PTP (0x14 - IPL_HMIN)
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#define IPL_CR (0x14 - IPL_HMIN)
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#define IPL_VHRX (0x14 - IPL_HMIN)
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#define IPL_VHTX (0x14 - IPL_HMIN)
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#define IPL_DMCRX (0x15 - IPL_HMIN)
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