PDP11, VAX: Use generated unique default MAC addresses for Ethernet devices
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3dcd5124e9
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4 changed files with 20 additions and 5 deletions
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@ -2538,6 +2538,12 @@ t_stat xq_reset(DEVICE* dptr)
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sim_debug(DBG_TRC, xq->dev, "xq_reset()\n");
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sim_debug(DBG_TRC, xq->dev, "xq_reset()\n");
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/* One time only initializations */
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if (!xq->var->initialized) {
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xq->var->initialized = TRUE;
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/* Set an initial MAC address in the DEC range */
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xq_setmac (dptr->units, 0, "08:00:2B:00:00:00/24", NULL);
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}
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/* calculate MAC checksum */
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/* calculate MAC checksum */
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xq_make_checksum(xq);
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xq_make_checksum(xq);
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@ -3171,8 +3177,8 @@ const char helpString[] =
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" A Valid MAC address is comprised of 6 pairs of hex digits delimited by\n"
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" A Valid MAC address is comprised of 6 pairs of hex digits delimited by\n"
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" dashes, colons or period characters.\n"
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" dashes, colons or period characters.\n"
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"\n"
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"\n"
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" The default MAC address for the XQ device is 08-00-2B-AA-BB-CC. The\n"
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" The default MAC address for the %D device is set to a value in the range\n"
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" default MAC address for the XQB device is 08-00-2B-BB-CC-DD.\n"
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" from 08-00-2B-00-00-00 thru 08-00-2B-FF-FF-FF.\n"
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"\n"
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"\n"
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" The SET MAC command must be done before the %D device is attached to a\n"
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" The SET MAC command must be done before the %D device is attached to a\n"
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" network.\n"
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" network.\n"
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@ -312,6 +312,7 @@ struct xq_device {
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ETH_QUE ReadQ;
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ETH_QUE ReadQ;
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int32 idtmr; /* countdown for ID Timer */
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int32 idtmr; /* countdown for ID Timer */
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uint32 must_poll; /* receiver must poll instead of counting on asynch polls */
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uint32 must_poll; /* receiver must poll instead of counting on asynch polls */
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t_bool initialized; /* flag for one time initializations */
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};
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};
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struct xq_controller {
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struct xq_controller {
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@ -849,6 +849,12 @@ t_stat xu_reset(DEVICE* dptr)
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CTLR* xu = xu_dev2ctlr(dptr);
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CTLR* xu = xu_dev2ctlr(dptr);
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sim_debug(DBG_TRC, xu->dev, "xu_reset()\n");
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sim_debug(DBG_TRC, xu->dev, "xu_reset()\n");
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/* One time only initializations */
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if (!xu->var->initialized) {
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xu->var->initialized = TRUE;
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/* Set an initial MAC address in the DEC range */
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xu_setmac (dptr->units, 0, "08:00:2B:00:00:00/24", NULL);
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}
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/* init read queue (first time only) */
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/* init read queue (first time only) */
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status = ethq_init (&xu->var->ReadQ, XU_QUE_MAX);
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status = ethq_init (&xu->var->ReadQ, XU_QUE_MAX);
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if (status != SCPE_OK)
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if (status != SCPE_OK)
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@ -1903,9 +1909,10 @@ fprint_set_help (st, dptr);
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fprintf (st, "\nConfigured options and controller state can be displayed with:\n\n");
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fprintf (st, "\nConfigured options and controller state can be displayed with:\n\n");
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fprint_show_help (st, dptr);
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fprint_show_help (st, dptr);
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fprintf (st, "\nMAC address octets must be delimited by dashes, colons or periods.\n");
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fprintf (st, "\nMAC address octets must be delimited by dashes, colons or periods.\n");
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fprintf (st, "The controller defaults to 08-00-2B-CC-DD-EE, which should be sufficient if\n");
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fprintf (st, "The controller defaults to a relatively unique MAC address in the range\n");
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fprintf (st, "there is only one SIMH DEUNA/DELUA controller on your LAN. Two cards with the\n");
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fprintf (st, "08-00-2B-00-00-00 thru 08-00-2B-FF-FF-FF, which should be sufficient\n");
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fprintf (st, "same MAC address will see each other's packets, resulting in a serious mess.\n\n");
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fprintf (st, "for most network environments. If desired, the simulated MAC address\n");
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fprintf (st, "can be directly set.\n");
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fprintf (st, "To access the network, the simulated Ethernet controller must be attached to a\n");
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fprintf (st, "To access the network, the simulated Ethernet controller must be attached to a\n");
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fprintf (st, "real Ethernet interface.\n\n");
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fprintf (st, "real Ethernet interface.\n\n");
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eth_attach_help(st, dptr, uptr, flag, cptr);
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eth_attach_help(st, dptr, uptr, flag, cptr);
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@ -159,6 +159,7 @@ struct xu_device {
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uint16 udb[UDBSIZE]; /* copy of Unibus Data Block */
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uint16 udb[UDBSIZE]; /* copy of Unibus Data Block */
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uint16 rxhdr[4]; /* content of RX ring entry, during wait */
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uint16 rxhdr[4]; /* content of RX ring entry, during wait */
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uint16 txhdr[4]; /* content of TX ring entry, during xmit */
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uint16 txhdr[4]; /* content of TX ring entry, during xmit */
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t_bool initialized; /* flag for one time initializations */
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};
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};
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struct xu_controller {
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struct xu_controller {
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