PDP11, VAX: Use generated unique default MAC addresses for Ethernet devices

This commit is contained in:
Mark Pizzolato 2016-05-24 08:47:01 -07:00
parent 3dcd5124e9
commit ae6f3b97e4
4 changed files with 20 additions and 5 deletions

View file

@ -2538,6 +2538,12 @@ t_stat xq_reset(DEVICE* dptr)
sim_debug(DBG_TRC, xq->dev, "xq_reset()\n"); sim_debug(DBG_TRC, xq->dev, "xq_reset()\n");
/* One time only initializations */
if (!xq->var->initialized) {
xq->var->initialized = TRUE;
/* Set an initial MAC address in the DEC range */
xq_setmac (dptr->units, 0, "08:00:2B:00:00:00/24", NULL);
}
/* calculate MAC checksum */ /* calculate MAC checksum */
xq_make_checksum(xq); xq_make_checksum(xq);
@ -3171,8 +3177,8 @@ const char helpString[] =
" A Valid MAC address is comprised of 6 pairs of hex digits delimited by\n" " A Valid MAC address is comprised of 6 pairs of hex digits delimited by\n"
" dashes, colons or period characters.\n" " dashes, colons or period characters.\n"
"\n" "\n"
" The default MAC address for the XQ device is 08-00-2B-AA-BB-CC. The\n" " The default MAC address for the %D device is set to a value in the range\n"
" default MAC address for the XQB device is 08-00-2B-BB-CC-DD.\n" " from 08-00-2B-00-00-00 thru 08-00-2B-FF-FF-FF.\n"
"\n" "\n"
" The SET MAC command must be done before the %D device is attached to a\n" " The SET MAC command must be done before the %D device is attached to a\n"
" network.\n" " network.\n"

View file

@ -312,6 +312,7 @@ struct xq_device {
ETH_QUE ReadQ; ETH_QUE ReadQ;
int32 idtmr; /* countdown for ID Timer */ int32 idtmr; /* countdown for ID Timer */
uint32 must_poll; /* receiver must poll instead of counting on asynch polls */ uint32 must_poll; /* receiver must poll instead of counting on asynch polls */
t_bool initialized; /* flag for one time initializations */
}; };
struct xq_controller { struct xq_controller {

View file

@ -849,6 +849,12 @@ t_stat xu_reset(DEVICE* dptr)
CTLR* xu = xu_dev2ctlr(dptr); CTLR* xu = xu_dev2ctlr(dptr);
sim_debug(DBG_TRC, xu->dev, "xu_reset()\n"); sim_debug(DBG_TRC, xu->dev, "xu_reset()\n");
/* One time only initializations */
if (!xu->var->initialized) {
xu->var->initialized = TRUE;
/* Set an initial MAC address in the DEC range */
xu_setmac (dptr->units, 0, "08:00:2B:00:00:00/24", NULL);
}
/* init read queue (first time only) */ /* init read queue (first time only) */
status = ethq_init (&xu->var->ReadQ, XU_QUE_MAX); status = ethq_init (&xu->var->ReadQ, XU_QUE_MAX);
if (status != SCPE_OK) if (status != SCPE_OK)
@ -1903,9 +1909,10 @@ fprint_set_help (st, dptr);
fprintf (st, "\nConfigured options and controller state can be displayed with:\n\n"); fprintf (st, "\nConfigured options and controller state can be displayed with:\n\n");
fprint_show_help (st, dptr); fprint_show_help (st, dptr);
fprintf (st, "\nMAC address octets must be delimited by dashes, colons or periods.\n"); fprintf (st, "\nMAC address octets must be delimited by dashes, colons or periods.\n");
fprintf (st, "The controller defaults to 08-00-2B-CC-DD-EE, which should be sufficient if\n"); fprintf (st, "The controller defaults to a relatively unique MAC address in the range\n");
fprintf (st, "there is only one SIMH DEUNA/DELUA controller on your LAN. Two cards with the\n"); fprintf (st, "08-00-2B-00-00-00 thru 08-00-2B-FF-FF-FF, which should be sufficient\n");
fprintf (st, "same MAC address will see each other's packets, resulting in a serious mess.\n\n"); fprintf (st, "for most network environments. If desired, the simulated MAC address\n");
fprintf (st, "can be directly set.\n");
fprintf (st, "To access the network, the simulated Ethernet controller must be attached to a\n"); fprintf (st, "To access the network, the simulated Ethernet controller must be attached to a\n");
fprintf (st, "real Ethernet interface.\n\n"); fprintf (st, "real Ethernet interface.\n\n");
eth_attach_help(st, dptr, uptr, flag, cptr); eth_attach_help(st, dptr, uptr, flag, cptr);

View file

@ -159,6 +159,7 @@ struct xu_device {
uint16 udb[UDBSIZE]; /* copy of Unibus Data Block */ uint16 udb[UDBSIZE]; /* copy of Unibus Data Block */
uint16 rxhdr[4]; /* content of RX ring entry, during wait */ uint16 rxhdr[4]; /* content of RX ring entry, during wait */
uint16 txhdr[4]; /* content of TX ring entry, during xmit */ uint16 txhdr[4]; /* content of TX ring entry, during xmit */
t_bool initialized; /* flag for one time initializations */
}; };
struct xu_controller { struct xu_controller {