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Addition of MicroVAX II (VAX630) and rtVAX 1000 (or Industrial VAX 620) processor simulators from Matt Burke

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Generalized the Boot Code loading support to use common code which has been added to vax_cpu.c
This commit is contained in:
Mark Pizzolato 2012-11-09 12:18:15 -08:00
parent 732ef8307e
commit b01fa8fbb0
27 changed files with 21305 additions and 9376 deletions
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BIN
VAX/ka620.bin Normal file
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VAX/ka620_patch.com Normal file
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@ -0,0 +1,25 @@
$!
$! This procedure patches KA620.BIN (V1.1) Boot ROM image to work under
$! the SIMH simulator
$!
$ PATCH /ABSOLUTE /NEW_VERSION /OUTPUT=KA620.BIN KA620_ORIG.BIN
!
! Test D - ROM checksum & TOY RAM
!
! - ROM checksum needs to be updated to reflect changes below
!
REPLACE/WORD 0B888 = 0279F
0163D
EXIT
!
! Test 3 - Interrupt tests
!
! - Need to skip console loopback test and memory parity test
!
REPLACE/INSTRUCTION 0547C = 'MOVAL W^0000571A,B^04(R11)'
'BRW 05CCC'
EXIT
!
UPDATE
EXIT
$

BIN
VAX/ka630.bin Normal file
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VAX/ka630_patch.com Normal file
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@ -0,0 +1,25 @@
$!
$! This procedure patches KA630.BIN (V1.3) Boot ROM image to work under
$! the SIMH simulator
$!
$ PATCH /ABSOLUTE /NEW_VERSION /OUTPUT=KA630.BIN KA630_ORIG.BIN
!
! Test D - ROM checksum & TOY RAM
!
! - ROM checksum needs to be updated to reflect changes below
!
REPLACE/WORD 0B888 = 0EAAA
0FAB3
EXIT
!
! Test 3 - Interrupt tests
!
! - Need to skip console loopback test and memory parity test
!
REPLACE/INSTRUCTION 0547C = 'MOVAL W^0000571A,B^04(R11)'
'BRW 05CCC'
EXIT
!
UPDATE
EXIT
$

33
VAX/vax610_sysdev.c
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@ -34,9 +34,11 @@
#include "vax_defs.h"
#include <time.h>
#ifndef DONT_USE_INTERNAL_ROM
#include "vax_ka610_bin.h"
#endif
#ifdef DONT_USE_INTERNAL_ROM
#define BOOT_CODE_FILENAME "ka610.bin"
#else /* !DONT_USE_INTERNAL_ROM */
#include "vax_ka610_bin.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif /* DONT_USE_INTERNAL_ROM */
/* MicroVAX I boot device definitions */
@ -466,30 +468,9 @@ t_stat cpu_boot (int32 unitno, DEVICE *dptr)
{
t_stat r;
printf ("Loading boot code from ka610.bin\n");
if (sim_log) fprintf (sim_log,
"Loading boot code from ka610.bin\n");
r = load_cmd (0, "-O ka610.bin 200");
if (r != SCPE_OK) {
#ifndef DONT_USE_INTERNAL_ROM
FILE *f;
if ((f = sim_fopen ("ka610.bin", "wb"))) {
printf ("Saving boot code to ka610.bin\n");
if (sim_log)
fprintf (sim_log, "Saving boot code to ka610.bin\n");
sim_fwrite (vax_ka610_bin, sizeof(vax_ka610_bin[0]), sizeof(vax_ka610_bin)/sizeof(vax_ka610_bin[0]), f);
fclose (f);
printf ("Loading boot code from ka610.bin\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from ka610.bin\n");
r = load_cmd (0, "-O ka610.bin 200");
if (r == SCPE_OK)
SP = PC = 512;
}
#endif
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, FALSE, 0x200);
if (r != SCPE_OK)
return r;
}
SP = PC = 512;
AP = 1;
return SCPE_OK;

448
VAX/vax630_defs.h Normal file
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/* vax630_defs.h: MicroVAX II model-specific definitions file
Copyright (c) 2009-2012, Matt Burke
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name(s) of the author(s) shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author(s).
08-Nov-12 MB First version
This file covers the KA630 ("Mayflower") Qbus system.
System memory map
0000 0000 - 00FF FFFF main memory
0100 0000 - 1FFF FFFF reserved
2000 0000 - 2000 1FFF Qbus I/O page
2004 0000 - 2004 FFFF ROM space, halt protected
2005 0000 - 2005 FFFF ROM space, halt unprotected
2008 0000 - 2008 000F Local register space
2008 8000 - 2008 FFFF Qbus mapping registers
200B 8000 - 200B 80FF Watch chip registers
3000 0000 - 303F FFFF Qbus memory space
3400 0000 - 3FFF FFFF reserved
*/
#ifdef FULL_VAX /* subset VAX */
#undef FULL_VAX
#endif
#ifndef _VAXMOD_DEFS_H_
#define _VAXMOD_DEFS_H_ 1
/* Microcode constructs */
#define VAX620_SID (16 << 24) /* system ID */
#define VAX630_SID (8 << 24) /* system ID */
#define CON_HLTPIN 0x0200 /* external CPU halt */
#define CON_PWRUP 0x0300 /* powerup code */
#define CON_HLTINS 0x0600 /* HALT instruction */
#define CON_DBLMCK 0x0500 /* Machine check in machine check */
#define CON_BADPSL 0x4000 /* invalid PSL flag */
#define CON_MAPON 0x8000 /* mapping on flag */
#define MCHK_TBM_P0 0x05 /* PPTE in P0 */
#define MCHK_TBM_P1 0x06 /* PPTE in P1 */
#define MCHK_M0_P0 0x07 /* PPTE in P0 */
#define MCHK_M0_P1 0x08 /* PPTE in P1 */
#define MCHK_INTIPL 0x09 /* invalid ireq */
#define MCHK_READ 0x80 /* read check */
#define MCHK_WRITE 0x82 /* write check */
/* Machine specific IPRs */
#define MT_TBDR 36 /* Translation Buffer Disable */
#define MT_CADR 37 /* Cache Disable Register */
#define MT_MCESR 38 /* Machine Check Error Summary */
#define MT_CAER 39 /* Cache Error Register */
#define MT_CONISP 41 /* Console Saved ISP */
#define MT_CONPC 42 /* Console Saved PC */
#define MT_CONPSL 43 /* Console Saved PSL */
#define MT_SBIFS 48 /* SBI fault status */
#define MT_SBIS 49 /* SBI silo */
#define MT_SBISC 50 /* SBI silo comparator */
#define MT_SBIMT 51 /* SBI maint */
#define MT_SBIER 52 /* SBI error */
#define MT_SBITA 53 /* SBI timeout addr */
#define MT_SBIQC 54 /* SBI timeout clear */
#define MT_IORESET 55 /* I/O Bus Reset */
#define MT_TBDATA 59 /* Translation Buffer Data */
#define MT_MBRK 60 /* microbreak */
/* CPU */
#define CPU_MODEL_MODIFIERS \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
NULL, &cpu_show_model },
/* Memory */
#define MAXMEMWIDTH 24 /* max mem, std KA655 */
#define MAXMEMSIZE (1 << MAXMEMWIDTH) /* max mem size */
#define MAXMEMWIDTH_X 24 /* max mem, KA655X */
#define MAXMEMSIZE_X (1 << MAXMEMWIDTH_X)
#define INITMEMSIZE (1 << 24) /* initial memory size */
#define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 23) + (1u << 22), NULL, "12M", &cpu_set_size }, \
{ UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size }
/* Qbus I/O page */
#define IOPAGEAWIDTH 13 /* IO addr width */
#define IOPAGESIZE (1u << IOPAGEAWIDTH) /* IO page length */
#define IOPAGEMASK (IOPAGESIZE - 1) /* IO addr mask */
#define IOPAGEBASE 0x20000000 /* IO page base */
#define ADDR_IS_IO(x) ((((uint32) (x)) >= IOPAGEBASE) && \
(((uint32) (x)) < (IOPAGEBASE + IOPAGESIZE)))
/* Read only memory - appears twice */
#define ROMAWIDTH 16 /* ROM addr width */
#define ROMSIZE (1u << ROMAWIDTH) /* ROM length */
#define ROMAMASK (ROMSIZE - 1) /* ROM addr mask */
#define ROMBASE 0x20040000 /* ROM base */
#define ADDR_IS_ROM(x) ((((uint32) (x)) >= ROMBASE) && \
(((uint32) (x)) < (ROMBASE + ROMSIZE + ROMSIZE)))
/* KA630 board registers */
#define KAAWIDTH 4 /* REG addr width */
#define KASIZE (1u << KAAWIDTH) /* REG length */
#define KABASE 0x20080000 /* REG addr base */
/* Qbus map registers */
#define QBMAPAWIDTH 15 /* map addr width */
#define QBMAPSIZE (1u << QBMAPAWIDTH) /* map length */
#define QBMAPAMASK (QBMAPSIZE - 1) /* map addr mask */
#define QBMAPBASE 0x20088000 /* map addr base */
/* Non-volatile RAM - 128 Bytes long */
#define NVRAWIDTH 7 /* NVR addr width */
#define NVRSIZE (1u << NVRAWIDTH) /* NVR length */
#define NVRAMASK (NVRSIZE - 1) /* NVR addr mask */
#define NVRBASE 0x200B8000 /* NVR base */
#define ADDR_IS_NVR(x) ((((uint32) (x)) >= NVRBASE) && \
(((uint32) (x)) < (NVRBASE + NVRSIZE)))
/* Qbus memory space */
#define QBMAWIDTH 22 /* Qmem addr width */
#define QBMSIZE (1u << QBMAWIDTH) /* Qmem length */
#define QBMAMASK (QBMSIZE - 1) /* Qmem addr mask */
#define QBMBASE 0x30000000 /* Qmem base */
#define ADDR_IS_QBM(x) ((((uint32) (x)) >= QBMBASE) && \
(((uint32) (x)) < (QBMBASE + QBMSIZE)))
/* Other address spaces */
#define ADDR_IS_CDG(x) (0)
/* Machine specific reserved operand tests (all NOPs) */
#define ML_PA_TEST(r)
#define ML_LR_TEST(r)
#define ML_SBR_TEST(r)
#define ML_PXBR_TEST(r)
#define LP_AST_TEST(r)
#define LP_MBZ84_TEST(r)
#define LP_MBZ92_TEST(r)
#define SCB_VALID (ADDR_IS_MEM(SCBB) || ADDR_IS_ROM(SCBB))
/* Qbus I/O modes */
#define READ 0 /* PDP-11 compatibility */
#define WRITE (L_WORD)
#define WRITEB (L_BYTE)
/* Common CSI flags */
#define CSR_V_GO 0 /* go */
#define CSR_V_IE 6 /* interrupt enable */
#define CSR_V_DONE 7 /* done */
#define CSR_V_BUSY 11 /* busy */
#define CSR_V_ERR 15 /* error */
#define CSR_GO (1u << CSR_V_GO)
#define CSR_IE (1u << CSR_V_IE)
#define CSR_DONE (1u << CSR_V_DONE)
#define CSR_BUSY (1u << CSR_V_BUSY)
#define CSR_ERR (1u << CSR_V_ERR)
/* Timers */
#define TMR_CLK 0 /* 100Hz clock */
/* Internal I/O interrupts */
#define IPL_CLKINT 0x16 /* clock IPL */
/* I/O system definitions */
#define DZ_MUXES 4 /* max # of DZV muxes */
#define DZ_LINES 4 /* lines per DZV mux */
#define VH_MUXES 4 /* max # of DHQ muxes */
#define DLX_LINES 16 /* max # of KL11/DL11's */
#define DCX_LINES 16 /* max # of DC11's */
#define MT_MAXFR (1 << 16) /* magtape max rec */
#define AUTO_LNT 34 /* autoconfig ranks */
#define DEV_V_UBUS (DEV_V_UF + 0) /* Unibus */
#define DEV_V_QBUS (DEV_V_UF + 1) /* Qbus */
#define DEV_V_Q18 (DEV_V_UF + 2) /* Qbus, mem <= 256KB */
#define DEV_V_FLTA (DEV_V_UF + 3) /* flt addr */
#define DEV_UBUS (1u << DEV_V_UBUS)
#define DEV_QBUS (1u << DEV_V_QBUS)
#define DEV_Q18 (1u << DEV_V_Q18)
#define DEV_FLTA (1u << DEV_V_FLTA)
#define UNIBUS FALSE /* 22b only */
#define DEV_RDX 16 /* default device radix */
/* Device information block */
#define VEC_DEVMAX 4 /* max device vec */
typedef struct {
uint32 ba; /* base addr */
uint32 lnt; /* length */
t_stat (*rd)(int32 *dat, int32 ad, int32 md);
t_stat (*wr)(int32 dat, int32 ad, int32 md);
int32 vnum; /* vectors: number */
int32 vloc; /* locator */
int32 vec; /* value */
int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
} DIB;
/* I/O page layout - RQB,RQC,RQD float based on number of DZ's */
#define IOBA_DZ (IOPAGEBASE + 000100) /* DZ11 */
#define IOLN_DZ 010
#define IOBA_RQB (IOPAGEBASE + 000334 + (020 * (DZ_MUXES / 2)))
#define IOLN_RQB 004
#define IOBA_RQC (IOPAGEBASE + IOBA_RQB + IOLN_RQB)
#define IOLN_RQC 004
#define IOBA_RQD (IOPAGEBASE + IOBA_RQC + IOLN_RQC)
#define IOLN_RQD 004
#define IOBA_VH (IOPAGEBASE + 000440) /* DHQ11 */
#define IOLN_VH 020
#define IOBA_RQ (IOPAGEBASE + 012150) /* RQDX3 */
#define IOLN_RQ 004
#define IOBA_TS (IOPAGEBASE + 012520) /* TS11 */
#define IOLN_TS 004
#define IOBA_RL (IOPAGEBASE + 014400) /* RL11 */
#define IOLN_RL 012
#define IOBA_XQ (IOPAGEBASE + 014440) /* DEQNA/DELQA */
#define IOLN_XQ 020
#define IOBA_XQB (IOPAGEBASE + 014460) /* 2nd DEQNA/DELQA */
#define IOLN_XQB 020
#define IOBA_TQ (IOPAGEBASE + 014500) /* TMSCP */
#define IOLN_TQ 004
#define IOBA_XU (IOPAGEBASE + 014510) /* DEUNA/DELUA */
#define IOLN_XU 010
#define IOBA_RP (IOPAGEBASE + 016700) /* RP/RM */
#define IOLN_RP 054
#define IOBA_CR (IOPAGEBASE + 017160) /* CD/CR/CM */
#define IOLN_CR 010
#define IOBA_RX (IOPAGEBASE + 017170) /* RXV11 */
#define IOLN_RX 004
#define IOBA_RY (IOPAGEBASE + 017170) /* RXV21 */
#define IOLN_RY 004
#define IOBA_QVSS (IOPAGEBASE + 017200) /* QVSS */
#define IOLN_QVSS 0100
#define IOBA_QDSS (IOPAGEBASE + 017400) /* QDSS */
#define IOLN_QDSS 002
#define IOBA_DBL (IOPAGEBASE + 017500) /* doorbell */
#define IOLN_DBL 002
#define IOBA_LPT (IOPAGEBASE + 017514) /* LP11 */
#define IOLN_LPT 004
#define IOBA_PTR (IOPAGEBASE + 017550) /* PC11 reader */
#define IOLN_PTR 004
#define IOBA_PTP (IOPAGEBASE + 017554) /* PC11 punch */
#define IOLN_PTP 004
/* The KA65x maintains 4 separate hardware IPL levels, IPL 17 to IPL 14
Within each IPL, priority is right to left
*/
/* IPL 17 */
/* IPL 16 */
#define INT_V_CLK 0 /* clock */
/* IPL 15 */
#define INT_V_RQ 0 /* RQDX3 */
#define INT_V_RL 1 /* RLV12/RL02 */
#define INT_V_DZRX 2 /* DZ11 */
#define INT_V_DZTX 3
#define INT_V_RP 4 /* RP,RM drives */
#define INT_V_TS 5 /* TS11/TSV05 */
#define INT_V_TQ 6 /* TMSCP */
#define INT_V_XQ 7 /* DEQNA/DELQA */
#define INT_V_RY 8 /* RXV21 */
/* IPL 14 */
#define INT_V_TTI 0 /* console */
#define INT_V_TTO 1
#define INT_V_PTR 2 /* PC11 */
#define INT_V_PTP 3
#define INT_V_LPT 4 /* LP11 */
#define INT_V_CSI 5 /* SSC cons UART */
#define INT_V_CSO 6
#define INT_V_TMR0 7 /* SSC timers */
#define INT_V_TMR1 8
#define INT_V_VHRX 9 /* DHQ11 */
#define INT_V_VHTX 10
#define INT_V_QDSS 11 /* QDSS */
#define INT_V_CR 12
#define INT_V_QVSS 13 /* QVSS */
#define INT_CLK (1u << INT_V_CLK)
#define INT_RQ (1u << INT_V_RQ)
#define INT_RL (1u << INT_V_RL)
#define INT_DZRX (1u << INT_V_DZRX)
#define INT_DZTX (1u << INT_V_DZTX)
#define INT_RP (1u << INT_V_RP)
#define INT_TS (1u << INT_V_TS)
#define INT_TQ (1u << INT_V_TQ)
#define INT_XQ (1u << INT_V_XQ)
#define INT_RY (1u << INT_V_RY)
#define INT_TTI (1u << INT_V_TTI)
#define INT_TTO (1u << INT_V_TTO)
#define INT_PTR (1u << INT_V_PTR)
#define INT_PTP (1u << INT_V_PTP)
#define INT_LPT (1u << INT_V_LPT)
#define INT_CSI (1u << INT_V_CSI)
#define INT_CSO (1u << INT_V_CSO)
#define INT_TMR0 (1u << INT_V_TMR0)
#define INT_TMR1 (1u << INT_V_TMR1)
#define INT_VHRX (1u << INT_V_VHRX)
#define INT_VHTX (1u << INT_V_VHTX)
#define INT_QDSS (1u << INT_V_QDSS)
#define INT_CR (1u << INT_V_CR)
#define INT_QVSS (1u << INT_V_QVSS)
#define IPL_CLK (0x16 - IPL_HMIN) /* relative IPL */
#define IPL_RQ (0x15 - IPL_HMIN)
#define IPL_RL (0x15 - IPL_HMIN)
#define IPL_DZRX (0x15 - IPL_HMIN)
#define IPL_DZTX (0x15 - IPL_HMIN)
#define IPL_RP (0x15 - IPL_HMIN)
#define IPL_TS (0x15 - IPL_HMIN)
#define IPL_TQ (0x15 - IPL_HMIN)
#define IPL_XQ (0x15 - IPL_HMIN)
#define IPL_RY (0x15 - IPL_HMIN)
#define IPL_TTI (0x14 - IPL_HMIN)
#define IPL_TTO (0x14 - IPL_HMIN)
#define IPL_PTR (0x14 - IPL_HMIN)
#define IPL_PTP (0x14 - IPL_HMIN)
#define IPL_LPT (0x14 - IPL_HMIN)
#define IPL_CSI (0x14 - IPL_HMIN)
#define IPL_CSO (0x14 - IPL_HMIN)
#define IPL_TMR0 (0x14 - IPL_HMIN)
#define IPL_TMR1 (0x14 - IPL_HMIN)
#define IPL_VHRX (0x14 - IPL_HMIN)
#define IPL_VHTX (0x14 - IPL_HMIN)
#define IPL_QDSS (0x14 - IPL_HMIN)
#define IPL_CR (0x14 - IPL_HMIN)
#define IPL_QVSS (0x14 - IPL_HMIN)
#define IPL_HMAX 0x17 /* highest hwre level */
#define IPL_HMIN 0x14 /* lowest hwre level */
#define IPL_HLVL (IPL_HMAX - IPL_HMIN + 1) /* # hardware levels */
#define IPL_SMAX 0xF /* highest swre level */
/* Device vectors */
#define VEC_QBUS 1 /* Qbus system */
#define VEC_Q 0x200 /* Qbus vector offset */
#define VEC_PTR (VEC_Q + 0070)
#define VEC_PTP (VEC_Q + 0074)
#define VEC_XQ (VEC_Q + 0120)
#define VEC_XU (VEC_Q + 0120)
#define VEC_RQ (VEC_Q + 0154)
#define VEC_RL (VEC_Q + 0160)
#define VEC_LPT (VEC_Q + 0200)
#define VEC_TS (VEC_Q + 0224)
#define VEC_CR (VEC_Q + 0230)
#define VEC_RP (VEC_Q + 0254)
#define VEC_TQ (VEC_Q + 0260)
#define VEC_RX (VEC_Q + 0264)
#define VEC_RY (VEC_Q + 0264)
#define VEC_DZRX (VEC_Q + 0300)
#define VEC_DZTX (VEC_Q + 0304)
#define VEC_VHRX (VEC_Q + 0310)
#define VEC_VHTX (VEC_Q + 0314)
/* Interrupt macros */
#define IVCL(dv) ((IPL_##dv * 32) + INT_V_##dv)
#define IREQ(dv) int_req[IPL_##dv]
#define SET_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] | (INT_##dv)
#define CLR_INT(dv) int_req[IPL_##dv] = int_req[IPL_##dv] & ~(INT_##dv)
#define IORETURN(f,v) ((f)? (v): SCPE_OK) /* cond error return */
/* Logging */
#define LOG_CPU_I 0x1 /* intexc */
#define LOG_CPU_R 0x2 /* REI */
#define LOG_CPU_P 0x4 /* context */
/* Function prototypes for virtual memory interface */
int32 Read (uint32 va, int32 lnt, int32 acc);
void Write (uint32 va, int32 val, int32 lnt, int32 acc);
/* Function prototypes for physical memory interface (inlined) */
SIM_INLINE int32 ReadB (uint32 pa);
SIM_INLINE int32 ReadW (uint32 pa);
SIM_INLINE int32 ReadL (uint32 pa);
SIM_INLINE int32 ReadLP (uint32 pa);
SIM_INLINE void WriteB (uint32 pa, int32 val);
SIM_INLINE void WriteW (uint32 pa, int32 val);
SIM_INLINE void WriteL (uint32 pa, int32 val);
void WriteLP (uint32 pa, int32 val);
/* Function prototypes for I/O */
int32 Map_ReadB (uint32 ba, int32 bc, uint8 *buf);
int32 Map_ReadW (uint32 ba, int32 bc, uint16 *buf);
int32 Map_WriteB (uint32 ba, int32 bc, uint8 *buf);
int32 Map_WriteW (uint32 ba, int32 bc, uint16 *buf);
int32 clk_cosched (int32 wait);
t_stat cpu_show_model (FILE *st, UNIT *uptr, int32 val, void *desc);
#include "pdp11_io_lib.h"
#endif

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VAX/vax630_io.c Normal file
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/* vax630_io.c: MicroVAX II Qbus IO simulator
Copyright (c) 2009-2012, Matt Burke
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name(s) of the author(s) shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author(s).
qba Qbus adapter
08-Nov-2012 MB First version
*/
#include "vax_defs.h"
/* Qbus IPC register */
#define QBIPC_QPE 0x00008000 /* Qbus dma parity err */
#define QBIPC_AHLT 0x00000100 /* aux halt NI */
#define QBIPC_DBIE 0x00000040 /* dbell int enb NI */
#define QBIPC_LME 0x00000020 /* local mem enb */
#define QBIPC_DB 0x00000001 /* doorbell req NI */
#define QBIPC_RW (QBIPC_AHLT | QBIPC_DBIE | QBIPC_LME | QBIPC_DB)
#define QBIPC_MASK (QBIPC_RW | QBIPC_QPE )
/* Qbus map registers */
#define QBNMAPR 8192 /* number of map reg */
#define QBMAP_VLD 0x80000000 /* valid */
#define QBMAP_PAG 0x00007FFF /* mem page */
#define QBMAP_RD (QBMAP_VLD | QBMAP_PAG)
#define QBMAP_WR (QBMAP_VLD | QBMAP_PAG)
/* KA630 Memory system error register */
#define MSER_NXM 0x00000080 /* CPU NXM */
int32 int_req[IPL_HLVL] = { 0 }; /* intr, IPL 14-17 */
int32 qb_ipc = 0; /* IPC */
int32 qb_map[QBNMAPR] = { 0 }; /* map registers */
int32 autcon_enb = 1; /* autoconfig enable */
extern int32 R[16];
extern uint32 *M;
extern UNIT cpu_unit;
extern int32 PSL, SISR, trpirq, mem_err, hlt_pin;
extern int32 p1;
extern jmp_buf save_env;
extern int32 sim_switches;
extern DEVICE *sim_devices[];
extern FILE *sim_log;
extern int32 ka_mser; /* KA630 mem sys err */
t_stat dbl_rd (int32 *data, int32 addr, int32 access);
t_stat dbl_wr (int32 data, int32 addr, int32 access);
int32 eval_int (void);
t_stat qba_reset (DEVICE *dptr);
t_stat qba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
t_stat qba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
t_bool qba_map_addr (uint32 qa, uint32 *ma);
t_bool qba_map_addr_c (uint32 qa, uint32 *ma);
t_stat set_autocon (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat show_autocon (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat qba_show_virt (FILE *of, UNIT *uptr, int32 val, void *desc);
/* Qbus adapter data structures
qba_dev QBA device descriptor
qba_unit QBA units
qba_reg QBA register list
*/
DIB qba_dib = { IOBA_DBL, IOLN_DBL, &dbl_rd, &dbl_wr, 0 };
UNIT qba_unit = { UDATA (NULL, 0, 0) };
REG qba_reg[] = {
{ HRDATA (IPC, qb_ipc, 16) },
{ HRDATA (IPL17, int_req[3], 32), REG_RO },
{ HRDATA (IPL16, int_req[2], 32), REG_RO },
{ HRDATA (IPL15, int_req[1], 32), REG_RO },
{ HRDATA (IPL14, int_req[0], 32), REG_RO },
{ BRDATA (MAP, qb_map, 16, 32, QBNMAPR) },
{ FLDATA (AUTOCON, autcon_enb, 0), REG_HRO },
{ NULL }
};
MTAB qba_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "IOSPACE", NULL,
NULL, &show_iospace },
{ MTAB_XTD|MTAB_VDV, 1, "AUTOCONFIG", "AUTOCONFIG",
&set_autocon, &show_autocon },
{ MTAB_XTD|MTAB_VDV, 0, NULL, "NOAUTOCONFIG",
&set_autocon, NULL },
{ MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_SHP, 0, "VIRTUAL", NULL,
NULL, &qba_show_virt },
{ 0 }
};
DEVICE qba_dev = {
"QBA", &qba_unit, qba_reg, qba_mod,
1, 16, QBMAWIDTH, 2, 16, 16,
&qba_ex, &qba_dep, &qba_reset,
NULL, NULL, NULL,
&qba_dib, DEV_QBUS
};
/* IO page dispatches */
t_stat (*iodispR[IOPAGESIZE >> 1])(int32 *dat, int32 ad, int32 md);
t_stat (*iodispW[IOPAGESIZE >> 1])(int32 dat, int32 ad, int32 md);
/* Interrupt request to interrupt action map */
int32 (*int_ack[IPL_HLVL][32])(void); /* int ack routines */
/* Interrupt request to vector map */
int32 int_vec[IPL_HLVL][32]; /* int req to vector */
/* The KA620/KA630 handles errors in I/O space as follows
- read: machine check
- write: machine check (?)
*/
int32 ReadQb (uint32 pa)
{
int32 idx, val;
idx = (pa & IOPAGEMASK) >> 1;
if (iodispR[idx]) {
iodispR[idx] (&val, pa, READ);
return val;
}
MACH_CHECK (MCHK_READ);
return 0;
}
void WriteQb (uint32 pa, int32 val, int32 mode)
{
int32 idx;
idx = (pa & IOPAGEMASK) >> 1;
if (iodispW[idx]) {
iodispW[idx] (val, pa, mode);
return;
}
MACH_CHECK (MCHK_WRITE);
return;
}
/* ReadIO - read I/O space
Inputs:
pa = physical address
lnt = length (BWLQ)
Output:
longword of data
*/
int32 ReadIO (uint32 pa, int32 lnt)
{
int32 iod;
iod = ReadQb (pa); /* wd from Qbus */
if (lnt < L_LONG) /* bw? position */
iod = iod << ((pa & 2)? 16: 0);
else iod = (ReadQb (pa + 2) << 16) | iod; /* lw, get 2nd wd */
SET_IRQL;
return iod;
}
/* WriteIO - write I/O space
Inputs:
pa = physical address
val = data to write, right justified in 32b longword
lnt = length (BWLQ)
Outputs:
none
*/
void WriteIO (uint32 pa, int32 val, int32 lnt)
{
if (lnt == L_BYTE)
WriteQb (pa, val, WRITEB);
else if (lnt == L_WORD)
WriteQb (pa, val, WRITE);
else {
WriteQb (pa, val & 0xFFFF, WRITE);
WriteQb (pa + 2, (val >> 16) & 0xFFFF, WRITE);
}
SET_IRQL;
return;
}
/* Find highest priority outstanding interrupt */
int32 eval_int (void)
{
int32 ipl = PSL_GETIPL (PSL);
int32 i, t;
static const int32 sw_int_mask[IPL_SMAX] = {
0xFFFE, 0xFFFC, 0xFFF8, 0xFFF0, /* 0 - 3 */
0xFFE0, 0xFFC0, 0xFF80, 0xFF00, /* 4 - 7 */
0xFE00, 0xFC00, 0xF800, 0xF000, /* 8 - B */
0xE000, 0xC000, 0x8000 /* C - E */
};
if (hlt_pin) /* hlt pin int */
return IPL_HLTPIN;
for (i = IPL_HMAX; i >= IPL_HMIN; i--) { /* chk hwre int */
if (i <= ipl) /* at ipl? no int */
return 0;
if (int_req[i - IPL_HMIN]) /* req != 0? int */
return i;
}
if (ipl >= IPL_SMAX) /* ipl >= sw max? */
return 0;
if ((t = SISR & sw_int_mask[ipl]) == 0) /* eligible req */
return 0;
for (i = IPL_SMAX; i > ipl; i--) { /* check swre int */
if ((t >> i) & 1) /* req != 0? int */
return i;
}
return 0;
}
/* Return vector for highest priority hardware interrupt at IPL lvl */
int32 get_vector (int32 lvl)
{
int32 i;
int32 l = lvl - IPL_HMIN;
if (lvl > IPL_HMAX) { /* error req lvl? */
ABORT (STOP_UIPL); /* unknown intr */
}
for (i = 0; int_req[l] && (i < 32); i++) {
if ((int_req[l] >> i) & 1) {
int_req[l] = int_req[l] & ~(1u << i);
if (int_ack[l][i])
return int_ack[l][i]();
return int_vec[l][i];
}
}
return 0;
}
/* I/O page routines */
t_stat dbl_rd (int32 *data, int32 addr, int32 access)
{
*data = qb_ipc & QBIPC_MASK;
return SCPE_OK;
}
t_stat dbl_wr (int32 data, int32 addr, int32 access)
{
int32 sc = (addr & 3) << 3;
int32 nval = data << sc;
qb_ipc = nval & QBIPC_RW;
if ((addr & 3) == 0) /* low byte only */
qb_ipc = ((qb_ipc & ~QBIPC_RW) | (data & QBIPC_RW)) & QBIPC_MASK;
qb_ipc = qb_ipc & ~QBIPC_AHLT; /* Read only on arbiter */
if (!(qb_ipc & QBIPC_DBIE))
qb_ipc = qb_ipc & ~QBIPC_DB; /* Read only when not DBIE */
return SCPE_OK;
}
/* Qbus map read and write
Read error: machine check?
Write error: machine check?
*/
int32 qbmap_rd (int32 pa)
{
int32 idx = ((pa - QBMAPBASE) >> 2);
return qb_map[idx] & QBMAP_RD;
}
void qbmap_wr (int32 pa, int32 val, int32 lnt)
{
int32 idx = ((pa - QBMAPBASE) >> 2);
if (idx < QBNMAPR) {
if (lnt < L_LONG) {
int32 sc = (pa & 3) << 3;
int32 mask = (lnt == L_WORD)? 0xFFFF: 0xFF;
int32 t = qb_map[idx];
val = ((val & mask) << sc) | (t & ~(mask << sc));
}
qb_map[idx] = val & QBMAP_WR;
}
else
ka_mser |= MSER_NXM;
return;
}
/* Qbus memory read and write (reflects to main memory)
May give master or slave error, depending on where the failure occurs
*/
int32 qbmem_rd (int32 pa)
{
int32 qa = pa & QBMAMASK; /* Qbus addr */
uint32 ma;
if (qba_map_addr (qa, &ma)) { /* map addr */
return M[ma >> 2];
}
MACH_CHECK (MCHK_READ); /* err? mcheck */
return 0;
}
void qbmem_wr (int32 pa, int32 val, int32 lnt)
{
int32 qa = pa & QBMAMASK; /* Qbus addr */
uint32 ma;
if (qba_map_addr (qa, &ma)) { /* map addr */
if (lnt < L_LONG) {
int32 sc = (pa & 3) << 3;
int32 mask = (lnt == L_WORD)? 0xFFFF: 0xFF;
int32 t = M[ma >> 2];
val = ((val & mask) << sc) | (t & ~(mask << sc));
}
M[ma >> 2] = val;
}
else mem_err = 1;
return;
}
/* Map an address via the translation map */
t_bool qba_map_addr (uint32 qa, uint32 *ma)
{
int32 qblk = (qa >> VA_V_VPN); /* Qbus blk */
if (qblk <= QBNMAPR) {
int32 qmap = qb_map[qblk];
if (qmap & QBMAP_VLD) { /* valid? */
*ma = ((qmap & QBMAP_PAG) << VA_V_VPN) + VA_GETOFF (qa);
if (ADDR_IS_MEM (*ma)) /* legit addr */
return TRUE;
ka_mser |= MSER_NXM;
return FALSE;
}
ka_mser |= MSER_NXM;
return FALSE;
}
ka_mser |= MSER_NXM;
return FALSE;
}
/* Map an address via the translation map - console version (no status changes) */
t_bool qba_map_addr_c (uint32 qa, uint32 *ma)
{
int32 qblk = (qa >> VA_V_VPN); /* Qbus blk */
if (qblk <= QBNMAPR) {
int32 qmap = qb_map[qblk];
if (qmap & QBMAP_VLD) { /* valid? */
*ma = ((qmap & QBMAP_PAG) << VA_V_VPN) + VA_GETOFF (qa);
return TRUE;
}
}
return FALSE;
}
/* Reset I/O bus */
void ioreset_wr (int32 data)
{
reset_all (5); /* from qba on... */
return;
}
/* Reset Qbus */
t_stat qba_reset (DEVICE *dptr)
{
int32 i;
for (i = 0; i < IPL_HLVL; i++)
int_req[i] = 0;
return SCPE_OK;
}
/* Qbus I/O buffer routines, aligned access
Map_ReadB - fetch byte buffer from memory
Map_ReadW - fetch word buffer from memory
Map_WriteB - store byte buffer into memory
Map_WriteW - store word buffer into memory
*/
int32 Map_ReadB (uint32 ba, int32 bc, uint8 *buf)
{
int32 i;
uint32 ma, dat;
if ((ba | bc) & 03) { /* check alignment */
for (i = ma = 0; i < bc; i++, buf++) { /* by bytes */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
*buf = ReadB (ma);
ma = ma + 1;
}
}
else {
for (i = ma = 0; i < bc; i = i + 4, buf++) { /* by longwords */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
dat = ReadL (ma); /* get lw */
*buf++ = dat & BMASK; /* low 8b */
*buf++ = (dat >> 8) & BMASK; /* next 8b */
*buf++ = (dat >> 16) & BMASK; /* next 8b */
*buf = (dat >> 24) & BMASK;
ma = ma + 4;
}
}
return 0;
}
int32 Map_ReadW (uint32 ba, int32 bc, uint16 *buf)
{
int32 i;
uint32 ma,dat;
ba = ba & ~01;
bc = bc & ~01;
if ((ba | bc) & 03) { /* check alignment */
for (i = ma = 0; i < bc; i = i + 2, buf++) { /* by words */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
*buf = ReadW (ma);
ma = ma + 2;
}
}
else {
for (i = ma = 0; i < bc; i = i + 4, buf++) { /* by longwords */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
dat = ReadL (ma); /* get lw */
*buf++ = dat & WMASK; /* low 16b */
*buf = (dat >> 16) & WMASK; /* high 16b */
ma = ma + 4;
}
}
return 0;
}
int32 Map_WriteB (uint32 ba, int32 bc, uint8 *buf)
{
int32 i;
uint32 ma, dat;
if ((ba | bc) & 03) { /* check alignment */
for (i = ma = 0; i < bc; i++, buf++) { /* by bytes */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
WriteB (ma, *buf);
ma = ma + 1;
}
}
else {
for (i = ma = 0; i < bc; i = i + 4, buf++) { /* by longwords */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
dat = (uint32) *buf++; /* get low 8b */
dat = dat | (((uint32) *buf++) << 8); /* merge next 8b */
dat = dat | (((uint32) *buf++) << 16); /* merge next 8b */
dat = dat | (((uint32) *buf) << 24); /* merge hi 8b */
WriteL (ma, dat); /* store lw */
ma = ma + 4;
}
}
return 0;
}
int32 Map_WriteW (uint32 ba, int32 bc, uint16 *buf)
{
int32 i;
uint32 ma, dat;
ba = ba & ~01;
bc = bc & ~01;
if ((ba | bc) & 03) { /* check alignment */
for (i = ma = 0; i < bc; i = i + 2, buf++) { /* by words */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
WriteW (ma, *buf);
ma = ma + 2;
}
}
else {
for (i = ma = 0; i < bc; i = i + 4, buf++) { /* by longwords */
if ((ma & VA_M_OFF) == 0) { /* need map? */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i);
}
dat = (uint32) *buf++; /* get low 16b */
dat = dat | (((uint32) *buf) << 16); /* merge hi 16b */
WriteL (ma, dat); /* store lw */
ma = ma + 4;
}
}
return 0;
}
/* Memory examine via map (word only) */
t_stat qba_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw)
{
uint32 qa = (uint32) exta, pa;
if ((vptr == NULL) || (qa >= QBMSIZE))
return SCPE_ARG;
if (qba_map_addr_c (qa, &pa) && ADDR_IS_MEM (pa)) {
*vptr = (uint32) ReadW (pa);
return SCPE_OK;
}
return SCPE_NXM;
}
/* Memory deposit via map (word only) */
t_stat qba_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw)
{
uint32 qa = (uint32) exta, pa;
if (qa >= QBMSIZE)
return SCPE_ARG;
if (qba_map_addr_c (qa, &pa) && ADDR_IS_MEM (pa)) {
WriteW (pa, (int32) val);
return SCPE_OK;
}
return SCPE_NXM;
}
/* Build dib_tab from device list */
t_stat build_dib_tab (void)
{
int32 i;
DEVICE *dptr;
DIB *dibp;
t_stat r;
init_ubus_tab (); /* init bus tables */
for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* loop thru dev */
dibp = (DIB *) dptr->ctxt; /* get DIB */
if (dibp && !(dptr->flags & DEV_DIS)) { /* defined, enabled? */
r = build_ubus_tab (dptr, dibp); /* add to bus tab */
if (r)
return r;
} /* end if enabled */
} /* end for */
return SCPE_OK;
}
/* Show QBA virtual address */
t_stat qba_show_virt (FILE *of, UNIT *uptr, int32 val, void *desc)
{
t_stat r;
char *cptr = (char *) desc;
uint32 qa, pa;
if (cptr) {
qa = (uint32) get_uint (cptr, 16, QBMSIZE - 1, &r);
if (r == SCPE_OK) {
if (qba_map_addr_c (qa, &pa))
fprintf (of, "Qbus %-X = physical %-X\n", qa, pa);
else fprintf (of, "Qbus %-X: invalid mapping\n", qa);
return SCPE_OK;
}
}
fprintf (of, "Invalid argument\n");
return SCPE_OK;
}

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VAX/vax630_stddev.c Normal file
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/* vax630_stddev.c: MicroVAX II standard I/O devices
Copyright (c) 2009-2012, Matt Burke
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name(s) of the author(s) shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author(s).
tti terminal input
tto terminal output
clk 100Hz and TODR clock
08-Nov-2012 MB First version
*/
#include "vax_defs.h"
#include <time.h>
#define TTICSR_IMP (CSR_DONE + CSR_IE) /* terminal input */
#define TTICSR_RW (CSR_IE)
#define TTIBUF_ERR 0x8000 /* error */
#define TTIBUF_OVR 0x4000 /* overrun */
#define TTIBUF_FRM 0x2000 /* framing error */
#define TTIBUF_RBR 0x0400 /* receive break */
#define TTOCSR_IMP (CSR_DONE + CSR_IE) /* terminal output */
#define TTOCSR_RW (CSR_IE)
#define CLKCSR_IMP (CSR_IE) /* real-time clock */
#define CLKCSR_RW (CSR_IE)
#define CLK_DELAY 5000 /* 100 Hz */
#define TMXR_MULT 1 /* 100 Hz */
extern int32 int_req[IPL_HLVL];
extern int32 hlt_pin;
extern int32 sim_switches;
int32 tti_csr = 0; /* control/status */
int32 tto_csr = 0; /* control/status */
int32 clk_csr = 0; /* control/status */
int32 clk_tps = 100; /* ticks/second */
int32 tmxr_poll = CLK_DELAY * TMXR_MULT; /* term mux poll */
int32 tmr_poll = CLK_DELAY; /* pgm timer poll */
t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat clk_svc (UNIT *uptr);
t_stat tti_reset (DEVICE *dptr);
t_stat tto_reset (DEVICE *dptr);
t_stat clk_reset (DEVICE *dptr);
extern int32 sysd_hlt_enb (void);
/* TTI data structures
tti_dev TTI device descriptor
tti_unit TTI unit descriptor
tti_reg TTI register list
*/
DIB tti_dib = { 0, 0, NULL, NULL, 1, IVCL (TTI), SCB_TTI, { NULL } };
UNIT tti_unit = { UDATA (&tti_svc, UNIT_IDLE|TT_MODE_8B, 0), 0 };
REG tti_reg[] = {
{ HRDATA (BUF, tti_unit.buf, 16) },
{ HRDATA (CSR, tti_csr, 16) },
{ FLDATA (INT, int_req[IPL_TTI], INT_V_TTI) },
{ FLDATA (DONE, tti_csr, CSR_V_DONE) },
{ FLDATA (IE, tti_csr, CSR_V_IE) },
{ DRDATA (POS, tti_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, tti_unit.wait, 24), PV_LEFT },
{ NULL }
};
MTAB tti_mod[] = {
{ TT_MODE, TT_MODE_7B, "7b", "7B", NULL },
{ TT_MODE, TT_MODE_8B, "8b", "8B", NULL },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
{ 0 }
};
DEVICE tti_dev = {
"TTI", &tti_unit, tti_reg, tti_mod,
1, 10, 31, 1, 16, 8,
NULL, NULL, &tti_reset,
NULL, NULL, NULL,
&tti_dib, 0
};
/* TTO data structures
tto_dev TTO device descriptor
tto_unit TTO unit descriptor
tto_reg TTO register list
*/
DIB tto_dib = { 0, 0, NULL, NULL, 1, IVCL (TTO), SCB_TTO, { NULL } };
UNIT tto_unit = { UDATA (&tto_svc, TT_MODE_8B, 0), SERIAL_OUT_WAIT };
REG tto_reg[] = {
{ HRDATA (BUF, tto_unit.buf, 8) },
{ HRDATA (CSR, tto_csr, 16) },
{ FLDATA (INT, int_req[IPL_TTO], INT_V_TTO) },
{ FLDATA (DONE, tto_csr, CSR_V_DONE) },
{ FLDATA (IE, tto_csr, CSR_V_IE) },
{ DRDATA (POS, tto_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, tto_unit.wait, 24), PV_LEFT },
{ NULL }
};
MTAB tto_mod[] = {
{ TT_MODE, TT_MODE_7B, "7b", "7B", NULL },
{ TT_MODE, TT_MODE_8B, "8b", "8B", NULL },
{ TT_MODE, TT_MODE_7P, "7p", "7P", NULL },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL, NULL, &show_vec },
{ 0 }
};
DEVICE tto_dev = {
"TTO", &tto_unit, tto_reg, tto_mod,
1, 10, 31, 1, 16, 8,
NULL, NULL, &tto_reset,
NULL, NULL, NULL,
&tto_dib, 0
};
/* CLK data structures
clk_dev CLK device descriptor
clk_unit CLK unit descriptor
clk_reg CLK register list
*/
DIB clk_dib = { 0, 0, NULL, NULL, 1, IVCL (CLK), SCB_INTTIM, { NULL } };
UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE, 0), CLK_DELAY };
REG clk_reg[] = {
{ HRDATA (CSR, clk_csr, 16) },
{ FLDATA (INT, int_req[IPL_CLK], INT_V_CLK) },
{ FLDATA (IE, clk_csr, CSR_V_IE) },
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (TPS, clk_tps, 8), REG_NZ + PV_LEFT },
{ NULL }
};
DEVICE clk_dev = {
"CLK", &clk_unit, clk_reg, NULL,
1, 0, 0, 0, 0, 0,
NULL, NULL, &clk_reset,
NULL, NULL, NULL,
&clk_dib, 0
};
/* Clock and terminal MxPR routines
iccs_rd/wr interval timer
todr_rd/wr time of year clock
rxcs_rd/wr input control/status
rxdb_rd input buffer
txcs_rd/wr output control/status
txdb_wr output buffer
*/
int32 iccs_rd (void)
{
return (clk_csr & CLKCSR_IMP);
}
int32 rxcs_rd (void)
{
return (tti_csr & TTICSR_IMP);
}
int32 rxdb_rd (void)
{
int32 t = tti_unit.buf; /* char + error */
tti_csr = tti_csr & ~CSR_DONE; /* clr done */
tti_unit.buf = tti_unit.buf & 0377; /* clr errors */
CLR_INT (TTI);
return t;
}
int32 txcs_rd (void)
{
return (tto_csr & TTOCSR_IMP);
}
void iccs_wr (int32 data)
{
if ((data & CSR_IE) == 0)
CLR_INT (CLK);
clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
return;
}
void rxcs_wr (int32 data)
{
if ((data & CSR_IE) == 0)
CLR_INT (TTI);
else if ((tti_csr & (CSR_DONE + CSR_IE)) == CSR_DONE)
SET_INT (TTI);
tti_csr = (tti_csr & ~TTICSR_RW) | (data & TTICSR_RW);
return;
}
void txcs_wr (int32 data)
{
if ((data & CSR_IE) == 0)
CLR_INT (TTO);
else if ((tto_csr & (CSR_DONE + CSR_IE)) == CSR_DONE)
SET_INT (TTO);
tto_csr = (tto_csr & ~TTOCSR_RW) | (data & TTOCSR_RW);
return;
}
void txdb_wr (int32 data)
{
tto_unit.buf = data & 0377;
tto_csr = tto_csr & ~CSR_DONE;
CLR_INT (TTO);
sim_activate (&tto_unit, tto_unit.wait);
return;
}
/* Terminal input routines
tti_svc process event (character ready)
tti_reset process reset
*/
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll)); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) { /* break? */
if (sysd_hlt_enb ()) /* if enabled, halt */
hlt_pin = 1;
tti_unit.buf = TTIBUF_ERR | TTIBUF_FRM | TTIBUF_RBR;
}
else tti_unit.buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
SET_INT (TTI);
return SCPE_OK;
}
t_stat tti_reset (DEVICE *dptr)
{
tti_unit.buf = 0;
tti_csr = 0;
CLR_INT (TTI);
sim_activate_abs (&tti_unit, KBD_WAIT (tti_unit.wait, tmr_poll));
return SCPE_OK;
}
/* Terminal output routines
tto_svc process event (character typed)
tto_reset process reset
*/
t_stat tto_svc (UNIT *uptr)
{
int32 c;
t_stat r;
c = sim_tt_outcvt (tto_unit.buf, TT_GET_MODE (uptr->flags));
if (c >= 0) {
if ((r = sim_putchar_s (c)) != SCPE_OK) { /* output; error? */
sim_activate (uptr, uptr->wait); /* retry */
return ((r == SCPE_STALL)? SCPE_OK: r); /* !stall? report */
}
}
tto_csr = tto_csr | CSR_DONE;
if (tto_csr & CSR_IE)
SET_INT (TTO);
uptr->pos = uptr->pos + 1;
return SCPE_OK;
}
t_stat tto_reset (DEVICE *dptr)
{
tto_unit.buf = 0;
tto_csr = CSR_DONE;
CLR_INT (TTO);
sim_cancel (&tto_unit); /* deactivate unit */
return SCPE_OK;
}
/* Clock routines
clk_svc process event (clock tick)
clk_reset process reset
todr_powerup powerup for TODR (get date from system)
*/
t_stat clk_svc (UNIT *uptr)
{
int32 t;
if (clk_csr & CSR_IE)
SET_INT (CLK);
t = sim_rtcn_calb (clk_tps, TMR_CLK); /* calibrate clock */
sim_activate (&clk_unit, t); /* reactivate unit */
tmr_poll = t; /* set tmr poll */
tmxr_poll = t * TMXR_MULT; /* set mux poll */
return SCPE_OK;
}
/* Clock coscheduling routine */
int32 clk_cosched (int32 wait)
{
int32 t;
t = sim_is_active (&clk_unit);
return (t? t - 1: wait);
}
/* Reset routine */
t_stat clk_reset (DEVICE *dptr)
{
int32 t;
clk_csr = 0;
CLR_INT (CLK);
t = sim_rtcn_init (clk_unit.wait, TMR_CLK); /* init timer */
sim_activate_abs (&clk_unit, t); /* activate unit */
tmr_poll = t; /* set tmr poll */
tmxr_poll = t * TMXR_MULT; /* set mux poll */
return SCPE_OK;
}

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/* vax630_sysdev.c: MicroVAX II system-specific logic
Copyright (c) 2009-2012, Matt Burke
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name(s) of the author(s) shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author(s).
This module contains the MicroVAX II system-specific registers and devices.
rom bootstrap ROM (no registers)
nvr non-volatile ROM (no registers)
sysd system devices
08-Nov-2012 MB First version
*/
#include "vax_defs.h"
#include <time.h>
#ifdef DONT_USE_INTERNAL_ROM
#if defined(VAX_620)
#define BOOT_CODE_FILENAME "ka620.bin"
#else
#define BOOT_CODE_FILENAME "ka320.bin"
#endif
#else /* !DONT_USE_INTERNAL_ROM */
#if defined(VAX_620)
#include "vax_ka620_bin.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#else
#include "vax_ka630_bin.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif
#endif /* DONT_USE_INTERNAL_ROM */
#define UNIT_V_NODELAY (UNIT_V_UF + 0) /* ROM access equal to RAM access */
#define UNIT_NODELAY (1u << UNIT_V_NODELAY)
extern CTAB *sim_vm_cmd;
t_stat vax630_boot (int32 flag, char *ptr);
/* Special boot command, overrides regular boot */
CTAB vax630_cmd[] = {
{ "BOOT", &vax630_boot, RU_BOOT,
"bo{ot} boot simulator\n", &run_cmd_message },
{ NULL }
};
/* KA630 boot/diagnostic register */
#define BDR_DISP 0x0000000F /* LED display */
#define BDR_V_BDC 8 /* boot/diag code */
#define BDR_M_BDC 0x3
#define BDR_BDC (BDR_M_BDC << BDR_V_BDC)
#define BDR_V_CPUC 11 /* cpu code */
#define BDR_M_CPUC 0x3
#define BDR_CPUC (BDR_M_CPUC << BDR_V_CPUC)
#define BDR_BRKENB 0x00004000 /* break enable */
#define BDR_POK 0x00008000 /* power ok */
#define BDR_RD (BDR_DISP | BDR_BDC | BDR_CPUC | BDR_BRKENB | BDR_POK)
#define BDR_WR (BDR_DISP)
/* BDR boot/diagnostic codes */
#define BDC_NORM 0x0 /* normal startup */
#define BDC_LNGI 0x1 /* language inquiry */
#define BDC_TSTL 0x2 /* test loop */
#define BDC_SKPM 0x3 /* skip mem test */
/* BDR CPU codes */
#define CPUC_ARB 0x0 /* arbiter */
#define CPUC_AUX1 0x1 /* auxiliary 1 */
#define CPUC_AUX2 0x2 /* auxiliary 2 */
#define CPUC_AUX3 0x3 /* auxiliary 3 */
/* KA630 Memory system error register */
#define MSER_PE 0x00000001 /* Parity Enable */
#define MSER_WWP 0x00000002 /* Write Wrong Parity */
#define MSER_LEB 0x00000008 /* Lost Error Bit */
#define MSER_DQPE 0x00000010 /* DMA Q22 Parity Err */
#define MSER_CQPE 0x00000020 /* CPU Q22 Parity Err */
#define MSER_CLPE 0x00000040 /* CPU Mem Parity Err */
#define MSER_NXM 0x00000080 /* CPU NXM */
#define MSER_MCD0 0x00000100 /* Mem Code 0 */
#define MSER_MCD1 0x00000200 /* Mem Code 1 */
#define MSER_MBZ 0xFFFFFC04
#define MSER_RD (MSER_PE | MSER_WWP | MSER_LEB | \
MSER_DQPE | MSER_CQPE | MSER_CLPE | \
MSER_NXM | MSER_MCD0 | MSER_MCD1)
#define MSER_WR (MSER_PE | MSER_WWP)
#define MSER_RS (MSER_LEB | MSER_DQPE | MSER_CQPE | MSER_CLPE | MSER_NXM)
/* KA630 CPU error address reg */
#define CEAR_LMADD 0x00007FFF /* local mem addr */
#define CEAR_RD (CEAR_LMADD)
/* KA630 DMA error address reg */
#define DEAR_LMADD 0x00007FFF /* local mem addr */
#define DEAR_RD (DEAR_LMADD)
extern int32 R[16];
extern int32 STK[5];
extern int32 PSL;
extern int32 SISR;
extern int32 SCBB;
extern int32 mapen;
extern int32 pcq[PCQ_SIZE];
extern int32 pcq_p;
extern int32 ibcnt, ppc;
extern int32 in_ie;
extern int32 mchk_va, mchk_ref;
extern int32 fault_PC;
extern int32 int_req[IPL_HLVL];
extern UNIT cpu_unit;
extern UNIT clk_unit;
extern jmp_buf save_env;
extern int32 p1;
extern int32 sim_switches;
extern int32 tmr_poll;
uint32 *rom = NULL; /* boot ROM */
uint32 *nvr = NULL; /* non-volatile mem */
int32 conisp, conpc, conpsl; /* console reg */
int32 ka_bdr = BDR_BRKENB; /* KA630 boot diag */
int32 ka_mser = 0; /* KA630 mem sys err */
int32 ka_cear = 0; /* KA630 cpu err */
int32 ka_dear = 0; /* KA630 dma err */
static uint32 rom_delay = 0;
t_bool rom_diag_full = 0;
t_stat rom_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
t_stat rom_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
t_stat rom_reset (DEVICE *dptr);
t_stat rom_set_diag (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat rom_show_diag (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat nvr_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
t_stat nvr_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
t_stat nvr_reset (DEVICE *dptr);
t_stat nvr_attach (UNIT *uptr, char *cptr);
t_stat nvr_detach (UNIT *uptr);
t_stat sysd_reset (DEVICE *dptr);
int32 rom_rd (int32 pa);
int32 nvr_rd (int32 pa);
void nvr_wr (int32 pa, int32 val, int32 lnt);
int32 ka_rd (int32 pa);
void ka_wr (int32 pa, int32 val, int32 lnt);
t_stat sysd_powerup (void);
int32 con_halt (int32 code, int32 cc);
extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
extern int32 qbmap_rd (int32 pa);
extern void qbmap_wr (int32 pa, int32 val, int32 lnt);
extern int32 qbmem_rd (int32 pa);
extern void qbmem_wr (int32 pa, int32 val, int32 lnt);
extern int32 wtc_rd (int32 pa);
extern void wtc_wr (int32 pa, int32 val, int32 lnt);
extern void wtc_set_valid (void);
extern void wtc_set_invalid (void);
extern int32 iccs_rd (void);
extern int32 todr_rd (void);
extern int32 rxcs_rd (void);
extern int32 rxdb_rd (void);
extern int32 txcs_rd (void);
extern void iccs_wr (int32 dat);
extern void todr_wr (int32 dat);
extern void rxcs_wr (int32 dat);
extern void txcs_wr (int32 dat);
extern void txdb_wr (int32 dat);
extern void ioreset_wr (int32 dat);
extern uint32 sim_os_msec();
/* ROM data structures
rom_dev ROM device descriptor
rom_unit ROM units
rom_reg ROM register list
*/
UNIT rom_unit = { UDATA (NULL, UNIT_FIX+UNIT_BINK, ROMSIZE) };
REG rom_reg[] = {
{ NULL }
};
MTAB rom_mod[] = {
{ UNIT_NODELAY, UNIT_NODELAY, "fast access", "NODELAY", NULL },
{ UNIT_NODELAY, 0, "1usec calibrated access", "DELAY", NULL },
{ MTAB_XTD|MTAB_VDV, 0, "DIAG", "DIAG={FULL|MIN}", &rom_set_diag, &rom_show_diag },
{ 0 }
};
DEVICE rom_dev = {
"ROM", &rom_unit, rom_reg, rom_mod,
1, 16, ROMAWIDTH, 4, 16, 32,
&rom_ex, &rom_dep, &rom_reset,
NULL, NULL, NULL,
NULL, 0
};
/* NVR data structures
nvr_dev NVR device descriptor
nvr_unit NVR units
nvr_reg NVR register list
*/
UNIT nvr_unit =
{ UDATA (NULL, UNIT_FIX+UNIT_BINK, NVRSIZE) };
REG nvr_reg[] = {
{ NULL }
};
DEVICE nvr_dev = {
"NVR", &nvr_unit, nvr_reg, NULL,
1, 16, NVRAWIDTH, 4, 16, 32,
&nvr_ex, &nvr_dep, &nvr_reset,
NULL, &nvr_attach, &nvr_detach,
NULL, 0
};
/* SYSD data structures
sysd_dev SYSD device descriptor
sysd_unit SYSD units
sysd_reg SYSD register list
*/
UNIT sysd_unit = { UDATA (NULL, 0, 0) };
REG sysd_reg[] = {
{ HRDATA (CONISP, conisp, 32) },
{ HRDATA (CONPC, conpc, 32) },
{ HRDATA (CONPSL, conpsl, 32) },
{ HRDATA (BDR, ka_bdr, 16) },
{ HRDATA (MSER, ka_mser, 8) },
{ HRDATA (CEAR, ka_cear, 8) },
{ HRDATA (DEAR, ka_dear, 8) },
{ NULL }
};
DEVICE sysd_dev = {
"SYSD", &sysd_unit, sysd_reg, NULL,
1, 16, 16, 1, 16, 8,
NULL, NULL, &sysd_reset,
NULL, NULL, NULL,
NULL, 0
};
/* ROM: read only memory - stored in a buffered file
Register space access routines see ROM twice
ROM access has been 'regulated' to about 1Mhz to avoid issues
with testing the interval timers in self-test. Specifically,
the VAX boot ROM (ka630.bin) contains code which presumes that
the VAX runs at a particular slower speed when code is running
from ROM (which is not cached). These assumptions are built
into instruction based timing loops. As the host platform gets
much faster than the original VAX, the assumptions embedded in
these code loops are no longer valid.
Code has been added to the ROM implementation to limit CPU speed
to about 500K instructions per second. This heads off any future
issues with the embedded timing loops.
*/
int32 rom_swapb(int32 val)
{
return ((val << 24) & 0xff000000) | (( val << 8) & 0xff0000) |
((val >> 8) & 0xff00) | ((val >> 24) & 0xff);
}
int32 rom_read_delay (int32 val)
{
uint32 i, l = rom_delay;
int32 loopval = 0;
if (rom_unit.flags & UNIT_NODELAY)
return val;
/* Calibrate the loop delay factor when first used.
Do this 4 times to and use the largest value computed. */
if (rom_delay == 0) {
uint32 ts, te, c = 10000, samples = 0;
while (1) {
c = c * 2;
te = sim_os_msec();
while (te == (ts = sim_os_msec ())); /* align on ms tick */
/* This is merely a busy wait with some "work" that won't get optimized
away by a good compiler. loopval always is zero. To avoid smart compilers,
the loopval variable is referenced in the function arguments so that the
function expression is not loop invariant. It also must be referenced
by subsequent code or to avoid the whole computation being eliminated. */
for (i = 0; i < c; i++)
loopval |= (loopval + ts) ^ rom_swapb (rom_swapb (loopval + ts));
te = sim_os_msec ();
if ((te - ts) < 50) /* sample big enough? */
continue;
if (rom_delay < (loopval + (c / (te - ts) / 1000) + 1))
rom_delay = loopval + (c / (te - ts) / 1000) + 1;
if (++samples >= 4)
break;
c = c / 2;
}
if (rom_delay < 5)
rom_delay = 5;
}
for (i = 0; i < l; i++)
loopval |= (loopval + val) ^ rom_swapb (rom_swapb (loopval + val));
return val + loopval;
}
int32 rom_rd (int32 pa)
{
int32 rg = ((pa - ROMBASE) & ROMAMASK) >> 2;
return rom_read_delay (rom[rg]);
}
void rom_wr_B (int32 pa, int32 val)
{
int32 rg = ((pa - ROMBASE) & ROMAMASK) >> 2;
int32 sc = (pa & 3) << 3;
rom[rg] = ((val & 0xFF) << sc) | (rom[rg] & ~(0xFF << sc));
return;
}
/* ROM examine */
t_stat rom_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw)
{
uint32 addr = (uint32) exta;
if ((vptr == NULL) || (addr & 03))
return SCPE_ARG;
if (addr >= ROMSIZE)
return SCPE_NXM;
*vptr = rom[addr >> 2];
return SCPE_OK;
}
/* ROM deposit */
t_stat rom_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw)
{
uint32 addr = (uint32) exta;
if (addr & 03)
return SCPE_ARG;
if (addr >= ROMSIZE)
return SCPE_NXM;
rom[addr >> 2] = (uint32) val;
return SCPE_OK;
}
/* ROM reset */
t_stat rom_reset (DEVICE *dptr)
{
if (rom == NULL)
rom = (uint32 *) calloc (ROMSIZE >> 2, sizeof (uint32));
if (rom == NULL)
return SCPE_MEM;
return SCPE_OK;
}
/* NVR: non-volatile RAM - stored in a buffered file */
int32 nvr_rd (int32 pa)
{
int32 rg = (pa - NVRBASE) >> 2;
if (rg < 7) /* watch chip */
return wtc_rd (pa);
else
return nvr[rg];
}
void nvr_wr (int32 pa, int32 val, int32 lnt)
{
int32 rg = (pa - NVRBASE) >> 2;
if (rg < 7) /* watch chip */
wtc_wr (pa, val, lnt);
else {
int32 sc = (pa & 3) << 3; /* merge */
int32 mask = 0xFF;
nvr[rg] = ((val & mask) << sc) | (nvr[rg] & ~(mask << sc));
}
}
/* NVR examine */
t_stat nvr_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw)
{
uint32 addr = (uint32) exta;
if ((vptr == NULL) || (addr & 03))
return SCPE_ARG;
if (addr >= NVRSIZE)
return SCPE_NXM;
*vptr = nvr[addr >> 2];
return SCPE_OK;
}
/* NVR deposit */
t_stat nvr_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw)
{
uint32 addr = (uint32) exta;
if (addr & 03)
return SCPE_ARG;
if (addr >= NVRSIZE)
return SCPE_NXM;
nvr[addr >> 2] = (uint32) val;
return SCPE_OK;
}
/* NVR reset */
t_stat nvr_reset (DEVICE *dptr)
{
if (nvr == NULL) {
nvr = (uint32 *) calloc (NVRSIZE >> 2, sizeof (uint32));
nvr_unit.filebuf = nvr;
}
if (nvr == NULL)
return SCPE_MEM;
return SCPE_OK;
}
/* NVR attach */
t_stat nvr_attach (UNIT *uptr, char *cptr)
{
t_stat r;
uptr->flags = uptr->flags | (UNIT_ATTABLE | UNIT_BUFABLE);
r = attach_unit (uptr, cptr);
if (r != SCPE_OK)
uptr->flags = uptr->flags & ~(UNIT_ATTABLE | UNIT_BUFABLE);
else {
uptr->hwmark = (uint32) uptr->capac;
wtc_set_valid ();
}
return r;
}
/* NVR detach */
t_stat nvr_detach (UNIT *uptr)
{
t_stat r;
r = detach_unit (uptr);
if ((uptr->flags & UNIT_ATT) == 0) {
uptr->flags = uptr->flags & ~(UNIT_ATTABLE | UNIT_BUFABLE);
wtc_set_invalid ();
}
return r;
}
/* Read KA630 specific IPR's */
int32 ReadIPR (int32 rg)
{
int32 val;
switch (rg) {
case MT_ICCS: /* ICCS */
val = iccs_rd ();
break;
case MT_RXCS: /* RXCS */
val = rxcs_rd ();
break;
case MT_RXDB: /* RXDB */
val = rxdb_rd ();
break;
case MT_TXCS: /* TXCS */
val = txcs_rd ();
break;
case MT_TXDB: /* TXDB */
val = 0;
break;
case MT_CONISP: /* console ISP */
val = conisp;
break;
case MT_CONPC: /* console PC */
val = conpc;
break;
case MT_CONPSL: /* console PSL */
val = conpsl;
break;
case MT_SID: /* SID */
#if defined(VAX_620)
val = VAX620_SID;
#else
val = VAX630_SID;
#endif
break;
case MT_NICR: /* NICR */
case MT_ICR: /* ICR */
case MT_TODR: /* TODR */
case MT_CSRS: /* CSRS */
case MT_CSRD: /* CSRD */
case MT_CSTS: /* CSTS */
case MT_CSTD: /* CSTD */
case MT_TBDR: /* TBDR */
case MT_CADR: /* CADR */
case MT_MCESR: /* MCESR */
case MT_CAER: /* CAER */
case MT_SBIFS: /* SBIFS */
case MT_SBIS: /* SBIS */
case MT_SBISC: /* SBISC */
case MT_SBIMT: /* SBIMT */
case MT_SBIER: /* SBIER */
case MT_SBITA: /* SBITA */
case MT_SBIQC: /* SBIQC */
case MT_TBDATA: /* TBDATA */
case MT_MBRK: /* MBRK */
case MT_PME: /* PME */
val = 0;
break;
default:
RSVD_OPND_FAULT;
}
return val;
}
/* Write KA630 specific IPR's */
void WriteIPR (int32 rg, int32 val)
{
switch (rg) {
case MT_ICCS: /* ICCS */
iccs_wr (val);
break;
case MT_RXCS: /* RXCS */
rxcs_wr (val);
break;
case MT_RXDB: /* RXDB */
break;
case MT_TXCS: /* TXCS */
txcs_wr (val);
break;
case MT_TXDB: /* TXDB */
txdb_wr (val);
break;
case MT_IORESET: /* IORESET */
ioreset_wr (val);
break;
case MT_SID:
case MT_CONISP:
case MT_CONPC:
case MT_CONPSL: /* halt reg */
RSVD_OPND_FAULT;
case MT_NICR: /* NICR */
case MT_ICR: /* ICR */
case MT_TODR: /* TODR */
case MT_CSRS: /* CSRS */
case MT_CSRD: /* CSRD */
case MT_CSTS: /* CSTS */
case MT_CSTD: /* CSTD */
case MT_TBDR: /* TBDR */
case MT_CADR: /* CADR */
case MT_MCESR: /* MCESR */
case MT_CAER: /* CAER */
case MT_SBIFS: /* SBIFS */
case MT_SBIS: /* SBIS */
case MT_SBISC: /* SBISC */
case MT_SBIMT: /* SBIMT */
case MT_SBIER: /* SBIER */
case MT_SBITA: /* SBITA */
case MT_SBIQC: /* SBIQC */
case MT_TBDATA: /* TBDATA */
case MT_MBRK: /* MBRK */
case MT_PME: /* PME */
break;
default:
RSVD_OPND_FAULT;
}
return;
}
/* Read/write I/O register space
These routines are the 'catch all' for address space map. Any
address that doesn't explicitly belong to memory, I/O, or ROM
is given to these routines for processing.
*/
struct reglink { /* register linkage */
uint32 low; /* low addr */
uint32 high; /* high addr */
t_stat (*read)(int32 pa); /* read routine */
void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
};
struct reglink regtable[] = {
{ QBMAPBASE, QBMAPBASE+QBMAPSIZE, &qbmap_rd, &qbmap_wr },
{ ROMBASE, ROMBASE+ROMSIZE+ROMSIZE, &rom_rd, NULL },
{ NVRBASE, NVRBASE+NVRSIZE, &nvr_rd, &nvr_wr },
{ KABASE, KABASE+KASIZE, &ka_rd, &ka_wr },
/* { QVMBASE, QVMBASE+QVMSIZE, &qv_mem_rd, &qv_mem_wr }, */
{ QBMBASE, QBMBASE+QBMSIZE, &qbmem_rd, &qbmem_wr },
{ 0, 0, NULL, NULL }
};
/* ReadReg - read register space
Inputs:
pa = physical address
lnt = length (BWLQ) - ignored
Output:
longword of data
*/
int32 ReadReg (uint32 pa, int32 lnt)
{
struct reglink *p;
for (p = &regtable[0]; p->low != 0; p++) {
if ((pa >= p->low) && (pa < p->high) && p->read)
return p->read (pa);
}
MACH_CHECK (MCHK_READ);
}
/* WriteReg - write register space
Inputs:
pa = physical address
val = data to write, right justified in 32b longword
lnt = length (BWLQ)
Outputs:
none
*/
void WriteReg (uint32 pa, int32 val, int32 lnt)
{
struct reglink *p;
for (p = &regtable[0]; p->low != 0; p++) {
if ((pa >= p->low) && (pa < p->high) && p->write) {
p->write (pa, val, lnt);
return;
}
}
MACH_CHECK (MCHK_WRITE);
}
/* KA630 registers */
int32 ka_rd (int32 pa)
{
int32 rg = (pa - KABASE) >> 2;
switch (rg) {
case 0: /* BDR */
return ka_bdr & BDR_RD;
case 1: /* MSER */
return ka_mser & MSER_RD;
case 2: /* CEAR */
return ka_cear & CEAR_RD;
case 3: /* DEAR */
return ka_dear & DEAR_RD;
}
return 0;
}
void ka_wr (int32 pa, int32 val, int32 lnt)
{
int32 rg = (pa - KABASE) >> 2;
switch (rg) {
case 0: /* BDR */
ka_bdr = (ka_bdr & ~BDR_WR) | (val & BDR_WR);
break;
case 1: /* MSER */
ka_mser = (ka_mser & ~MSER_WR) | (val & MSER_WR);
ka_mser = ka_mser & ~(val & MSER_RS);
break;
case 2: /* CEAR */
case 3: /* DEAR */
break;
}
return;
}
int32 sysd_hlt_enb (void)
{
return ka_bdr & BDR_BRKENB;
}
/* Machine check */
int32 machine_check (int32 p1, int32 opc, int32 cc, int32 delta)
{
int32 st, p2, acc;
if (in_ie) {
in_ie = 0;
return con_halt(CON_DBLMCK, cc); /* double machine check */
}
if (p1 & 0x80) /* mref? set v/p */
p1 = p1 + mchk_ref;
p2 = mchk_va + 4; /* save vap */
st = 0;
if (p1 & 0x80) { /* mref? */
cc = intexc (SCB_MCHK, cc, 0, IE_EXC); /* take normal exception */
if (!(ka_mser & MSER_CQPE) && !(ka_mser & MSER_CLPE))
ka_mser |= MSER_NXM;
}
else cc = intexc (SCB_MCHK, cc, 0, IE_SVE); /* take severe exception */
acc = ACC_MASK (KERN); /* in kernel mode */
in_ie = 1;
SP = SP - 16; /* push 4 words */
Write (SP, 12, L_LONG, WA); /* # bytes */
Write (SP + 4, p1, L_LONG, WA); /* mcheck type */
Write (SP + 8, p2, L_LONG, WA); /* address */
Write (SP + 12, st, L_LONG, WA); /* state */
in_ie = 0;
return cc;
}
/* Console entry */
int32 con_halt (int32 code, int32 cc)
{
int32 temp;
conisp = IS; /* save ISP */
conpc = PC; /* save PC */
conpsl = ((PSL | cc) & 0xFFFF00FF) | code; /* PSL, param */
temp = (PSL >> PSL_V_CUR) & 0x7; /* get is'cur */
if (temp > 4) /* invalid? */
conpsl = conpsl | CON_BADPSL;
else STK[temp] = SP; /* save stack */
if (mapen) /* mapping on? */
conpsl = conpsl | CON_MAPON;
mapen = 0; /* turn off map */
SP = IS; /* set SP from IS */
PSL = PSL_IS | PSL_IPL1F; /* PSL = 41F0000 */
JUMP (ROMBASE); /* PC = 20040000 */
return 0; /* new cc = 0 */
}
/* Special boot command - linked into SCP by initial reset
Syntax: BOOT {CPU}
*/
t_stat vax630_boot (int32 flag, char *ptr)
{
char gbuf[CBUFSIZE];
get_glyph (ptr, gbuf, 0); /* get glyph */
if (gbuf[0] && strcmp (gbuf, "CPU"))
return SCPE_ARG; /* Only can specify CPU device */
return run_cmd (flag, "CPU");
}
/* Bootstrap */
t_stat cpu_boot (int32 unitno, DEVICE *dptr)
{
extern t_stat load_cmd (int32 flag, char *cptr);
extern FILE *sim_log;
t_stat r;
PC = ROMBASE;
PSL = PSL_IS | PSL_IPL1F;
conisp = 0;
conpc = 0;
conpsl = PSL_IS | PSL_IPL1F | CON_PWRUP;
if (rom == NULL)
return SCPE_IERR;
if (*rom == 0) { /* no boot? */
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, TRUE, 0);
if (r != SCPE_OK)
return r;
}
return SCPE_OK;
}
t_stat rom_set_diag (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (cptr != NULL) rom_diag_full = strcmp(cptr, "MIN");
return SCPE_OK;
}
t_stat rom_show_diag (FILE *st, UNIT *uptr, int32 val, void *desc)
{
fprintf(st, "diag=%s", (rom_diag_full ? "full" :"min"));
return SCPE_OK;
}
/* SYSD reset */
t_stat sysd_reset (DEVICE *dptr)
{
if (sim_switches & SWMASK ('P')) sysd_powerup (); /* powerup? */
ka_bdr = (BDR_POK | \
((rom_diag_full ? BDC_NORM : BDC_SKPM) << BDR_V_BDC) | \
(CPUC_ARB << BDR_V_CPUC) | \
BDR_BRKENB | \
0xF);
ka_mser = 0;
ka_cear = 0;
ka_dear = 0;
sim_vm_cmd = vax630_cmd;
return SCPE_OK;
}
/* SYSD powerup */
t_stat sysd_powerup (void)
{
rom_diag_full = 0;
return SCPE_OK;
}
t_stat cpu_show_model (FILE *st, UNIT *uptr, int32 val, void *desc)
{
#if defined(VAX_620)
fprintf (st, "model=rtVAX 1000");
#else
fprintf (st, "model=MicroVAX II");
#endif
return SCPE_OK;
}

136
VAX/vax630_syslist.c Normal file
View file

@ -0,0 +1,136 @@
/* vax630_syslist.c: MicroVAX II device list
Copyright (c) 2009-2012, Matt Burke
This module incorporates code from SimH, Copyright (c) 1998-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name(s) of the author(s) shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author(s).
08-Nov-2012 MB First version
*/
#include "vax_defs.h"
#if defined(VAX_620)
char sim_name[] = "VAX620";
#else
char sim_name[] = "VAX630";
#endif
extern DEVICE cpu_dev;
extern DEVICE tlb_dev;
extern DEVICE rom_dev;
extern DEVICE nvr_dev;
extern DEVICE wtc_dev;
extern DEVICE sysd_dev;
extern DEVICE qba_dev;
extern DEVICE tti_dev, tto_dev;
extern DEVICE cr_dev;
extern DEVICE lpt_dev;
extern DEVICE clk_dev;
extern DEVICE rq_dev, rqb_dev, rqc_dev, rqd_dev;
extern DEVICE rl_dev;
extern DEVICE ry_dev;
extern DEVICE ts_dev;
extern DEVICE tq_dev;
extern DEVICE dz_dev;
extern DEVICE xq_dev, xqb_dev;
extern DEVICE vh_dev;
extern int32 sim_switches;
extern void WriteB (uint32 pa, int32 val);
extern void rom_wr_B (int32 pa, int32 val);
extern UNIT cpu_unit;
DEVICE *sim_devices[] = {
&cpu_dev,
&tlb_dev,
&rom_dev,
&nvr_dev,
&wtc_dev,
&sysd_dev,
&qba_dev,
&clk_dev,
&tti_dev,
&tto_dev,
&dz_dev,
&vh_dev,
&cr_dev,
&lpt_dev,
&rl_dev,
&rq_dev,
&rqb_dev,
&rqc_dev,
&rqd_dev,
&ry_dev,
&ts_dev,
&tq_dev,
&xq_dev,
&xqb_dev,
NULL
};
/* Binary loader
The binary loader handles absolute system images, that is, system
images linked /SYSTEM. These are simply a byte stream, with no
origin or relocation information.
-r load ROM
-n load NVR
-o for memory, specify origin
*/
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
t_stat r;
int32 i;
uint32 origin, limit;
if (flag) /* dump? */
return SCPE_ARG;
if (sim_switches & SWMASK ('R')) { /* ROM? */
origin = ROMBASE;
limit = ROMBASE + ROMSIZE;
}
else if (sim_switches & SWMASK ('N')) { /* NVR? */
origin = NVRBASE;
limit = NVRBASE + NVRSIZE;
}
else {
origin = 0; /* memory */
limit = (uint32) cpu_unit.capac;
if (sim_switches & SWMASK ('O')) { /* origin? */
origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r);
if (r != SCPE_OK)
return SCPE_ARG;
}
}
while ((i = getc (fileref)) != EOF) { /* read byte stream */
if (origin >= limit) /* NXM? */
return SCPE_NXM;
if (sim_switches & SWMASK ('R')) /* ROM? */
rom_wr_B (origin, i); /* not writeable */
else WriteB (origin, i); /* store byte */
origin = origin + 1;
}
return SCPE_OK;
}

34
VAX/vax730_sys.c
View file

@ -34,9 +34,13 @@
#include "vax_defs.h"
#ifndef DONT_USE_INTERNAL_ROM
#include "vax_vmb_exe.h"
#endif
#ifdef DONT_USE_INTERNAL_ROM
#define BOOT_CODE_FILENAME "vmb.exe"
#define BOOT_CODE_ARRAY NULL
#define BOOT_CODE_SIZE 0
#else /* !DONT_USE_INTERNAL_ROM */
#include "vax_vmb_exe.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif /* DONT_USE_INTERNAL_ROM */
static char cpu_boot_cmd[CBUFSIZE] = { 0 }; /* boot command */
@ -545,30 +549,10 @@ t_stat cpu_boot (int32 unitno, DEVICE *dptr)
{
t_stat r;
printf ("Loading boot code from vmb.exe\n");
if (sim_log) fprintf (sim_log,
"Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r != SCPE_OK) {
#ifndef DONT_USE_INTERNAL_ROM
FILE *f;
if ((f = sim_fopen ("vmb.exe", "wb"))) {
printf ("Saving boot code to vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Saving boot code to vmb.exe\n");
sim_fwrite (vax_vmb_exe, sizeof(vax_vmb_exe[0]), sizeof(vax_vmb_exe)/sizeof(vax_vmb_exe[0]), f);
fclose (f);
printf ("Loading boot code from vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r == SCPE_OK)
SP = PC = 512;
}
#endif
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, FALSE, 0x200);
if (r != SCPE_OK)
return r;
}
SP = PC = 512;
return SCPE_OK;
}

33
VAX/vax750_cmi.c
View file

@ -33,9 +33,11 @@
#include "vax_defs.h"
#ifndef DONT_USE_INTERNAL_ROM
#include "vax_vmb_exe.h"
#endif
#ifdef DONT_USE_INTERNAL_ROM
#define BOOT_CODE_FILENAME "vmb.exe"
#else /* !DONT_USE_INTERNAL_ROM */
#include "vax_vmb_exe.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif /* DONT_USE_INTERNAL_ROM */
/* 11/750 specific IPRs */
@ -635,30 +637,9 @@ t_stat cpu_boot (int32 unitno, DEVICE *dptr)
{
t_stat r;
printf ("Loading boot code from vmb.exe\n");
if (sim_log) fprintf (sim_log,
"Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r != SCPE_OK) {
#ifndef DONT_USE_INTERNAL_ROM
FILE *f;
if ((f = sim_fopen ("vmb.exe", "wb"))) {
printf ("Saving boot code to vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Saving boot code to vmb.exe\n");
sim_fwrite (vax_vmb_exe, sizeof(vax_vmb_exe[0]), sizeof(vax_vmb_exe)/sizeof(vax_vmb_exe[0]), f);
fclose (f);
printf ("Loading boot code from vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r == SCPE_OK)
SP = PC = 512;
}
#endif
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, FALSE, 0x200);
if (r != SCPE_OK)
return r;
}
SP = PC = 512;
return SCPE_OK;
}

33
VAX/vax780_sbi.c
View file

@ -36,9 +36,11 @@
#include "vax_defs.h"
#ifndef DONT_USE_INTERNAL_ROM
#include "vax_vmb_exe.h"
#endif
#ifdef DONT_USE_INTERNAL_ROM
#define BOOT_CODE_FILENAME "vmb.exe"
#else /* !DONT_USE_INTERNAL_ROM */
#include "vax_vmb_exe.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif /* DONT_USE_INTERNAL_ROM */
/* 11/780 specific IPRs */
@ -694,30 +696,9 @@ t_stat cpu_boot (int32 unitno, DEVICE *dptr)
{
t_stat r;
printf ("Loading boot code from vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r != SCPE_OK) {
#ifndef DONT_USE_INTERNAL_ROM
FILE *f;
if ((f = sim_fopen ("vmb.exe", "wb"))) {
printf ("Saving boot code to vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Saving boot code to vmb.exe\n");
sim_fwrite (vax_vmb_exe, sizeof(vax_vmb_exe[0]), sizeof(vax_vmb_exe)/sizeof(vax_vmb_exe[0]), f);
fclose (f);
printf ("Loading boot code from vmb.exe\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from vmb.exe\n");
r = load_cmd (0, "-O vmb.exe 200");
if (r == SCPE_OK)
SP = PC = 512;
}
#endif
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, FALSE, 0x200);
if (r != SCPE_OK)
return r;
}
SP = PC = 512;
return SCPE_OK;
}

41
VAX/vax_cpu.c
View file

@ -468,7 +468,7 @@ REG cpu_reg[] = {
MTAB cpu_mod[] = {
{ UNIT_CONH, 0, "HALT to SIMH", "SIMHALT", NULL },
{ UNIT_CONH, UNIT_CONH, "HALT to console", "CONHALT", NULL },
{ MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &cpu_set_idle, &cpu_show_idle },
{ MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE={VMS|ULTRIX|NETBSD|OPENBSD|ULTRIXOLD|OPENBSDOLD|QUASIJARUS|32V|ALL}", &cpu_set_idle, &cpu_show_idle },
{ MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL },
MEM_MODIFIERS, /* Model specific memory modifiers from vaxXXX_defs.h */
{ MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_SHP, 0, "HISTORY", "HISTORY",
@ -583,8 +583,11 @@ else if (abortval < 0) { /* mm or rsrv or int */
break;
case SCB_MCHK: /* machine check */
/* The ka630 and ka620 CPU ROMs use double machine checks to size memory */
#if !defined(VAX_620) && !defined(VAX_630)
if (in_ie) /* in exc? panic */
ABORT (STOP_INIE);
#endif
cc = machine_check (p1, opc, cc, delta); /* system specific */
in_ie = 0;
GET_CUR; /* PSL<cur> changed */
@ -3454,3 +3457,39 @@ if (sim_idle_enab && (cpu_idle_type != 0))
sim_show_idle (st, uptr, val, desc);
return SCPE_OK;
}
t_stat cpu_load_bootcode (const char *filename, const unsigned char *builtin_code, size_t size, t_bool rom, t_addr offset)
{
extern FILE *sim_log;
char args[CBUFSIZE];
t_stat r;
printf ("Loading boot code from %s\n", filename);
if (sim_log)
fprintf (sim_log, "Loading boot code from %s\n", filename);
if (rom)
sprintf (args, "-R %s", filename);
else
sprintf (args, "-O %s %X", filename, offset);
r = load_cmd (0, args);
if (r != SCPE_OK) {
if (builtin_code) {
FILE *f;
if ((f = sim_fopen (filename, "wb"))) {
printf ("Saving boot code to %s\n", filename);
if (sim_log)
fprintf (sim_log, "Saving boot code to %s\n", filename);
sim_fwrite ((void *)builtin_code, 1, size, f);
fclose (f);
printf ("Loading boot code from %s\n", filename);
if (sim_log)
fprintf (sim_log, "Loading boot code from %s\n", filename);
r = load_cmd (0, args);
}
}
return r;
}
return SCPE_OK;
}

10
VAX/vax_defs.h
View file

@ -736,11 +736,19 @@ void cpu_idle (void);
#include "vax730_defs.h"
#elif defined (VAX_610)
#include "vax610_defs.h"
#else
#elif defined (VAX_620) || defined (VAX_630)
#include "vax630_defs.h"
#else /* VAX 3900 */
#include "vaxmod_defs.h"
#endif
#ifndef CPU_MODEL_MODIFIERS
#define CPU_MODEL_MODIFIERS /* No model specific CPU modifiers */
#endif
#ifdef DONT_USE_INTERNAL_ROM
#define BOOT_CODE_ARRAY NULL
#define BOOT_CODE_SIZE 0
#endif
extern t_stat cpu_load_bootcode (const char *filename, const unsigned char *builtin_code, size_t size, t_bool rom, t_addr offset);
#endif /* _VAX_DEFS_H */

2071
VAX/vax_ka610_bin.h
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File diff suppressed because it is too large Load diff

4109
VAX/vax_ka620_bin.h Normal file
View file

File diff suppressed because it is too large Load diff

4109
VAX/vax_ka630_bin.h Normal file
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File diff suppressed because it is too large Load diff

16406
VAX/vax_ka655x_bin.h
View file

File diff suppressed because it is too large Load diff

61
VAX/vax_sysdev.c
View file

@ -54,13 +54,27 @@
#include "vax_defs.h"
#ifndef DONT_USE_INTERNAL_ROM
#include "vax_ka655x_bin.h"
#endif
#ifdef DONT_USE_INTERNAL_ROM
#define BOOT_CODE_FILENAME "ka655x.bin"
#else /* !DONT_USE_INTERNAL_ROM */
#include "vax_ka655x_bin.h" /* Defines BOOT_CODE_FILENAME and BOOT_CODE_ARRAY, etc */
#endif /* DONT_USE_INTERNAL_ROM */
#define UNIT_V_NODELAY (UNIT_V_UF + 0) /* ROM access equal to RAM access */
#define UNIT_NODELAY (1u << UNIT_V_NODELAY)
extern CTAB *sim_vm_cmd;
t_stat vax_boot (int32 flag, char *ptr);
/* Special boot command, overrides regular boot */
CTAB vax_cmd[] = {
{ "BOOT", &vax_boot, RU_BOOT,
"bo{ot} boot simulator\n", &run_cmd_message },
{ NULL }
};
/* Console storage control/status */
#define CSICSR_IMP (CSR_DONE + CSR_IE) /* console input */
@ -1541,6 +1555,23 @@ JUMP (ROMBASE); /* PC = 20040000 */
return 0; /* new cc = 0 */
}
/* Special boot command - linked into SCP by initial reset
Syntax: BOOT {CPU}
*/
t_stat vax_boot (int32 flag, char *ptr)
{
char gbuf[CBUFSIZE];
get_glyph (ptr, gbuf, 0); /* get glyph */
if (gbuf[0] && strcmp (gbuf, "CPU"))
return SCPE_ARG; /* Only can specify CPU device */
return run_cmd (flag, "CPU");
}
/* Bootstrap */
t_stat cpu_boot (int32 unitno, DEVICE *dptr)
@ -1556,28 +1587,9 @@ conpsl = PSL_IS | PSL_IPL1F | CON_PWRUP;
if (rom == NULL)
return SCPE_IERR;
if (*rom == 0) { /* no boot? */
printf ("Loading boot code from ka655x.bin\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from ka655x.bin\n");
r = load_cmd (0, "-R ka655x.bin");
if (r != SCPE_OK) {
#ifndef DONT_USE_INTERNAL_ROM
FILE *f;
if ((f = sim_fopen ("ka655x.bin", "wb"))) {
printf ("Saving boot code to ka655x.bin\n");
if (sim_log)
fprintf (sim_log, "Saving boot code to ka655x.bin\n");
sim_fwrite (vax_ka655x_bin, sizeof(vax_ka655x_bin[0]), sizeof(vax_ka655x_bin)/sizeof(vax_ka655x_bin[0]), f);
fclose (f);
printf ("Loading boot code from ka655x.bin\n");
if (sim_log)
fprintf (sim_log, "Loading boot code from ka655x.bin\n");
r = load_cmd (0, "-R ka655x.bin");
}
#endif
r = cpu_load_bootcode (BOOT_CODE_FILENAME, BOOT_CODE_ARRAY, BOOT_CODE_SIZE, TRUE, 0);
if (r != SCPE_OK)
return r;
}
}
sysd_powerup ();
return SCPE_OK;
@ -1603,6 +1615,7 @@ cso_csr = CSR_DONE;
cso_unit.buf = 0;
sim_cancel (&cso_unit);
CLR_INT (CSO);
sim_vm_cmd = vax_cmd;
return SCPE_OK;
}

7
VAX/vax_vmb_exe.h
View file

@ -1,11 +1,14 @@
#ifndef ROM_vax_vmb_exe_H
#define ROM_vax_vmb_exe_H 0
/*
VAX/vax_vmb_exe.h produced at Mon Oct 22 06:06:02 2012
from VAX/vmb.exe which was last modified at Sun Oct 21 18:12:55 2012
VAX/vax_vmb_exe.h produced at Fri Nov 09 06:40:16 2012
from VAX/vmb.exe which was last modified at Sun Oct 21 17:12:55 2012
file size: 44544 (0xAE00) - checksum: 0xFFC014CC
This file is a generated file and should NOT be edited or changed by hand.
*/
#define BOOT_CODE_SIZE 0xAE00
#define BOOT_CODE_FILENAME "vmb.exe"
#define BOOT_CODE_ARRAY vax_vmb_exe
unsigned char vax_vmb_exe[] = {
0xD4,0xEF,0x34,0x61,0x00,0x00,0x17,0xEF,0xB8,0x5D,0x00,0x00,0xC1,0xAB,0x38,0xAB,
0x34,0x57,0xC0,0x8F,0x00,0x02,0x00,0x00,0x57,0xCA,0x8F,0xFF,0x01,0x00,0x00,0x57,

217
VAX/vax_watch.c Normal file
View file

@ -0,0 +1,217 @@
/* vax_watch.c: VAX watch chip
Copyright (c) 2011-2012, Matt Burke
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of the author shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the author.
wtc Watch chip
08-Nov-2012 MB First version
This file covers the watch chip (MC146818) which is used by several VAX
models including the KA620, KA630, KA410, KA420 and KA820.
*/
#include "vax_defs.h"
#include <time.h>
/* control/status registers */
#define WTC_CSRA_RS 0x0F
#define WTC_CSRA_V_DV 4
#define WTC_CSRA_M_DV 0x7
#define WTC_CSRA_DV (WTC_CSRA_M_DV << WTC_CSRA_V_DV)
#define WTC_CSRA_UIP 0x80 /* update in progess */
#define WTC_CSRA_WR (WTC_CSRA_RS | WTC_CSRA_DV)
#define WTC_CSRB_DSE 0x01 /* daylight saving en */
#define WTC_CSRB_2412 0x02 /* 24/12hr select */
#define WTC_CSRB_DM 0x04 /* data mode */
#define WTC_CSRB_SET 0x80 /* set time */
#define WTC_CSRB_WR (WTC_CSRB_DSE | WTC_CSRB_2412 | WTC_CSRB_DM | WTC_CSRB_SET)
#define WTC_CSRD_VRT 0x80 /* valid time */
#define WTC_CSRD_RD (WTC_CSRD_VRT)
#define WTC_MODE_STD 0
#define WTC_MODE_VMS 1
extern int32 sim_switches;
int32 wtc_csra = 0;
int32 wtc_csrb = 0;
int32 wtc_csrc = 0;
int32 wtc_csrd = 0;
int32 wtc_mode = WTC_MODE_VMS;
t_stat wtc_set (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat wtc_show (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat wtc_reset (DEVICE *dptr);
void wtc_set_valid (void);
void wtc_set_invalid (void);
UNIT wtc_unit = { UDATA (NULL, 0, 0) };
REG wtc_reg[] = {
{ HRDATA (CSRA, wtc_csra, 8) },
{ HRDATA (CSRB, wtc_csrb, 8) },
{ HRDATA (CSRC, wtc_csrc, 8) },
{ HRDATA (CSRD, wtc_csrd, 8) },
{ NULL }
};
MTAB wtc_mod[] = {
{ MTAB_XTD|MTAB_VDV, 0, "TIME", "TIME={VMS|STD}", &wtc_set, &wtc_show },
{ 0 }
};
DEVICE wtc_dev = {
"WTC", &wtc_unit, wtc_reg, wtc_mod,
1, 16, 16, 1, 16, 8,
NULL, NULL, &wtc_reset,
NULL, NULL, NULL,
NULL, 0
};
int32 wtc_rd (int32 pa)
{
int32 rg = (pa >> 1) & 0xF;
int32 val = 0;
time_t curr;
struct tm *ctm;
if (rg < 10) { /* time reg? */
curr = time (NULL); /* get curr time */
if (curr == (time_t) -1) /* error? */
return 0;
ctm = localtime (&curr); /* decompose */
if (ctm == NULL) /* error? */
return 0;
}
switch(rg) {
case 0: /* seconds */
val = ctm->tm_sec;
break;
case 2: /* minutes */
val = ctm->tm_min;
break;
case 4: /* hours */
val = ctm->tm_hour;
break;
case 6: /* day of week */
val = ctm->tm_wday;
break;
case 7: /* day of month */
val = ctm->tm_mday;
break;
case 8: /* month */
val = ctm->tm_mon;
break;
case 9: /* year */
if (wtc_mode == WTC_MODE_VMS)
val = 82; /* always 1982 for VMS */
else
val = (int32)(ctm->tm_year % 100);
break;
case 10: /* CSR A */
val = wtc_csra;
break;
case 11: /* CSR B */
val = wtc_csrb;
break;
case 12: /* CSR C */
val = wtc_csrc;
break;
case 13: /* CSR D */
val = wtc_csrd & WTC_CSRD_RD;
break;
}
return ((rg & 1) ? (val << 16) : val); /* word aligned? */
}
void wtc_wr (int32 pa, int32 val, int32 lnt)
{
int32 rg = (pa >> 1) & 0xF;
val = val & 0xFF;
switch(rg) {
case 10: /* CSR A */
val = val & WTC_CSRA_WR;
wtc_csra = (wtc_csra & ~WTC_CSRA_WR) | val;
break;
case 11: /* CSR B */
val = val & WTC_CSRB_WR;
wtc_csrb = (wtc_csrb & ~WTC_CSRB_WR) | val;
break;
}
}
t_stat wtc_reset (DEVICE *dptr)
{
if (sim_switches & SWMASK ('P')) { /* powerup? */
wtc_csra = 0;
wtc_csrb = 0;
wtc_csrc = 0;
wtc_csrd = 0;
wtc_mode = WTC_MODE_VMS;
}
return SCPE_OK;
}
t_stat wtc_set (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (cptr != NULL) wtc_mode = strcmp(cptr, "STD");
return SCPE_OK;
}
t_stat wtc_show (FILE *st, UNIT *uptr, int32 val, void *desc)
{
fprintf(st, "time=%s", (wtc_mode ? "vms" :"std"));
return SCPE_OK;
}
void wtc_set_valid (void)
{
wtc_csra |= (2 << WTC_CSRA_V_DV);
wtc_csrb |= (WTC_CSRB_DM | WTC_CSRB_2412);
wtc_csrd |= WTC_CSRD_VRT;
}
void wtc_set_invalid (void)
{
wtc_csrd &= ~WTC_CSRD_VRT;
}

18
Visual Studio Projects/Simh.sln
View file

@ -80,6 +80,16 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VAX610", "VAX610.vcproj", "
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VAX620", "VAX620.vcproj", "{E359921B-DC18-42ED-AFB9-1FC603B9C1B3}"
ProjectSection(ProjectDependencies) = postProject
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
EndProjectSection
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VAX630", "VAX630.vcproj", "{3048F582-98C9-447D-BBB9-6F969467D4EA}"
ProjectSection(ProjectDependencies) = postProject
{D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8}
EndProjectSection
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|Win32 = Debug|Win32
@ -214,6 +224,14 @@ Global
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Debug|Win32.Build.0 = Debug|Win32
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Release|Win32.ActiveCfg = Release|Win32
{B3671ABB-4FFF-4EEB-8A5B-06716C9BCE9E}.Release|Win32.Build.0 = Release|Win32
{E359921B-DC18-42ED-AFB9-1FC603B9C1B3}.Debug|Win32.ActiveCfg = Debug|Win32
{E359921B-DC18-42ED-AFB9-1FC603B9C1B3}.Debug|Win32.Build.0 = Debug|Win32
{E359921B-DC18-42ED-AFB9-1FC603B9C1B3}.Release|Win32.ActiveCfg = Release|Win32
{E359921B-DC18-42ED-AFB9-1FC603B9C1B3}.Release|Win32.Build.0 = Release|Win32
{3048F582-98C9-447D-BBB9-6F969467D4EA}.Debug|Win32.ActiveCfg = Debug|Win32
{3048F582-98C9-447D-BBB9-6F969467D4EA}.Debug|Win32.Build.0 = Debug|Win32
{3048F582-98C9-447D-BBB9-6F969467D4EA}.Release|Win32.ActiveCfg = Release|Win32
{3048F582-98C9-447D-BBB9-6F969467D4EA}.Release|Win32.Build.0 = Release|Win32
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE

453
Visual Studio Projects/VAX620.vcproj Normal file
View file

@ -0,0 +1,453 @@
<?xml version="1.0" encoding="Windows-1252"?>
<VisualStudioProject
ProjectType="Visual C++"
Version="9.00"
Name="VAX620"
ProjectGUID="{E359921B-DC18-42ED-AFB9-1FC603B9C1B3}"
RootNamespace="VAX620"
Keyword="Win32Proj"
TargetFrameworkVersion="131072"
>
<Platforms>
<Platform
Name="Win32"
/>
</Platforms>
<ToolFiles>
</ToolFiles>
<Configurations>
<Configuration
Name="Debug|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\VAX620\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="0"
>
<Tool
Name="VCPreBuildEventTool"
Description="Build Dependent ROM include File(s) &amp; Check for required build dependencies"
CommandLine="pushd ..&#x0D;&#x0A;$(TargetDir)BuildROMs&#x0D;&#x0A;popd&#x0D;&#x0A;&#x0D;&#x0A;if not exist ../../windows-build/winpcap/Wpdpack/Include/pcap.h goto _notice&#x0D;&#x0A;if not exist ../../windows-build/pthreads/pthread.h goto _notice&#x0D;&#x0A;goto _good&#x0D;&#x0A;&#x0D;&#x0A;:_notice&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ** The required build support is not available. **&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;type 0ReadMe_Projects.txt&#x0D;&#x0A;exit 1&#x0D;&#x0A;&#x0D;&#x0A;:_good&#x0D;&#x0A;"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="0"
AdditionalIncludeDirectories="./;../;../VAX/;../pdp11/;&quot;../../windows-build/winpcap/Wpdpack/Include&quot;;&quot;../../windows-build/pthreads&quot;"
PreprocessorDefinitions="USE_INT64;USE_ADDR64;VM_VAX;VAX_620;USE_SHARED;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;SIM_ASYNCH_IO"
KeepComments="false"
MinimalRebuild="true"
BasicRuntimeChecks="0"
RuntimeLibrary="1"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="3"
CompileAs="1"
ShowIncludes="false"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
AdditionalOptions="/fixed:no"
AdditionalDependencies="wpcap.lib packet.lib wsock32.lib winmm.lib"
OutputFile="$(OutDir)\VAX620.exe"
LinkIncremental="1"
AdditionalLibraryDirectories="&quot;../../windows-build/winpcap/Wpdpack/Lib/&quot;"
GenerateDebugInformation="true"
ProgramDatabaseFile="$(OutDir)\VAX620.pdb"
SubSystem="1"
RandomizedBaseAddress="1"
DataExecutionPrevention="0"
TargetMachine="1"
/>
<Tool
Name="VCALinkTool"
/>
<Tool
Name="VCManifestTool"
/>
<Tool
Name="VCXDCMakeTool"
/>
<Tool
Name="VCBscMakeTool"
/>
<Tool
Name="VCFxCopTool"
/>
<Tool
Name="VCAppVerifierTool"
/>
<Tool
Name="VCPostBuildEventTool"
/>
</Configuration>
<Configuration
Name="Release|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\VAX620\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="0"
>
<Tool
Name="VCPreBuildEventTool"
Description="Build Dependent ROM include File(s) &amp; Check for required build dependencies"
CommandLine="pushd ..&#x0D;&#x0A;$(TargetDir)BuildROMs&#x0D;&#x0A;popd&#x0D;&#x0A;&#x0D;&#x0A;if not exist ../../windows-build/winpcap/Wpdpack/Include/pcap.h goto _notice&#x0D;&#x0A;if not exist ../../windows-build/pthreads/pthread.h goto _notice&#x0D;&#x0A;goto _good&#x0D;&#x0A;&#x0D;&#x0A;:_notice&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ** The required build support is not available. **&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;type 0ReadMe_Projects.txt&#x0D;&#x0A;exit 1&#x0D;&#x0A;&#x0D;&#x0A;:_good&#x0D;&#x0A;"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="2"
InlineFunctionExpansion="2"
EnableIntrinsicFunctions="true"
FavorSizeOrSpeed="1"
OmitFramePointers="true"
WholeProgramOptimization="true"
AdditionalIncludeDirectories="./;../;../VAX/;../pdp11/;&quot;../../windows-build/winpcap/Wpdpack/Include&quot;;&quot;../../windows-build/pthreads&quot;"
PreprocessorDefinitions="USE_INT64;USE_ADDR64;VM_VAX;VAX_620;USE_SHARED;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;SIM_ASYNCH_IO"
KeepComments="false"
StringPooling="true"
RuntimeLibrary="0"
BufferSecurityCheck="false"
EnableFunctionLevelLinking="true"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="3"
CompileAs="1"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
AdditionalOptions="/fixed:no"
AdditionalDependencies="wpcap.lib packet.lib wsock32.lib winmm.lib"
OutputFile="$(OutDir)\VAX620.exe"
LinkIncremental="1"
AdditionalLibraryDirectories="&quot;../../windows-build/winpcap/Wpdpack/Lib/&quot;"
GenerateDebugInformation="true"
SubSystem="1"
OptimizeReferences="2"
EnableCOMDATFolding="2"
LinkTimeCodeGeneration="1"
RandomizedBaseAddress="1"
DataExecutionPrevention="0"
TargetMachine="1"
/>
<Tool
Name="VCALinkTool"
/>
<Tool
Name="VCManifestTool"
/>
<Tool
Name="VCXDCMakeTool"
/>
<Tool
Name="VCBscMakeTool"
/>
<Tool
Name="VCFxCopTool"
/>
<Tool
Name="VCAppVerifierTool"
/>
<Tool
Name="VCPostBuildEventTool"
/>
</Configuration>
</Configurations>
<References>
</References>
<Files>
<Filter
Name="Source Files"
Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
>
<File
RelativePath="..\PDP11\pdp11_cr.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_dz.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_io_lib.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_lp.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rl.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rq.c"
>
</File>
<File
RelativePath="..\Pdp11\pdp11_ry.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_tq.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_ts.c"
>
</File>
<File
RelativePath="..\Pdp11\pdp11_vh.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xq.c"
>
</File>
<File
RelativePath="..\..\windows-build\pthreads\pthread.c"
>
<FileConfiguration
Name="Debug|Win32"
>
<Tool
Name="VCCLCompilerTool"
PreprocessorDefinitions="HAVE_PTW32_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|Win32"
>
<Tool
Name="VCCLCompilerTool"
WholeProgramOptimization="false"
PreprocessorDefinitions="HAVE_PTW32_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
/>
</FileConfiguration>
</File>
<File
RelativePath="..\scp.c"
>
</File>
<File
RelativePath="..\sim_console.c"
>
</File>
<File
RelativePath="..\sim_disk.c"
>
</File>
<File
RelativePath="..\sim_ether.c"
>
</File>
<File
RelativePath="..\sim_fio.c"
>
</File>
<File
RelativePath="..\sim_sock.c"
>
</File>
<File
RelativePath="..\sim_tape.c"
>
</File>
<File
RelativePath="..\sim_timer.c"
>
</File>
<File
RelativePath="..\sim_tmxr.c"
>
</File>
<File
RelativePath="..\VAX\vax630_io.c"
>
</File>
<File
RelativePath="..\VAX\vax630_stddev.c"
>
</File>
<File
RelativePath="..\VAX\vax630_sysdev.c"
>
</File>
<File
RelativePath="..\VAX\vax630_syslist.c"
>
</File>
<File
RelativePath="..\VAX\vax_cis.c"
>
</File>
<File
RelativePath="..\VAX\vax_cmode.c"
>
</File>
<File
RelativePath="..\VAX\vax_cpu.c"
>
</File>
<File
RelativePath="..\VAX\vax_cpu1.c"
>
</File>
<File
RelativePath="..\VAX\vax_fpa.c"
>
</File>
<File
RelativePath="..\VAX\vax_mmu.c"
>
</File>
<File
RelativePath="..\VAX\vax_octa.c"
>
</File>
<File
RelativePath="..\VAX\vax_sys.c"
>
</File>
<File
RelativePath="..\VAX\vax_syscm.c"
>
</File>
<File
RelativePath="..\VAX\vax_watch.c"
>
</File>
</Filter>
<Filter
Name="Header Files"
Filter="h;hpp;hxx;hm;inl;inc"
>
<File
RelativePath="..\PDP11\pdp11_io_lib.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_mscp.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_uqssp.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xq.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xq_bootrom.h"
>
</File>
<File
RelativePath="..\scp.h"
>
</File>
<File
RelativePath="..\sim_console.h"
>
</File>
<File
RelativePath="..\sim_defs.h"
>
</File>
<File
RelativePath="..\sim_disk.h"
>
</File>
<File
RelativePath="..\sim_ether.h"
>
</File>
<File
RelativePath="..\sim_fio.h"
>
</File>
<File
RelativePath="..\sim_rev.h"
>
</File>
<File
RelativePath="..\sim_sock.h"
>
</File>
<File
RelativePath="..\sim_tape.h"
>
</File>
<File
RelativePath="..\sim_timer.h"
>
</File>
<File
RelativePath="..\sim_tmxr.h"
>
</File>
<File
RelativePath="..\VAX\vax630_defs.h"
>
</File>
<File
RelativePath="..\VAX\vax_defs.h"
>
</File>
<File
RelativePath="..\VAX\vaxmod_defs.h"
>
</File>
</Filter>
<Filter
Name="Resource Files"
Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
>
</Filter>
</Files>
<Globals>
</Globals>
</VisualStudioProject>

453
Visual Studio Projects/VAX630.vcproj Normal file
View file

@ -0,0 +1,453 @@
<?xml version="1.0" encoding="Windows-1252"?>
<VisualStudioProject
ProjectType="Visual C++"
Version="9.00"
Name="VAX630"
ProjectGUID="{3048F582-98C9-447D-BBB9-6F969467D4EA}"
RootNamespace="VAX630"
Keyword="Win32Proj"
TargetFrameworkVersion="131072"
>
<Platforms>
<Platform
Name="Win32"
/>
</Platforms>
<ToolFiles>
</ToolFiles>
<Configurations>
<Configuration
Name="Debug|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\VAX630\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="0"
>
<Tool
Name="VCPreBuildEventTool"
Description="Build Dependent ROM include File(s) &amp; Check for required build dependencies"
CommandLine="pushd ..&#x0D;&#x0A;$(TargetDir)BuildROMs&#x0D;&#x0A;popd&#x0D;&#x0A;&#x0D;&#x0A;if not exist ../../windows-build/winpcap/Wpdpack/Include/pcap.h goto _notice&#x0D;&#x0A;if not exist ../../windows-build/pthreads/pthread.h goto _notice&#x0D;&#x0A;goto _good&#x0D;&#x0A;&#x0D;&#x0A;:_notice&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ** The required build support is not available. **&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;type 0ReadMe_Projects.txt&#x0D;&#x0A;exit 1&#x0D;&#x0A;&#x0D;&#x0A;:_good&#x0D;&#x0A;"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="0"
AdditionalIncludeDirectories="./;../;../VAX/;../pdp11/;&quot;../../windows-build/winpcap/Wpdpack/Include&quot;;&quot;../../windows-build/pthreads&quot;"
PreprocessorDefinitions="USE_INT64;USE_ADDR64;VM_VAX;VAX_630;USE_SHARED;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;SIM_ASYNCH_IO"
KeepComments="false"
MinimalRebuild="true"
BasicRuntimeChecks="0"
RuntimeLibrary="1"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="3"
CompileAs="1"
ShowIncludes="false"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
AdditionalOptions="/fixed:no"
AdditionalDependencies="wpcap.lib packet.lib wsock32.lib winmm.lib"
OutputFile="$(OutDir)\VAX630.exe"
LinkIncremental="1"
AdditionalLibraryDirectories="&quot;../../windows-build/winpcap/Wpdpack/Lib/&quot;"
GenerateDebugInformation="true"
ProgramDatabaseFile="$(OutDir)\VAX630.pdb"
SubSystem="1"
RandomizedBaseAddress="1"
DataExecutionPrevention="0"
TargetMachine="1"
/>
<Tool
Name="VCALinkTool"
/>
<Tool
Name="VCManifestTool"
/>
<Tool
Name="VCXDCMakeTool"
/>
<Tool
Name="VCBscMakeTool"
/>
<Tool
Name="VCFxCopTool"
/>
<Tool
Name="VCAppVerifierTool"
/>
<Tool
Name="VCPostBuildEventTool"
/>
</Configuration>
<Configuration
Name="Release|Win32"
OutputDirectory="..\BIN\NT\$(PlatformName)-$(ConfigurationName)"
IntermediateDirectory="..\BIN\NT\Project\simh\VAX630\$(PlatformName)-$(ConfigurationName)"
ConfigurationType="1"
InheritedPropertySheets="$(VCInstallDir)VCProjectDefaults\UpgradeFromVC71.vsprops"
CharacterSet="0"
>
<Tool
Name="VCPreBuildEventTool"
Description="Build Dependent ROM include File(s) &amp; Check for required build dependencies"
CommandLine="pushd ..&#x0D;&#x0A;$(TargetDir)BuildROMs&#x0D;&#x0A;popd&#x0D;&#x0A;&#x0D;&#x0A;if not exist ../../windows-build/winpcap/Wpdpack/Include/pcap.h goto _notice&#x0D;&#x0A;if not exist ../../windows-build/pthreads/pthread.h goto _notice&#x0D;&#x0A;goto _good&#x0D;&#x0A;&#x0D;&#x0A;:_notice&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ** The required build support is not available. **&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;echo ****************************************************&#x0D;&#x0A;type 0ReadMe_Projects.txt&#x0D;&#x0A;exit 1&#x0D;&#x0A;&#x0D;&#x0A;:_good&#x0D;&#x0A;"
/>
<Tool
Name="VCCustomBuildTool"
/>
<Tool
Name="VCXMLDataGeneratorTool"
/>
<Tool
Name="VCWebServiceProxyGeneratorTool"
/>
<Tool
Name="VCMIDLTool"
/>
<Tool
Name="VCCLCompilerTool"
Optimization="2"
InlineFunctionExpansion="2"
EnableIntrinsicFunctions="true"
FavorSizeOrSpeed="1"
OmitFramePointers="true"
WholeProgramOptimization="true"
AdditionalIncludeDirectories="./;../;../VAX/;../pdp11/;&quot;../../windows-build/winpcap/Wpdpack/Include&quot;;&quot;../../windows-build/pthreads&quot;"
PreprocessorDefinitions="USE_INT64;USE_ADDR64;VM_VAX;VAX_630;USE_SHARED;_CRT_NONSTDC_NO_WARNINGS;_CRT_SECURE_NO_WARNINGS;PTW32_STATIC_LIB;USE_READER_THREAD;SIM_ASYNCH_IO"
KeepComments="false"
StringPooling="true"
RuntimeLibrary="0"
BufferSecurityCheck="false"
EnableFunctionLevelLinking="true"
UsePrecompiledHeader="0"
WarningLevel="3"
Detect64BitPortabilityProblems="false"
DebugInformationFormat="3"
CompileAs="1"
/>
<Tool
Name="VCManagedResourceCompilerTool"
/>
<Tool
Name="VCResourceCompilerTool"
/>
<Tool
Name="VCPreLinkEventTool"
/>
<Tool
Name="VCLinkerTool"
AdditionalOptions="/fixed:no"
AdditionalDependencies="wpcap.lib packet.lib wsock32.lib winmm.lib"
OutputFile="$(OutDir)\VAX630.exe"
LinkIncremental="1"
AdditionalLibraryDirectories="&quot;../../windows-build/winpcap/Wpdpack/Lib/&quot;"
GenerateDebugInformation="true"
SubSystem="1"
OptimizeReferences="2"
EnableCOMDATFolding="2"
LinkTimeCodeGeneration="1"
RandomizedBaseAddress="1"
DataExecutionPrevention="0"
TargetMachine="1"
/>
<Tool
Name="VCALinkTool"
/>
<Tool
Name="VCManifestTool"
/>
<Tool
Name="VCXDCMakeTool"
/>
<Tool
Name="VCBscMakeTool"
/>
<Tool
Name="VCFxCopTool"
/>
<Tool
Name="VCAppVerifierTool"
/>
<Tool
Name="VCPostBuildEventTool"
/>
</Configuration>
</Configurations>
<References>
</References>
<Files>
<Filter
Name="Source Files"
Filter="cpp;c;cxx;def;odl;idl;hpj;bat;asm"
>
<File
RelativePath="..\PDP11\pdp11_cr.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_dz.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_io_lib.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_lp.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rl.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_rq.c"
>
</File>
<File
RelativePath="..\Pdp11\pdp11_ry.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_tq.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_ts.c"
>
</File>
<File
RelativePath="..\Pdp11\pdp11_vh.c"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xq.c"
>
</File>
<File
RelativePath="..\..\windows-build\pthreads\pthread.c"
>
<FileConfiguration
Name="Debug|Win32"
>
<Tool
Name="VCCLCompilerTool"
PreprocessorDefinitions="HAVE_PTW32_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|Win32"
>
<Tool
Name="VCCLCompilerTool"
WholeProgramOptimization="false"
PreprocessorDefinitions="HAVE_PTW32_CONFIG_H;PTW32_BUILD_INLINED;PTW32_STATIC_LIB;__CLEANUP_C;$(NOINHERIT)"
/>
</FileConfiguration>
</File>
<File
RelativePath="..\scp.c"
>
</File>
<File
RelativePath="..\sim_console.c"
>
</File>
<File
RelativePath="..\sim_disk.c"
>
</File>
<File
RelativePath="..\sim_ether.c"
>
</File>
<File
RelativePath="..\sim_fio.c"
>
</File>
<File
RelativePath="..\sim_sock.c"
>
</File>
<File
RelativePath="..\sim_tape.c"
>
</File>
<File
RelativePath="..\sim_timer.c"
>
</File>
<File
RelativePath="..\sim_tmxr.c"
>
</File>
<File
RelativePath="..\VAX\vax630_io.c"
>
</File>
<File
RelativePath="..\VAX\vax630_stddev.c"
>
</File>
<File
RelativePath="..\VAX\vax630_sysdev.c"
>
</File>
<File
RelativePath="..\VAX\vax630_syslist.c"
>
</File>
<File
RelativePath="..\VAX\vax_cis.c"
>
</File>
<File
RelativePath="..\VAX\vax_cmode.c"
>
</File>
<File
RelativePath="..\VAX\vax_cpu.c"
>
</File>
<File
RelativePath="..\VAX\vax_cpu1.c"
>
</File>
<File
RelativePath="..\VAX\vax_fpa.c"
>
</File>
<File
RelativePath="..\VAX\vax_mmu.c"
>
</File>
<File
RelativePath="..\VAX\vax_octa.c"
>
</File>
<File
RelativePath="..\VAX\vax_sys.c"
>
</File>
<File
RelativePath="..\VAX\vax_syscm.c"
>
</File>
<File
RelativePath="..\VAX\vax_watch.c"
>
</File>
</Filter>
<Filter
Name="Header Files"
Filter="h;hpp;hxx;hm;inl;inc"
>
<File
RelativePath="..\PDP11\pdp11_io_lib.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_mscp.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_uqssp.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xq.h"
>
</File>
<File
RelativePath="..\PDP11\pdp11_xq_bootrom.h"
>
</File>
<File
RelativePath="..\scp.h"
>
</File>
<File
RelativePath="..\sim_console.h"
>
</File>
<File
RelativePath="..\sim_defs.h"
>
</File>
<File
RelativePath="..\sim_disk.h"
>
</File>
<File
RelativePath="..\sim_ether.h"
>
</File>
<File
RelativePath="..\sim_fio.h"
>
</File>
<File
RelativePath="..\sim_rev.h"
>
</File>
<File
RelativePath="..\sim_sock.h"
>
</File>
<File
RelativePath="..\sim_tape.h"
>
</File>
<File
RelativePath="..\sim_timer.h"
>
</File>
<File
RelativePath="..\sim_tmxr.h"
>
</File>
<File
RelativePath="..\VAX\vax630_defs.h"
>
</File>
<File
RelativePath="..\VAX\vax_defs.h"
>
</File>
<File
RelativePath="..\VAX\vaxmod_defs.h"
>
</File>
</Filter>
<Filter
Name="Resource Files"
Filter="rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe"
>
</Filter>
</Files>
<Globals>
</Globals>
</VisualStudioProject>

27
makefile
View file

@ -490,6 +490,17 @@ VAX610 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
${PDP11D}/pdp11_cr.c ${PDP11D}/pdp11_io_lib.c
VAX610_OPT = -DVM_VAX -DVAX_610 -DUSE_INT64 -DUSE_ADDR64 -I ${VAXD} -I ${PDP11D} ${NETWORK_OPT}
VAX630 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
${VAXD}/vax_cis.c ${VAXD}/vax_octa.c ${VAXD}/vax_cmode.c \
${VAXD}/vax_mmu.c ${VAXD}/vax_sys.c ${VAXD}/vax_syscm.c \
${VAXD}/vax_watch.c ${VAXD}/vax630_stddev.c ${VAXD}/vax630_sysdev.c \
${VAXD}/vax630_io.c ${VAXD}/vax630_syslist.c \
${PDP11D}/pdp11_rl.c ${PDP11D}/pdp11_rq.c ${PDP11D}/pdp11_ts.c \
${PDP11D}/pdp11_dz.c ${PDP11D}/pdp11_lp.c ${PDP11D}/pdp11_tq.c \
${PDP11D}/pdp11_xq.c ${PDP11D}/pdp11_ry.c ${PDP11D}/pdp11_vh.c \
${PDP11D}/pdp11_cr.c ${PDP11D}/pdp11_io_lib.c
VAX620_OPT = -DVM_VAX -DVAX_620 -DUSE_INT64 -DUSE_ADDR64 -I ${VAXD} -I ${PDP11D} ${NETWORK_OPT}
VAX630_OPT = -DVM_VAX -DVAX_630 -DUSE_INT64 -DUSE_ADDR64 -I ${VAXD} -I ${PDP11D} ${NETWORK_OPT}
VAX730 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
${VAXD}/vax_cis.c ${VAXD}/vax_octa.c ${VAXD}/vax_cmode.c \
@ -685,8 +696,8 @@ SWTP6800_OPT = -I ${SWTP6800D}
# Build everything
#
ALL = pdp1 pdp4 pdp7 pdp8 pdp9 pdp15 pdp11 pdp10 \
vax vax610 vax730 vax750 vax780 nova eclipse \
hp2100 i1401 i1620 s3 altair altairz80 gri \
vax vax610 vax620 vax630 vax730 vax750 vax780 \
nova eclipse hp2100 i1401 i1620 s3 altair altairz80 gri \
i7094 ibm1130 id16 id32 sds lgp h316 \
swtp6800mp-a swtp6800mp-a2
@ -781,6 +792,18 @@ ${BIN}vax610${EXE} : ${VAX610} ${SIM} ${BUILD_ROMS}
${MKDIRBIN}
${CC} ${VAX610} ${SIM} ${VAX610_OPT} -o $@ ${LDFLAGS}
vax620 : ${BIN}vax620${EXE}
${BIN}vax620${EXE} : ${VAX630} ${SIM} ${BUILD_ROMS}
${MKDIRBIN}
${CC} ${VAX630} ${SIM} ${VAX620_OPT} -o $@ ${LDFLAGS}
vax630 : ${BIN}vax630${EXE}
${BIN}vax630${EXE} : ${VAX630} ${SIM} ${BUILD_ROMS}
${MKDIRBIN}
${CC} ${VAX630} ${SIM} ${VAX630_OPT} -o $@ ${LDFLAGS}
vax730 : ${BIN}vax730${EXE}
${BIN}vax730${EXE} : ${VAX730} ${SIM} ${BUILD_ROMS}

51
sim_BuildROMs.c
View file

@ -40,6 +40,8 @@
struct ROM_File_Descriptor {
char *BinaryName; char *IncludeFileName; size_t expected_size; unsigned int checksum; char *ArrayName;} ROMs[] = {
{"VAX/ka655x.bin", "VAX/vax_ka655x_bin.h", 131072, 0xFF7673B6, "vax_ka655x_bin"},
{"VAX/ka620.bin", "VAX/vax_ka620_bin.h", 65536, 0xFF7F930F, "vax_ka620_bin"},
{"VAX/ka630.bin", "VAX/vax_ka630_bin.h", 65536, 0xFF7F73EF, "vax_ka630_bin"},
{"VAX/ka610.bin", "VAX/vax_ka610_bin.h", 16384, 0xFFEF3312, "vax_ka610_bin"},
{"VAX/vmb.exe", "VAX/vax_vmb_exe.h", 44544, 0xFFC014CC, "vax_vmb_exe"},
};
@ -62,13 +64,17 @@ int sim_read_ROM_include(const char *include_filename,
int *psize,
unsigned char **pROMData,
unsigned int *pchecksum,
char **prom_array_name)
char **prom_array_name,
int *defines_found)
{
FILE *iFile;
char line[256];
size_t i;
size_t bytes_written = 0;
size_t allocated_size = 0;
int define_size_found = 0;
int define_filename_found = 0;
int define_array_found = 0;
*psize = 0;
*pchecksum = 0;
@ -85,6 +91,13 @@ while (fgets (line, sizeof(line)-1, iFile)) {
switch (line[0]) {
case '#':
if (0 == strncmp ("#define BOOT_CODE_SIZE ", line, 23))
define_size_found = 1;
if (0 == strncmp ("#define BOOT_CODE_FILENAME ", line, 27))
define_filename_found = 1;
if (0 == strncmp ("#define BOOT_CODE_ARRAY ", line, 24))
define_array_found = 1;
break;
case ' ':
case '/':
case '*':
@ -118,6 +131,7 @@ for (i=0; i<bytes_written; ++i)
*pchecksum += *(*pROMData + i);
*pchecksum = ~*pchecksum;
*psize = bytes_written;
*defines_found = (3 == (define_size_found + define_filename_found + define_array_found));
return 0;
}
@ -152,14 +166,21 @@ fclose (rFile);
for (i=0; i<statb.st_size; ++i)
checksum += ROMData[i];
checksum = ~checksum;
sprintf (include_filename, "%s.h", rom_filename);
while ((c = strchr (rom_filename, '\\')))
*c = '/';
strcpy (array_name, rom_filename);
for (c=array_name; *c; ++c)
if (isupper(*c))
*c = tolower(*c);
if ((c = strchr (array_name, '.')))
*c = '_';
if ((c = strchr (array_name, '/')))
*c = '_';
if ((c = strchr (array_name, '\\')))
*c = '_';
sprintf (include_filename, "%s.h", rom_filename);
if ((c = strrchr (include_filename, '/')))
sprintf (c+1, "%s.h", array_name);
else
sprintf (include_filename, "%s.h", array_name);
printf ("The ROMs array entry for this new ROM image file should look something like:\n");
printf ("{\"%s\", \"%s\", %d, 0x%08X, \"%s\"}\n",
rom_filename, include_filename, (int)(statb.st_size), checksum, array_name);
@ -179,11 +200,13 @@ int bytes_written = 0;
int include_bytes;
int c;
struct stat statb;
const char *load_filename;
unsigned char *ROMData = NULL;
unsigned char *include_ROMData = NULL;
char *include_array_name = NULL;
unsigned int checksum = 0;
unsigned int include_checksum;
int defines_found;
if (NULL == (rFile = fopen (rom_filename, "rb"))) {
printf ("Error Opening ROM binary file '%s' for input: %s\n", rom_filename, strerror(errno));
@ -191,11 +214,13 @@ if (NULL == (rFile = fopen (rom_filename, "rb"))) {
&include_bytes,
&include_ROMData,
&include_checksum,
&include_array_name))
&include_array_name,
&defines_found))
return -1;
c = ((include_checksum == expected_checksum) &&
(include_bytes == expected_size) &&
(0 == strcmp(include_array_name, rom_array_name)));
(0 == strcmp(include_array_name, rom_array_name)) &&
defines_found);
free(include_ROMData);
free(include_array_name);
if (!c)
@ -244,11 +269,13 @@ if (0 == sim_read_ROM_include(include_filename,
&include_bytes,
&include_ROMData,
&include_checksum,
&include_array_name)) {
&include_array_name,
&defines_found)) {
c = ((include_checksum == expected_checksum) &&
(include_bytes == expected_size) &&
(0 == strcmp (include_array_name, rom_array_name)) &&
(0 == memcmp (include_ROMData, ROMData, include_bytes)));
(0 == memcmp (include_ROMData, ROMData, include_bytes)) &&
defines_found);
free(include_ROMData);
free(include_array_name);
if (c) {
@ -261,6 +288,11 @@ if (NULL == (iFile = fopen (include_filename, "w"))) {
printf ("Error Opening '%s' for output: %s\n", include_filename, strerror(errno));
return -1;
}
load_filename = strrchr (rom_filename, '/');
if (load_filename)
++load_filename;
else
load_filename = rom_filename;
time (&now);
fprintf (iFile, "#ifndef ROM_%s_H\n", rom_array_name);
fprintf (iFile, "#define ROM_%s_H 0\n", rom_array_name);
@ -270,6 +302,9 @@ fprintf (iFile, " from %s which was last modified at %s", rom_filename, ctime(
fprintf (iFile, " file size: %d (0x%X) - checksum: 0x%08X\n", (int)statb.st_size, (int)statb.st_size, checksum);
fprintf (iFile, " This file is a generated file and should NOT be edited or changed by hand.\n");
fprintf (iFile, "*/\n");
fprintf (iFile, "#define BOOT_CODE_SIZE 0x%X\n", (int)statb.st_size);
fprintf (iFile, "#define BOOT_CODE_FILENAME \"%s\"\n", load_filename);
fprintf (iFile, "#define BOOT_CODE_ARRAY %s\n", rom_array_name);
fprintf (iFile, "unsigned char %s[] = {", rom_array_name);
for (bytes_written=0;bytes_written<statb.st_size; ++bytes_written) {
c = ROMData[bytes_written];