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AltairZ80: Code cleanup and simplifications

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This commit is contained in:
Peter Schorn 2023-05-23 21:44:47 +02:00
parent 3985447826
commit b0a496446f
17 changed files with 64 additions and 100 deletions
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11
AltairZ80/altairz80_cpu.c
View file

@ -28,7 +28,6 @@
*/
#include "m68k/m68k.h"
#include <ctype.h>
#define SWITCHCPU_DEFAULT 0xfd
@ -2110,7 +2109,7 @@ void PutByteDMA(const uint32 Addr, const uint32 Value) {
#define INOUTFLAGS_NONZERO(x) \
INOUTFLAGS((HIGH_REGISTER(BC) & 0xa8) | ((HIGH_REGISTER(BC) == 0) << 6), x)
int32 switch_cpu_now = TRUE; /* hharte */
int32 switch_cpu_now = TRUE;
t_stat sim_instr (void) {
t_stat result;
@ -6520,6 +6519,7 @@ static t_stat cpu_ex(t_value *vptr, t_addr addr, UNIT *uptr, int32 sw) {
break;
default:
*vptr = 0; // make clear to static checking that a value is assigned in all cases
return SCPE_AFAIL;
break;
}
@ -6914,14 +6914,14 @@ static int32 switchcpu_io(const int32 port, const int32 io, CONST int32 data) {
sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8086\n", PCX, port);
}
new_chiptype = CHIP_TYPE_8086;
switch_cpu_now = FALSE; /* hharte */
switch_cpu_now = FALSE;
break;
case CHIP_TYPE_8086:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) {
sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8085/Z80\n", PCX, port);
}
new_chiptype = CHIP_TYPE_Z80;
switch_cpu_now = FALSE; /* hharte */
switch_cpu_now = FALSE;
break;
default:
sim_printf("%s: invalid chiptype: %d\n", __FUNCTION__, chiptype);
@ -7425,12 +7425,11 @@ void cpu_raise_interrupt(uint32 irq) {
static t_addr disp_addr = 0;
static t_stat cpu_cmd_memory(int32 flag, const char *cptr) {
const char *result;
char abuf[16];
t_addr lo, hi, last;
t_value byte;
if ((result = get_range(NULL, cptr, &lo, &hi, 16, MEMORYMASK, 0)) == NULL) {
if (get_range(NULL, cptr, &lo, &hi, 16, MEMORYMASK, 0) == NULL) {
lo = hi = disp_addr;
}
else {

23
AltairZ80/altairz80_sio.c
View file

@ -49,10 +49,7 @@
to the data port writes the character to the device.
*/
#include <ctype.h>
#include "altairz80_defs.h"
#include "sim_sock.h"
#include "sim_tmxr.h"
uint8 *URLContents(const char *URL, uint32 *length);
@ -770,11 +767,6 @@ static int32 sio0sCore(const int32 port, const int32 io, const int32 data) {
pollConnection();
if (io == 0) { /* IN */
if (sio_unit.u4) { /* attached to a file? */
ch = sim_poll_kbd(); /* yes, check for stop condition first */
if ((ch == SCPE_OK) && stop_cpu) {
sim_interval = 0; /* detect stop condition as soon as possible*/
return spi.sio_cannot_read | spi.sio_can_write; /* do not consume stop character */
}
if (sio_unit.u3) /* character available? */
return spi.sio_can_read | spi.sio_can_write;
ch = getc(sio_unit.fileref);
@ -788,15 +780,12 @@ static int32 sio0sCore(const int32 port, const int32 io, const int32 data) {
}
}
if (sio_unit.flags & UNIT_ATT) { /* attached to a port? */
ch = sim_poll_kbd(); /* yes, check for stop condition first */
if ((ch == SCPE_OK) && stop_cpu) {
sim_interval = 0; /* detect stop condition as soon as possible*/
return spi.sio_cannot_read | spi.sio_can_write; /* do not consume stop character */
}
if (tmxr_rqln(&TerminalLines[spi.terminalLine]))
result = spi.sio_can_read;
else {
result = spi.sio_cannot_read;
if (!sim_signaled_int_char)
sim_poll_kbd(); /* check for WRU when signaling is not available */
checkSleep();
}
return result | /* read possible if character available */
@ -1142,17 +1131,11 @@ static t_stat sio_dev_set_interruptoff(UNIT *uptr, int32 value, CONST char *cptr
}
static t_stat sio_svc(UNIT *uptr) {
int32 sio_status;
int32 ch;
const SIO_PORT_INFO spi = lookupPortInfo(kbdIrqPort, &ch);
ASSURE(spi.port == kbdIrqPort);
sio_status = sio0s(kbdIrqPort, 0, 0);
if (sio_status & spi.sio_can_read) {
if (sio0s(kbdIrqPort, 0, 0) & spi.sio_can_read)
keyboardInterrupt = TRUE;
}
if (sio_unit.flags & UNIT_SIO_INTERRUPT)
sim_activate(&sio_unit, sio_unit.wait); /* activate unit */
return SCPE_OK;

1
AltairZ80/altairz80_sys.c
View file

@ -30,7 +30,6 @@
*/
#include "m68k/m68k.h"
#include <ctype.h>
#define SIM_EMAX 6

4
AltairZ80/i86_decode.c
View file

@ -189,7 +189,7 @@ static uint32 getFullPC(void) {
return cpu8086.R_IP + (cpu8086.R_CS << 4);
}
extern int32 switch_cpu_now; /* hharte */
extern int32 switch_cpu_now;
t_stat sim_instr_8086(void) {
t_stat reason = SCPE_OK;
@ -198,7 +198,7 @@ t_stat sim_instr_8086(void) {
setCPURegisters();
intr = 0;
newIP = PCX_S - 16 * CS_S;
switch_cpu_now = TRUE; /* hharte */
switch_cpu_now = TRUE;
if ((0 <= newIP) && (newIP <= 0xffff))
cpu8086.R_IP = newIP;
else {

1
AltairZ80/ibc.c
View file

@ -38,7 +38,6 @@
*************************************************************************/
#include "altairz80_defs.h"
#include "sim_defs.h" /* simulator definitions */
#include "wd179x.h"
#define DEV_NAME "IBC"

2
AltairZ80/m68k/m68kdasm.c
View file

@ -404,7 +404,7 @@ static char* make_signed_hex_str_32(uint val)
/* make string of immediate value */
static char* get_imm_str_s(uint size)
{
static char str[15];
static char str[25];
if(size == 0)
sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
else if(size == 1)

2
AltairZ80/s100_2sio.c
View file

@ -87,8 +87,6 @@
* = Active Low
*/
#include <stdio.h>
#include "altairz80_defs.h"
#include "sim_tmxr.h"

1
AltairZ80/s100_64fdc.c
View file

@ -40,7 +40,6 @@
/*#define DBG_MSG */
#include "altairz80_defs.h"
#include "sim_defs.h" /* simulator definitions */
#include "wd179x.h"
#ifdef DBG_MSG

1
AltairZ80/s100_adcs6.c
View file

@ -40,7 +40,6 @@
*************************************************************************/
#include "altairz80_defs.h"
#include "sim_defs.h" /* simulator definitions */
#include "wd179x.h"
#define DEV_NAME "ADCS6"

1
AltairZ80/s100_disk1a.c
View file

@ -40,7 +40,6 @@
/*#define DBG_MSG */
#include "altairz80_defs.h"
#include "sim_defs.h" /* simulator definitions */
#include "i8272.h"
#ifdef DBG_MSG

2
AltairZ80/s100_hayes.c
View file

@ -32,8 +32,6 @@
additional information.
*/
#include <stdio.h>
#include "altairz80_defs.h"
#include "sim_tmxr.h"

6
AltairZ80/s100_mdsa.c
View file

@ -215,7 +215,7 @@ t_stat mdsa_reset(DEVICE *dptr)
/* Connect MDSA at base address */
if(sim_map_resource(pnp->mem_base, pnp->mem_size,
RESOURCE_TYPE_MEMORY, &mdsadev, "mdsadev", FALSE) != 0) {
printf("%s: error mapping resource at 0x%04x\n",
sim_printf("%s: error mapping resource at 0x%04x\n",
__FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS;
return SCPE_ARG;
@ -258,7 +258,7 @@ t_stat mdsa_attach(UNIT *uptr, CONST char *cptr)
if(uptr->capac > 0) {
char *rtn = fgets(header, 4, uptr->fileref);
if((rtn != NULL) && (strncmp(header, "CPT", 3) == 0)) {
printf("CPT images not yet supported\n");
sim_printf("CPT images not yet supported\n");
uptr->u3 = IMAGE_TYPE_CPT;
mdsa_detach(uptr);
return SCPE_OPENERR;
@ -268,7 +268,7 @@ t_stat mdsa_attach(UNIT *uptr, CONST char *cptr)
}
if (uptr->flags & UNIT_MDSA_VERBOSE)
printf("MDSA%d, attached to '%s', type=%s, len=%d\n", i, cptr,
sim_printf("MDSA%d, attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac);

2
AltairZ80/s100_pmmi.c
View file

@ -42,8 +42,6 @@
additional information.
*/
#include <stdio.h>
#include "altairz80_defs.h"
#include "sim_tmxr.h"

1
AltairZ80/s100_scp300f.c
View file

@ -33,7 +33,6 @@
* *
*************************************************************************/
#include <math.h>
#include "altairz80_defs.h"
/* Debug flags */

1
AltairZ80/s100_tdd.c
View file

@ -40,7 +40,6 @@
*************************************************************************/
#include "altairz80_defs.h"
#include "sim_defs.h"
#include "wd179x.h"
#define DEV_NAME "TDD"

9
AltairZ80/s100_vdm1.c
View file

@ -402,15 +402,10 @@ static t_stat vdm1_boot(int32 unitno, DEVICE *dptr)
}
static int32 vdm1_io(const int32 port, const int32 io, const int32 data) {
int32 result = 0xff;
if (io == 1) { /* OUT */
if (port == VDM1_DSTAT) {
if ((io == 1) && (port == VDM1_DSTAT)) {
vdm1_dstat = data & 0xff;
}
}
return result;
return 0xff;
}
/*

10
AltairZ80/sol20.c
View file

@ -1396,15 +1396,15 @@ static t_stat sol20_reset(DEVICE *dptr)
if ((vdm1 = find_dev("VDM1")) != NULL) {
set_dev_enbdis(vdm1, NULL, 1, NULL);
}
#else
sim_messagef(SCPE_NOFNC, "%s device requires VDM1 video support.\n", SOL20_SNAME);
return SCPE_NOFNC;
#endif
set_dev_enbdis(&sol20k_dev, NULL, 1, NULL);
set_dev_enbdis(&sol20t_dev, NULL, 1, NULL);
set_dev_enbdis(&sol20s_dev, NULL, 1, NULL);
set_dev_enbdis(&sol20p_dev, NULL, 1, NULL);
#else
sim_messagef(SCPE_NOFNC, "%s device requires VDM1 video support.\n", SOL20_SNAME);
return SCPE_NOFNC;
#endif
}
if (sim_map_resource(sol20_ctx.rom_base, sol20_ctx.rom_size, RESOURCE_TYPE_MEMORY, &sol20rom, "sol20rom", FALSE) != 0) {
@ -1562,7 +1562,7 @@ static t_stat sol20_svc(UNIT *uptr)
sim_activate_after_abs(uptr, uptr->wait); /* reactivate timer */
return SCPE_OK;
return r;
}
/*