Fixed devices missed in Auto Configuration for PDP11 simulator. CLK issue initially reported by Matt Burke
This commit is contained in:
Mark Pizzolato
parent
43b1c04ae4
commit
b1d306cff8
2 changed files with 59 additions and 53 deletions
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@ -925,7 +925,7 @@ return SCPE_OK;
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The table reflects the MicroVAX 3900 microcode, with one field addition - the
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The table reflects the MicroVAX 3900 microcode, with one field addition - the
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number of controllers field handles devices where multiple instances
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number of controllers field handles devices where multiple instances
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are simulated through a single DEVICE structure (e.g., DZ, VH).
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are simulated through a single DEVICE structure (e.g., DZ, VH, DL, DC).
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The table has been reviewed, extended and updated to reflect the contents of
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The table has been reviewed, extended and updated to reflect the contents of
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the auto configure table in VMS sysgen (V5.5-2)
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the auto configure table in VMS sysgen (V5.5-2)
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@ -936,9 +936,7 @@ return SCPE_OK;
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An amod value of 0 indicates that all addresses are FIXED
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An amod value of 0 indicates that all addresses are FIXED
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An vmod value of 0 indicates that all vectors are FIXED */
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An vmod value of 0 indicates that all vectors are FIXED */
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#define DCX_LINES 8
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#define DLX_LINES 8
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#define VH_MUXES 1
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typedef struct {
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typedef struct {
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char *dnam[AUTO_MAXC];
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char *dnam[AUTO_MAXC];
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int32 numc;
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int32 numc;
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@ -960,8 +958,10 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{010700} }, /* KG11-A - fx CSR, no VEC */
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{010700} }, /* KG11-A - fx CSR, no VEC */
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{ { "RHA", "RHB" }, 1, 1, 0, 0,
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{ { "RHA", "RHB" }, 1, 1, 0, 0,
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{016700, 012440}, {0254, 0224} }, /* RH11/RH70 - fx CSR, fx VEC */
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{016700, 012440}, {0254, 0224} }, /* RH11/RH70 - fx CSR, fx VEC */
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{ { "CLK" }, 1, 0, 0, 0,
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{ { "CLK" }, 1, 1, 0, 0,
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{017546}, {0100} }, /* KW11L - fx CSR, fx VEC */
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{017546}, {0100} }, /* KW11L - fx CSR, fx VEC */
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{ { "PCLK" }, 1, 1, 0, 0,
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{012540}, {0104} }, /* KW11P - fx CSR, fx VEC */
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{ { "PTR" }, 1, 1, 0, 0,
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{ { "PTR" }, 1, 1, 0, 0,
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{017550}, {0070} }, /* PC11 reader - fx CSR, fx VEC */
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{017550}, {0070} }, /* PC11 reader - fx CSR, fx VEC */
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{ { "PTP" }, 1, 1, 0, 0,
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{ { "PTP" }, 1, 1, 0, 0,
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@ -987,7 +987,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{ { "RL" }, 1, 1, 0, 0,
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{ { "RL" }, 1, 1, 0, 0,
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{ { "DCI" }, DCX_LINES, 2, 0, 8,
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{ { "DCI" }, 1, 2, 0, 8,
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{014000, 014010, 014020, 014030,
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{014000, 014010, 014020, 014030,
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014040, 014050, 014060, 014070,
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014040, 014050, 014060, 014070,
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014100, 014110, 014120, 014130,
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014100, 014110, 014120, 014130,
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@ -1024,7 +1024,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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017430, 017432, 017434, 017436} }, /* DT11 - fx CSRs */
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017430, 017432, 017434, 017436} }, /* DT11 - fx CSRs */
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{ { NULL }, 1, 2, 0, 8,
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{ { NULL }, 1, 2, 0, 8,
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{016200, 016240} }, /* DX11 */
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{016200, 016240} }, /* DX11 */
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{ { "DLI" }, DLX_LINES, 2, 0, 8,
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{ { "DLI" }, 1, 2, 0, 8,
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{016500, 016510, 016520, 016530,
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{016500, 016510, 016520, 016530,
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016540, 016550, 016560, 016570,
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016540, 016550, 016560, 016570,
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016600, 016610, 016620, 016630,
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016600, 016610, 016620, 016630,
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@ -1046,7 +1046,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{ { NULL }, 1, 2, 8, 8 }, /* LK11A */
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{ { NULL }, 1, 2, 8, 8 }, /* LK11A */
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{ { "DMC0", "DMC1", "DMC2", "DMC3" },
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{ { "DMC0", "DMC1", "DMC2", "DMC3" },
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1, 2, 8, 8 }, /* DMC11 */
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1, 2, 8, 8 }, /* DMC11 */
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{ { "DZ" }, DZ_MUXES, 2, 8, 8 }, /* DZ11 */
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{ { "DZ" }, 1, 2, 8, 8 }, /* DZ11 */
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{ { NULL }, 1, 2, 8, 8 }, /* KMC11 */
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{ { NULL }, 1, 2, 8, 8 }, /* KMC11 */
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{ { NULL }, 1, 2, 8, 8 }, /* LPP11 */
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{ { NULL }, 1, 2, 8, 8 }, /* LPP11 */
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{ { NULL }, 1, 2, 8, 8 }, /* VMV21 */
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{ { NULL }, 1, 2, 8, 8 }, /* VMV21 */
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@ -1090,11 +1090,13 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{004400, 004440, 004500, 004540} }, /* KTC32 */
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{004400, 004440, 004500, 004540} }, /* KTC32 */
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{ { NULL }, 1, 2, 0, 8,
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{ { NULL }, 1, 2, 0, 8,
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{004100} }, /* IEQ11 */
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{004100} }, /* IEQ11 */
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{ { "VH" }, VH_MUXES, 2, 16, 8 }, /* DHU11/DHQ11 */
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{ { "VH" }, 1, 2, 16, 8 }, /* DHU11/DHQ11 */
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{ { NULL }, 1, 6, 32, 4 }, /* DMZ32 */
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{ { NULL }, 1, 6, 32, 4 }, /* DMZ32 */
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{ { NULL }, 1, 6, 32, 4 }, /* CP132 */
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{ { NULL }, 1, 6, 32, 4 }, /* CP132 */
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{ { NULL }, 1, 1, 0, 0,
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{ { "TC" }, 1, 1, 0, 0,
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{017340}, {0214} }, /* TC11 */
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{017340}, {0214} }, /* TC11 */
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{ { "TA" }, 1, 1, 0, 0,
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{017500}, {0260} }, /* TA11 */
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{ { NULL }, 1, 2, 64, 8,
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{ { NULL }, 1, 2, 64, 8,
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{017200} }, /* QVSS - fx CSR */
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{017200} }, /* QVSS - fx CSR */
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{ { NULL }, 1, 1, 8, 4 }, /* VS31 */
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{ { NULL }, 1, 1, 8, 4 }, /* VS31 */
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@ -1146,6 +1148,13 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{ { NULL }, -1 } /* end table */
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{ { NULL }, -1 } /* end table */
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};
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};
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#if !defined(DEV_NEXUS)
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#if defined(DEV_MBUS)
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#define DEV_NEXUS DEV_MBUS
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#else
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#define DEV_NEXUS 0
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#endif
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#endif
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t_stat auto_config (char *name, int32 nctrl)
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t_stat auto_config (char *name, int32 nctrl)
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{
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{
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uint32 csr = IOPAGEBASE + AUTO_CSRBASE;
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uint32 csr = IOPAGEBASE + AUTO_CSRBASE;
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@ -1153,8 +1162,7 @@ uint32 vec = VEC_Q + AUTO_VECBASE;
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AUTO_CON *autp;
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AUTO_CON *autp;
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DEVICE *dptr;
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DEVICE *dptr;
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DIB *dibp;
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DIB *dibp;
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t_bool auto_fixed = TRUE;
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uint32 j, vmask, amask;
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uint32 j, k, vmask, amask;
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if (autcon_enb == 0) /* enabled? */
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if (autcon_enb == 0) /* enabled? */
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return SCPE_OK;
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return SCPE_OK;
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@ -1173,39 +1181,37 @@ for (autp = auto_tab; autp->numc >= 0; autp++) { /* loop thru table */
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amask = autp->amod - 1;
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amask = autp->amod - 1;
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csr = (csr + amask) & ~amask; /* align csr */
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csr = (csr + amask) & ~amask; /* align csr */
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}
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}
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for (j = k = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
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for (j = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
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if (autp->dnam[j] == NULL) /* no device? */
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if (autp->dnam[j] == NULL) /* no device? */
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break;
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break;
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dptr = find_dev (autp->dnam[j]); /* find ctrl */
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dptr = find_dev (autp->dnam[j]); /* find ctrl */
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if ((dptr == NULL) || /* enabled, floating? */
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if ((dptr == NULL) || /* enabled, not nexus? */
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(dptr->flags & DEV_DIS))
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(dptr->flags & DEV_DIS) ||
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(dptr->flags & DEV_NEXUS) )
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continue;
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continue;
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dibp = (DIB *) dptr->ctxt; /* get DIB */
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dibp = (DIB *) dptr->ctxt; /* get DIB */
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if (dibp == NULL) /* not there??? */
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if (dibp == NULL) /* not there??? */
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return SCPE_IERR;
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return SCPE_IERR;
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if (auto_fixed || (autp->amod)) { /* dyn csr needed? */
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if (autp->fixa[j]) /* fixed csr avail? */
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if (autp->fixa[k]) /* fixed csr avail? */
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dibp->ba = IOPAGEBASE + autp->fixa[j]; /* use it */
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dibp->ba = IOPAGEBASE + autp->fixa[k]; /* use it */
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else { /* no fixed left */
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else { /* no fixed left */
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dibp->ba = csr; /* set CSR */
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dibp->ba = csr; /* set CSR */
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csr += (autp->numc * autp->amod); /* next CSR */
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csr += (autp->numc * autp->amod); /* next CSR */
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} /* end else */
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} /* end else */
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if (autp->numv) { /* vec needed? */
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} /* end if dyn csr */
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if (autp->fixv[j]) { /* fixed vec avail? */
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if (autp->numv && (autp->vmod || auto_fixed)) { /* dyn vec needed? */
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uint32 numv = abs (autp->numv); /* get num vec */
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if (autp->fixv[k]) { /* fixed vec avail? */
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if (autp->numv > 0)
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if (autp->numv > 0)
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dibp->vec = VEC_Q + autp->fixv[k]; /* use it */
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dibp->vec = VEC_Q + autp->fixv[j]; /* use it */
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}
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}
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else { /* no fixed left */
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else { /* no fixed left */
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uint32 numv = abs (autp->numv); /* get num vec */
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vmask = autp->vmod - 1;
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vmask = autp->vmod - 1;
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vec = (vec + vmask) & ~vmask; /* align vector */
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vec = (vec + vmask) & ~vmask; /* align vector */
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if (autp->numv > 0)
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if (autp->numv > 0)
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dibp->vec = vec; /* set vector */
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dibp->vec = vec; /* set vector */
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vec += (autp->numc * numv * 4);
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vec += (autp->numc * numv * 4);
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} /* end else */
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} /* end else */
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} /* end if dyn vec */
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} /* end vec needed */
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k++; /* next instance */
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} /* end for j */
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} /* end for j */
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if (autp->amod) /* flt CSR? gap */
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if (autp->amod) /* flt CSR? gap */
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csr = csr + 2;
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csr = csr + 2;
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@ -327,7 +327,7 @@ return SCPE_OK;
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The table reflects the MicroVAX 3900 microcode, with one field addition - the
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The table reflects the MicroVAX 3900 microcode, with one field addition - the
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number of controllers field handles devices where multiple instances
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number of controllers field handles devices where multiple instances
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are simulated through a single DEVICE structure (e.g., DZ, VH).
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are simulated through a single DEVICE structure (e.g., DZ, VH, DL, DC).
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The table has been reviewed, extended and updated to reflect the contents of
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The table has been reviewed, extended and updated to reflect the contents of
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the auto configure table in VMS sysgen (V5.5-2)
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the auto configure table in VMS sysgen (V5.5-2)
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@ -360,8 +360,10 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{010700} }, /* KG11-A - fx CSR, no VEC */
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{010700} }, /* KG11-A - fx CSR, no VEC */
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{ { "RHA", "RHB" }, 1, 1, 0, 0,
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{ { "RHA", "RHB" }, 1, 1, 0, 0,
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{016700, 012440}, {0254, 0224} }, /* RH11/RH70 - fx CSR, fx VEC */
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{016700, 012440}, {0254, 0224} }, /* RH11/RH70 - fx CSR, fx VEC */
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{ { "CLK" }, 1, 0, 0, 0,
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{ { "CLK" }, 1, 1, 0, 0,
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{017546}, {0100} }, /* KW11L - fx CSR, fx VEC */
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{017546}, {0100} }, /* KW11L - fx CSR, fx VEC */
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{ { "PCLK" }, 1, 1, 0, 0,
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{012540}, {0104} }, /* KW11P - fx CSR, fx VEC */
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{ { "PTR" }, 1, 1, 0, 0,
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{ { "PTR" }, 1, 1, 0, 0,
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{017550}, {0070} }, /* PC11 reader - fx CSR, fx VEC */
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{017550}, {0070} }, /* PC11 reader - fx CSR, fx VEC */
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{ { "PTP" }, 1, 1, 0, 0,
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{ { "PTP" }, 1, 1, 0, 0,
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@ -387,7 +389,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{ { "RL" }, 1, 1, 0, 0,
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{ { "RL" }, 1, 1, 0, 0,
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{014400}, {0160} }, /* RL11 - fx CSR, fx VEC */
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{ { "DCI" }, DCX_LINES, 2, 0, 8,
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{ { "DCI" }, 1, 2, 0, 8,
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{014000, 014010, 014020, 014030,
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{014000, 014010, 014020, 014030,
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014040, 014050, 014060, 014070,
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014040, 014050, 014060, 014070,
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014100, 014110, 014120, 014130,
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014100, 014110, 014120, 014130,
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@ -424,7 +426,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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017430, 017432, 017434, 017436} }, /* DT11 - fx CSRs */
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017430, 017432, 017434, 017436} }, /* DT11 - fx CSRs */
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{ { NULL }, 1, 2, 0, 8,
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{ { NULL }, 1, 2, 0, 8,
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{016200, 016240} }, /* DX11 */
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{016200, 016240} }, /* DX11 */
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{ { "DLI" }, DLX_LINES, 2, 0, 8,
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{ { "DLI" }, 1, 2, 0, 8,
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{016500, 016510, 016520, 016530,
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{016500, 016510, 016520, 016530,
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016540, 016550, 016560, 016570,
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016540, 016550, 016560, 016570,
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016600, 016610, 016620, 016630,
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016600, 016610, 016620, 016630,
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@ -446,7 +448,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{ { NULL }, 1, 2, 8, 8 }, /* LK11A */
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{ { NULL }, 1, 2, 8, 8 }, /* LK11A */
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{ { "DMC0", "DMC1", "DMC2", "DMC3" },
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{ { "DMC0", "DMC1", "DMC2", "DMC3" },
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1, 2, 8, 8 }, /* DMC11 */
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1, 2, 8, 8 }, /* DMC11 */
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{ { "DZ" }, DZ_MUXES, 2, 8, 8 }, /* DZ11 */
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{ { "DZ" }, 1, 2, 8, 8 }, /* DZ11 */
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{ { NULL }, 1, 2, 8, 8 }, /* KMC11 */
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{ { NULL }, 1, 2, 8, 8 }, /* KMC11 */
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{ { NULL }, 1, 2, 8, 8 }, /* LPP11 */
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{ { NULL }, 1, 2, 8, 8 }, /* LPP11 */
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{ { NULL }, 1, 2, 8, 8 }, /* VMV21 */
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{ { NULL }, 1, 2, 8, 8 }, /* VMV21 */
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@ -490,11 +492,13 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
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{004400, 004440, 004500, 004540} }, /* KTC32 */
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{004400, 004440, 004500, 004540} }, /* KTC32 */
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{ { NULL }, 1, 2, 0, 8,
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{ { NULL }, 1, 2, 0, 8,
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{004100} }, /* IEQ11 */
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{004100} }, /* IEQ11 */
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{ { "VH" }, VH_MUXES, 2, 16, 8 }, /* DHU11/DHQ11 */
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{ { "VH" }, 1, 2, 16, 8 }, /* DHU11/DHQ11 */
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{ { NULL }, 1, 6, 32, 4 }, /* DMZ32 */
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{ { NULL }, 1, 6, 32, 4 }, /* DMZ32 */
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{ { NULL }, 1, 6, 32, 4 }, /* CP132 */
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{ { NULL }, 1, 6, 32, 4 }, /* CP132 */
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{ { NULL }, 1, 1, 0, 0,
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{ { "TC" }, 1, 1, 0, 0,
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{017340}, {0214} }, /* TC11 */
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{017340}, {0214} }, /* TC11 */
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{ { "TA" }, 1, 1, 0, 0,
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{017500}, {0260} }, /* TA11 */
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{ { NULL }, 1, 2, 64, 8,
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{ { NULL }, 1, 2, 64, 8,
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{017200} }, /* QVSS - fx CSR */
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{017200} }, /* QVSS - fx CSR */
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{ { NULL }, 1, 1, 8, 4 }, /* VS31 */
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{ { NULL }, 1, 1, 8, 4 }, /* VS31 */
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@ -560,8 +564,7 @@ uint32 vec = VEC_Q + AUTO_VECBASE;
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AUTO_CON *autp;
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AUTO_CON *autp;
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DEVICE *dptr;
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DEVICE *dptr;
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DIB *dibp;
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DIB *dibp;
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t_bool auto_fixed = TRUE;
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uint32 j, vmask, amask;
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uint32 j, k, vmask, amask;
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if (autcon_enb == 0) /* enabled? */
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if (autcon_enb == 0) /* enabled? */
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return SCPE_OK;
|
return SCPE_OK;
|
||||||
|
|
@ -580,7 +583,7 @@ for (autp = auto_tab; autp->numc >= 0; autp++) { /* loop thru table */
|
||||||
amask = autp->amod - 1;
|
amask = autp->amod - 1;
|
||||||
csr = (csr + amask) & ~amask; /* align csr */
|
csr = (csr + amask) & ~amask; /* align csr */
|
||||||
}
|
}
|
||||||
for (j = k = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
|
for (j = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
|
||||||
if (autp->dnam[j] == NULL) /* no device? */
|
if (autp->dnam[j] == NULL) /* no device? */
|
||||||
break;
|
break;
|
||||||
dptr = find_dev (autp->dnam[j]); /* find ctrl */
|
dptr = find_dev (autp->dnam[j]); /* find ctrl */
|
||||||
|
|
@ -591,29 +594,26 @@ for (autp = auto_tab; autp->numc >= 0; autp++) { /* loop thru table */
|
||||||
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
||||||
if (dibp == NULL) /* not there??? */
|
if (dibp == NULL) /* not there??? */
|
||||||
return SCPE_IERR;
|
return SCPE_IERR;
|
||||||
if (auto_fixed || (autp->amod)) { /* dyn csr needed? */
|
if (autp->fixa[j]) /* fixed csr avail? */
|
||||||
if (autp->fixa[k]) /* fixed csr avail? */
|
dibp->ba = IOPAGEBASE + autp->fixa[j]; /* use it */
|
||||||
dibp->ba = IOPAGEBASE + autp->fixa[k]; /* use it */
|
else { /* no fixed left */
|
||||||
else { /* no fixed left */
|
dibp->ba = csr; /* set CSR */
|
||||||
dibp->ba = csr; /* set CSR */
|
csr += (autp->numc * autp->amod); /* next CSR */
|
||||||
csr += (autp->numc * autp->amod); /* next CSR */
|
} /* end else */
|
||||||
} /* end else */
|
if (autp->numv) { /* vec needed? */
|
||||||
} /* end if dyn csr */
|
if (autp->fixv[j]) { /* fixed vec avail? */
|
||||||
if (autp->numv && (autp->vmod || auto_fixed)) { /* dyn vec needed? */
|
|
||||||
uint32 numv = abs (autp->numv); /* get num vec */
|
|
||||||
if (autp->fixv[k]) { /* fixed vec avail? */
|
|
||||||
if (autp->numv > 0)
|
if (autp->numv > 0)
|
||||||
dibp->vec = VEC_Q + autp->fixv[k]; /* use it */
|
dibp->vec = VEC_Q + autp->fixv[j]; /* use it */
|
||||||
}
|
}
|
||||||
else { /* no fixed left */
|
else { /* no fixed left */
|
||||||
|
uint32 numv = abs (autp->numv); /* get num vec */
|
||||||
vmask = autp->vmod - 1;
|
vmask = autp->vmod - 1;
|
||||||
vec = (vec + vmask) & ~vmask; /* align vector */
|
vec = (vec + vmask) & ~vmask; /* align vector */
|
||||||
if (autp->numv > 0)
|
if (autp->numv > 0)
|
||||||
dibp->vec = vec; /* set vector */
|
dibp->vec = vec; /* set vector */
|
||||||
vec += (autp->numc * numv * 4);
|
vec += (autp->numc * numv * 4);
|
||||||
} /* end else */
|
} /* end else */
|
||||||
} /* end if dyn vec */
|
} /* end vec needed */
|
||||||
k++; /* next instance */
|
|
||||||
} /* end for j */
|
} /* end for j */
|
||||||
if (autp->amod) /* flt CSR? gap */
|
if (autp->amod) /* flt CSR? gap */
|
||||||
csr = csr + 2;
|
csr = csr + 2;
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue