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Removed IOBA_FLOAT and replaced with IOBA_AUTO

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This commit is contained in:
Mark Pizzolato 2012-12-28 12:15:08 -08:00
parent 0a0b8dbe31
commit b2ed63f31a
12 changed files with 10 additions and 18 deletions
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1
PDP11/pdp11_defs.h
View file

@ -518,7 +518,6 @@ typedef struct pdp_dib DIB;
Massbus devices (RP, TU) do not appear in the Unibus IO page */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* Processor registers which have I/O page addresses
*/

10
PDP11/pdp11_dmc.c
View file

@ -353,14 +353,14 @@ MTAB dmc_mod[] = {
};
#define IOLN_DMC 010
DIB dmc0_dib = { IOBA_FLOAT, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_FLOAT, {&dmc_rxint, &dmc_txint} };
DIB dmc1_dib = { IOBA_FLOAT, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_FLOAT, {&dmc_rxint, &dmc_txint} };
DIB dmc2_dib = { IOBA_FLOAT, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_FLOAT, {&dmc_rxint, &dmc_txint} };
DIB dmc3_dib = { IOBA_FLOAT, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_FLOAT, {&dmc_rxint, &dmc_txint} };
DIB dmc0_dib = { IOBA_AUTO, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_AUTO, {&dmc_rxint, &dmc_txint} };
DIB dmc1_dib = { IOBA_AUTO, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_AUTO, {&dmc_rxint, &dmc_txint} };
DIB dmc2_dib = { IOBA_AUTO, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_AUTO, {&dmc_rxint, &dmc_txint} };
DIB dmc3_dib = { IOBA_AUTO, IOLN_DMC, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_AUTO, {&dmc_rxint, &dmc_txint} };
#define IOLN_DMP 010
DIB dmp_dib = { IOBA_FLOAT, IOLN_DMP, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_FLOAT, {&dmc_rxint, &dmc_txint }};
DIB dmp_dib = { IOBA_AUTO, IOLN_DMP, &dmc_rd, &dmc_wr, 2, IVCL (DMCRX), VEC_AUTO, {&dmc_rxint, &dmc_txint }};
DEVICE dmc_dev[] =
{

6
PDP11/pdp11_rq.c
View file

@ -1023,7 +1023,7 @@ DEVICE rq_dev = {
MSC rqb_ctx = { 1 };
DIB rqb_dib = {
IOBA_FLOAT, IOLN_RQ, &rq_rd, &rq_wr,
IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
1, IVCL (RQ), 0, { &rq_inta }
};
@ -1095,7 +1095,7 @@ DEVICE rqb_dev = {
MSC rqc_ctx = { 2 };
DIB rqc_dib = {
IOBA_FLOAT, IOLN_RQ, &rq_rd, &rq_wr,
IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
1, IVCL (RQ), 0, { &rq_inta }
};
@ -1167,7 +1167,7 @@ DEVICE rqc_dev = {
MSC rqd_ctx = { 3 };
DIB rqd_dib = {
IOBA_FLOAT, IOLN_RQ, &rq_rd, &rq_wr,
IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
1, IVCL (RQ), 0, { &rq_inta }
};

2
PDP11/pdp11_vh.c
View file

@ -345,7 +345,7 @@ static t_stat vh_show_log (FILE *st, UNIT *uptr, int32 val, void *desc);
#define IOLN_VH 020
static DIB vh_dib = {
IOBA_FLOAT,
IOBA_AUTO,
IOLN_VH * VH_MUXES,
&vh_rd, /* read */
&vh_wr, /* write */

2
PDP11/pdp11_xu.c
View file

@ -198,7 +198,7 @@ DEVICE xu_dev = {
#define IOLN_XU 010
DIB xub_dib = { IOBA_FLOAT, IOLN_XU, &xu_rd, &xu_wr,
DIB xub_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
1, IVCL (XU), 0, { &xu_int } };
UNIT xub_unit[] = {

1
VAX/vax610_defs.h
View file

@ -190,7 +190,6 @@ typedef struct {
/* Qbus I/O page layout - see pdp11_ui_lib.c for address layout details */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* The KA610 maintains 4 separate hardware IPL levels, IPL 17 to IPL 14;

1
VAX/vax630_defs.h
View file

@ -235,7 +235,6 @@ typedef struct {
/* Qbus I/O page layout - see pdp11_ui_lib.c for address layout details */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* The KA620/KA630 maintains 4 separate hardware IPL levels, IPL 17 to IPL 14;

1
VAX/vax730_defs.h
View file

@ -234,7 +234,6 @@ typedef struct {
/* Unibus I/O page layout - see pdp11_ui_lib.c for address layout details */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* Interrupt assignments; within each level, priority is right to left */

1
VAX/vax750_defs.h
View file

@ -270,7 +270,6 @@ typedef struct {
Massbus devices (RP, TU) do not appear in the Unibus IO page */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* Interrupt assignments; within each level, priority is right to left */

1
VAX/vax780_defs.h
View file

@ -288,7 +288,6 @@ typedef struct {
Massbus devices (RP, TU) do not appear in the Unibus IO page */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* Interrupt assignments; within each level, priority is right to left */

1
VAX/vax860_defs.h
View file

@ -322,7 +322,6 @@ typedef struct {
Massbus devices (RP, TU) do not appear in the Unibus IO page */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* Interrupt assignments; within each level, priority is right to left */

1
VAX/vaxmod_defs.h
View file

@ -285,7 +285,6 @@ typedef struct {
/* Qbus I/O page layout - see pdp11_ui_lib.c for address layout details */
#define IOBA_AUTO (0) /* Assigned by Auto Configure */
#define IOBA_FLOAT (0) /* Assigned by Auto Configure */
/* The KA65x maintains 4 separate hardware IPL levels, IPL 17 to IPL 14;