From b6393b36b474088641c3551e03a24145fa42cf19 Mon Sep 17 00:00:00 2001 From: Bob Supnik Date: Tue, 23 Nov 2004 15:49:00 -0800 Subject: [PATCH] Notes For V3.3 RESTRICTION: The HP DS disk is not debugged. DO NOT enable this feature for normal operations. WARNING: Massive changes in the PDP-11 make all previous SAVEd file obsolete. Do not attempt to use a PDP-11 SAVE file from a prior release with V3.3! 1. New Features in 3.3 1.1 SCP - Added -p (powerup) qualifier to RESET - Changed SET ONLINE/OFFLINE to SET ENABLED/DISABLED - Moved SET DEBUG under SET CONSOLE hierarchy - Added optional parameter value to SHOW command - Added output file option to SHOW command 1.2 PDP-11 - Separated RH Massbus adapter from RP controller - Added TU tape support - Added model emulation framework - Added model details 1.3 VAX - Separated out CVAX-specific features from core instruction simulator - Implemented capability for CIS, octaword, compatibility mode instructions - Added instruction display and parse for compatibility mode - Changed SET CPU VIRTUAL=n to SHOW CPU VIRTUAL=n - Added =n optional parameter to SHOW CPU HISTORY 1.4 Unibus/Qbus simulators (PDP-11, VAX, PDP-10) - Simplified DMA API's - Modified DMA peripherals to use simplified API's 1.5 HP2100 (all changes from Dave Bryan) CPU - moved MP into its own device; added MP option jumpers - modified DMA to allow disabling - modified SET CPU 2100/2116 to truncate memory > 32K - added -F switch to SET CPU to force memory truncation - modified WRU to be REG_HRO - added BRK and DEL to save console settings DR - provided protected tracks and "Writing Enabled" status bit - added "parity error" status return on writes for 12606 - added track origin test for 12606 - added SCP test for 12606 - added "Sector Flag" status bit - added "Read Inhibit" status bit for 12606 - added TRACKPROT modifier LPS - added SET OFFLINE/ONLINE, POWEROFF/POWERON - added fast/realistic timing - added debug printouts LPT - added SET OFFLINE/ONLINE, POWEROFF/POWERON PTR - added paper tape loop mode, DIAG/READER modifiers to PTR - added PV_LEFT to PTR TRLLIM register CLK - modified CLK to permit disable 1.6 IBM 1401, IBM 1620, Interdata 16b, SDS 940, PDP-10 - Added instruction history 1.7 H316, PDP-15, PDP-8 - Added =n optional value to SHOW CPU HISTORY 2. Bugs Fixed in 3.3 2.1 SCP - Fixed comma-separated SET options (from Dave Bryan) - Fixed duplicate HELP displays with user-specified commands 2.2 PDP-10 - Replicated RP register state per drive - Fixed TU to set FCE on short record - Fixed TU to return bit<15> in drive type - Fixed TU format specification, 1:0 are don't cares - Fixed TU handling of TMK status - Fixed TU handling of DONE, ATA at end of operation - Implemented TU write check 2.3 PDP-11 - Replicated RP register state per drive - Fixed RQ, TQ to report correct controller type and stage 1 configuration flags on a Unibus system - Fixed HK CS2 flag 2.4 VAX - Fixed parsing of indirect displacement modes in instruction input 2.5 HP2100 (all fixes from Dave Bryan) CPU - fixed S-register behavior on 2116 - fixed LIx/MIx behavior for DMA on 2116 and 2100 - fixed LIx/MIx behavior for empty I/O card slots DP - fixed enable/disable from either device - fixed ANY ERROR status for 12557A interface - fixed unattached drive status for 12557A interface - status cmd without prior STC DC now completes (12557A) - OTA/OTB CC on 13210A interface also does CLC CC - fixed RAR model - fixed seek check on 13210 if sector out of range DQ - fixed enable/disable from either device - shortened xtime from 5 to 3 (drive avg 156KW/second) - fixed not ready/any error status - fixed RAR model DR - fixed enable/disable from either device - fixed sector return in status word - fixed DMA last word write, incomplete sector fill value - fixed 12610 SFC operation - fixed current-sector determination IPL - fixed enable/disable from either device LPS - fixed status returns for error conditions - fixed handling of non-printing characters - fixed handling of characters after column 80 - improved timing model accuracy for RTE LPT - fixed status returns for error conditions - fixed TOF handling so form remains on line 0 SYS - fixed display of CCA/CCB/CCE instructions 2.5 PDP-15 FPP - fixed URFST to mask low 9b of fraction - fixed exception PC setting --- 0readme_32.txt | 53 -- 0readme_33.txt | 143 ++++ ALTAIR/altair_sys.c | 8 +- AltairZ80/altairZ80.txt | 914 -------------------- AltairZ80/altairZ80_cpu.c | 27 +- AltairZ80/altairZ80_sio.c | 27 +- AltairZ80/altairz80_doc.txt | 23 +- H316/h316_cpu.c | 16 +- H316/h316_doc.txt | 17 +- HP2100/hp2100_cpu.c | 253 ++++-- HP2100/hp2100_defs.h | 21 +- HP2100/hp2100_diag.txt | 1613 ++++++++++++++++++++++++++++++++--- HP2100/hp2100_doc.txt | 413 ++++++--- HP2100/hp2100_dp.c | 227 ++--- HP2100/hp2100_dq.c | 205 ++--- HP2100/hp2100_dr.c | 250 +++++- HP2100/hp2100_ds.c | 115 ++- HP2100/hp2100_ipl.c | 10 +- HP2100/hp2100_lps.c | 278 +++++- HP2100/hp2100_lpt.c | 64 +- HP2100/hp2100_ms.c | 12 +- HP2100/hp2100_mt.c | 10 +- HP2100/hp2100_mux.c | 32 +- HP2100/hp2100_stddev.c | 49 +- HP2100/hp2100_sys.c | 8 +- I1401/i1401_cd.c | 65 +- I1401/i1401_cpu.c | 123 ++- I1401/i1401_dat.h | 32 +- I1401/i1401_defs.h | 5 + I1401/i1401_doc.txt | 17 +- I1401/i1401_sys.c | 23 +- I1620/i1620_cpu.c | 88 ++ I1620/i1620_doc.txt | 15 +- I1620/i1620_tty.c | 6 +- Ibm1130/ibm1130.mak | 30 +- Ibm1130/ibm1130_cpu.c | 11 +- Ibm1130/ibm1130_cr.c | 29 +- Ibm1130/ibm1130_disk.c | 2 +- Ibm1130/ibm1130_gui.c | 10 +- Ibm1130/ibm1130_ptrp.c | 309 +++++++ Ibm1130/ibm1130_stddev.c | 7 +- Ibm1130/ibm1130_sys.c | 4 +- Ibm1130/makefile | 2 +- Ibm1130/utils/asm1130.c | 164 +++- Ibm1130/utils/mkboot.c | 4 +- Interdata/id16_cpu.c | 95 ++- Interdata/id32_cpu.c | 16 +- Interdata/id_defs.h | 4 +- Interdata/id_doc.txt | 24 +- NOVA/eclipse_cpu.c | 42 +- NOVA/nova_doc.txt | 6 +- PDP1/pdp1_cpu.c | 102 ++- PDP1/pdp1_doc.txt | 15 +- PDP10/pdp10_cpu.c | 86 +- PDP10/pdp10_defs.h | 12 +- PDP10/pdp10_doc.txt | 17 +- PDP10/pdp10_ksio.c | 26 +- PDP10/pdp10_lp20.c | 2 +- PDP10/pdp10_rp.c | 219 +++-- PDP10/pdp10_tu.c | 136 +-- PDP11/pdp11_cis.c | 20 +- PDP11/pdp11_cpu.c | 1054 ++++++++++++----------- PDP11/pdp11_cpumod.c | 977 +++++++++++++++++++++ PDP11/pdp11_cpumod.h | 280 ++++++ PDP11/pdp11_defs.h | 289 ++++++- PDP11/pdp11_doc.txt | 406 ++++++--- PDP11/pdp11_fp.c | 90 +- PDP11/pdp11_hk.c | 88 +- PDP11/pdp11_io.c | 302 +++---- PDP11/pdp11_lp.c | 4 - PDP11/pdp11_rh.c | 779 +++++++++++++++++ PDP11/pdp11_rk.c | 13 +- PDP11/pdp11_rl.c | 19 +- PDP11/pdp11_rp.c | 1014 +++++++++------------- PDP11/pdp11_rq.c | 107 ++- PDP11/pdp11_ry.c | 9 +- PDP11/pdp11_stddev.c | 50 +- PDP11/pdp11_sys.c | 11 +- PDP11/pdp11_tc.c | 18 +- PDP11/pdp11_tm.c | 7 +- PDP11/pdp11_tq.c | 41 +- PDP11/pdp11_ts.c | 141 +-- PDP11/pdp11_tu.c | 912 ++++++++++++++++++++ PDP11/pdp11_vh.c | 9 +- PDP11/pdp11_xq.c | 58 +- PDP11/pdp11_xu.c | 36 +- PDP11/pdp11_xu.h | 8 +- PDP18B/pdp18b_cpu.c | 16 +- PDP18B/pdp18b_doc.txt | 11 +- PDP18B/pdp18b_fpp.c | 29 +- PDP8/pdp8_cpu.c | 16 +- PDP8/pdp8_doc.txt | 13 +- PDP8/pdp8_rl.c | 2 +- S3/s3_cpu.c | 2 +- S3/s3_sys.c | 8 +- SDS/sds_cpu.c | 121 ++- SDS/sds_doc.txt | 15 +- VAX/vax780_defs.h | 405 +++++++++ VAX/vax780_doc.txt | 1077 +++++++++++++++++++++++ VAX/vax780_mba.c | 699 +++++++++++++++ VAX/vax780_sbimem.c | 903 ++++++++++++++++++++ VAX/vax780_stddev.c | 846 ++++++++++++++++++ VAX/vax780_syslist.c | 130 +++ VAX/vax780_uba.c | 1106 ++++++++++++++++++++++++ VAX/vax_cis.c | 1607 ++++++++++++++++++++++++++++++++++ VAX/vax_cmode.c | 1020 ++++++++++++++++++++++ VAX/vax_cpu.c | 465 +++++----- VAX/vax_cpu1.c | 107 +-- VAX/vax_defs.h | 152 ++-- VAX/vax_doc.txt | 238 +++--- VAX/vax_fpa.c | 122 ++- VAX/vax_io.c | 115 ++- VAX/vax_mmu.c | 3 +- VAX/vax_octa.c | 1110 ++++++++++++++++++++++++ VAX/vax_stddev.c | 32 +- VAX/vax_sys.c | 264 +++--- VAX/vax_syscm.c | 587 +++++++++++++ VAX/vax_sysdev.c | 145 +++- VAX/vax_syslist.c | 124 +++ VAX/vaxmod_defs.h | 35 +- descrip.mms | 10 +- makefile | 32 +- scp.c | 398 ++++----- scp.h | 45 + sim_console.c | 73 +- sim_console.h | 4 + sim_defs.h | 63 +- sim_rev.h | 177 +++- sim_tmxr.c | 2 +- simh_doc.txt | 142 +-- simh_swre.txt | 16 +- 131 files changed, 20920 insertions(+), 4845 deletions(-) delete mode 100644 0readme_32.txt create mode 100644 0readme_33.txt delete mode 100644 AltairZ80/altairZ80.txt create mode 100644 Ibm1130/ibm1130_ptrp.c create mode 100644 PDP11/pdp11_cpumod.c create mode 100644 PDP11/pdp11_cpumod.h create mode 100644 PDP11/pdp11_rh.c create mode 100644 PDP11/pdp11_tu.c create mode 100644 VAX/vax780_defs.h create mode 100644 VAX/vax780_doc.txt create mode 100644 VAX/vax780_mba.c create mode 100644 VAX/vax780_sbimem.c create mode 100644 VAX/vax780_stddev.c create mode 100644 VAX/vax780_syslist.c create mode 100644 VAX/vax780_uba.c create mode 100644 VAX/vax_cis.c create mode 100644 VAX/vax_cmode.c create mode 100644 VAX/vax_octa.c create mode 100644 VAX/vax_syscm.c create mode 100644 VAX/vax_syslist.c diff --git a/0readme_32.txt b/0readme_32.txt deleted file mode 100644 index ab6833aa..00000000 --- a/0readme_32.txt +++ /dev/null @@ -1,53 +0,0 @@ -Notes For V3.2-3 - -RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT -enable this feature for normal operations. -RESTRICTION: The HP DS disk is not debugged. DO NOT enable this -feature for normal operations. - -1. New Features in 3.2-3 - -1.1 SCP - -- Added ECHO command (from Dave Bryan) - -2. Bugs Fixed in 3.2-2 - -2.1 SCP - -- Qualified RESTORE detach with SIM_SW_REST -- Fixed OS/2 issues in sim_console.c and sim_sock.h - -2.2 HP2100 (all from Dave Bryan) - -- Changed CPU error stops to report PC not PC + 1 - -- Fixed CLC to DR to stop operation in progress - -- Functional and timing fixes to DP - > controller sets ATN for all commands except read status - > controller resumes polling for ATN interrupts after read status - > check status on unattached drive set busy and not ready - > check status tests wrong unit for write protect status - > drive on line sets ATN, will set FLG if polling - -- Functional and timing fixes to MS - > fixed erroneous execution of rejected command - > fixed erroneous execution of select-only command - > fixed erroneous execution of clear command - > fixed odd byte handling for read - > fixed spurious odd byte status on 13183A EOF - > modified handling of end of medium - > added detailed timing, with fast and realistic modes - > added reel sizes to simulate end of tape - > added debug printouts - -- Modified MT handling of end of medium - -- Added tab to TTY control char set - -2.3 VAX - -- VAX RQ controllers start LUNs at 0 (from Andreas Cejna) -- Added compatibility mode definitions -- Fixed EMODD, EMODG to probe second longword of quadword destination diff --git a/0readme_33.txt b/0readme_33.txt new file mode 100644 index 00000000..b9ba0667 --- /dev/null +++ b/0readme_33.txt @@ -0,0 +1,143 @@ +Notes For V3.3 + +RESTRICTION: The HP DS disk is not debugged. DO NOT enable this +feature for normal operations. +WARNING: Massive changes in the PDP-11 make all previous SAVEd +file obsolete. Do not attempt to use a PDP-11 SAVE file from a +prior release with V3.3! + +1. New Features in 3.3 + +1.1 SCP + +- Added -p (powerup) qualifier to RESET +- Changed SET ONLINE/OFFLINE to SET ENABLED/DISABLED +- Moved SET DEBUG under SET CONSOLE hierarchy +- Added optional parameter value to SHOW command +- Added output file option to SHOW command + +1.2 PDP-11 + +- Separated RH Massbus adapter from RP controller +- Added TU tape support +- Added model emulation framework +- Added model details + +1.3 VAX + +- Separated out CVAX-specific features from core instruction simulator +- Implemented capability for CIS, octaword, compatibility mode instructions +- Added instruction display and parse for compatibility mode +- Changed SET CPU VIRTUAL=n to SHOW CPU VIRTUAL=n +- Added =n optional parameter to SHOW CPU HISTORY + +1.4 Unibus/Qbus simulators (PDP-11, VAX, PDP-10) + +- Simplified DMA API's +- Modified DMA peripherals to use simplified API's + +1.5 HP2100 (all changes from Dave Bryan) + +CPU - moved MP into its own device; added MP option jumpers + - modified DMA to allow disabling + - modified SET CPU 2100/2116 to truncate memory > 32K + - added -F switch to SET CPU to force memory truncation + - modified WRU to be REG_HRO + - added BRK and DEL to save console settings + +DR - provided protected tracks and "Writing Enabled" status bit + - added "parity error" status return on writes for 12606 + - added track origin test for 12606 + - added SCP test for 12606 + - added "Sector Flag" status bit + - added "Read Inhibit" status bit for 12606 + - added TRACKPROT modifier + +LPS - added SET OFFLINE/ONLINE, POWEROFF/POWERON + - added fast/realistic timing + - added debug printouts + +LPT - added SET OFFLINE/ONLINE, POWEROFF/POWERON + +PTR - added paper tape loop mode, DIAG/READER modifiers to PTR + - added PV_LEFT to PTR TRLLIM register + +CLK - modified CLK to permit disable + +1.6 IBM 1401, IBM 1620, Interdata 16b, SDS 940, PDP-10 + +- Added instruction history + +1.7 H316, PDP-15, PDP-8 + +- Added =n optional value to SHOW CPU HISTORY + +2. Bugs Fixed in 3.3 + +2.1 SCP + +- Fixed comma-separated SET options (from Dave Bryan) +- Fixed duplicate HELP displays with user-specified commands + +2.2 PDP-10 + +- Replicated RP register state per drive +- Fixed TU to set FCE on short record +- Fixed TU to return bit<15> in drive type +- Fixed TU format specification, 1:0 are don't cares +- Fixed TU handling of TMK status +- Fixed TU handling of DONE, ATA at end of operation +- Implemented TU write check + +2.3 PDP-11 + +- Replicated RP register state per drive +- Fixed RQ, TQ to report correct controller type and stage 1 configuration + flags on a Unibus system +- Fixed HK CS2 flag + +2.4 VAX + +- Fixed parsing of indirect displacement modes in instruction input + +2.5 HP2100 (all fixes from Dave Bryan) + +CPU - fixed S-register behavior on 2116 + - fixed LIx/MIx behavior for DMA on 2116 and 2100 + - fixed LIx/MIx behavior for empty I/O card slots + +DP - fixed enable/disable from either device + - fixed ANY ERROR status for 12557A interface + - fixed unattached drive status for 12557A interface + - status cmd without prior STC DC now completes (12557A) + - OTA/OTB CC on 13210A interface also does CLC CC + - fixed RAR model + - fixed seek check on 13210 if sector out of range + +DQ - fixed enable/disable from either device + - shortened xtime from 5 to 3 (drive avg 156KW/second) + - fixed not ready/any error status + - fixed RAR model + +DR - fixed enable/disable from either device + - fixed sector return in status word + - fixed DMA last word write, incomplete sector fill value + - fixed 12610 SFC operation + - fixed current-sector determination + +IPL - fixed enable/disable from either device + +LPS - fixed status returns for error conditions + - fixed handling of non-printing characters + - fixed handling of characters after column 80 + - improved timing model accuracy for RTE + +LPT - fixed status returns for error conditions + - fixed TOF handling so form remains on line 0 + +SYS - fixed display of CCA/CCB/CCE instructions + +2.5 PDP-15 + +FPP - fixed URFST to mask low 9b of fraction + - fixed exception PC setting diff --git a/ALTAIR/altair_sys.c b/ALTAIR/altair_sys.c index cf558d41..00addeac 100644 --- a/ALTAIR/altair_sys.c +++ b/ALTAIR/altair_sys.c @@ -173,7 +173,7 @@ return (SCPE_OK); status = error code */ -int32 fprint_sym (FILE *of, int32 addr, unsigned int32 *val, +int32 fprint_sym (FILE *of, int32 addr, uint32 *val, UNIT *uptr, int32 sw) { int32 cflag, c1, c2, inst, adr; @@ -220,7 +220,7 @@ return -(oplen[inst] - 1); status = error status */ -int32 parse_sym (char *cptr, int32 addr, UNIT *uptr, unsigned int32 *val, int32 sw) +int32 parse_sym (char *cptr, int32 addr, UNIT *uptr, uint32 *val, int32 sw) { int32 cflag, i = 0, j, r; char gbuf[CBUFSIZE]; @@ -229,11 +229,11 @@ cflag = (uptr == NULL) || (uptr == &cpu_unit); while (isspace (*cptr)) cptr++; /* absorb spaces */ if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */ if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */ - val[0] = (unsigned int) cptr[0]; + val[0] = (uint32) cptr[0]; return SCPE_OK; } if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII string? */ if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */ - val[0] = ((unsigned int) cptr[0] << 8) + (unsigned int) cptr[1]; + val[0] = ((uint32) cptr[0] << 8) + (uint32) cptr[1]; return SCPE_OK; } /* An instruction: get opcode (all characters until null, comma, diff --git a/AltairZ80/altairZ80.txt b/AltairZ80/altairZ80.txt deleted file mode 100644 index 6099fc23..00000000 --- a/AltairZ80/altairZ80.txt +++ /dev/null @@ -1,914 +0,0 @@ -Altair 8800 Simulator with Z80 support -====================================== - -0. Revision History - -- 26-Jan-2004, Peter Schorn (added support for t-state stepping) -- 25-Feb-2003, Peter Schorn (added support for real time simulation) -- 9-Oct-2002, Peter Schorn (added support for simulated hard disk) -- 28-Sep-2002, Peter Schorn (number of tracks per disk can be configured) -- 19-Sep-2002, Peter Schorn (added WARNROM feature) -- 31-Aug-2002, Peter Schorn (added extended ROM features suggested - by Scott LaBombard) -- 4-May-2002, Peter Schorn (added description of MP/M II sample software) -- 28-Apr-2002, Peter Schorn (added periodic timer interrupts and three - additional consoles) -- 15-Apr-2002, Peter Schorn (added memory breakpoint) -- 7-Apr-2002, Peter Schorn (added ROM / NOROM switch) -Original version of this document written by Charles E Owen - - -1. Background. - - The MITS (Micro Instrumentation and Telemetry Systems) Altair 8800 was -announced on the January 1975 cover of Popular Electronics, which boasted -you could buy and build this powerful computer kit for only $397. The kit -consisted at that time of only the parts to build a case, power supply, -card cage (18 slots), CPU card, and memory card with 256 *bytes* of memory. -Still, thousands were ordered within the first few months after the -announcement, starting the personal computer revolution as we know it -today. - - Many laugh at the small size of the that first kit, noting there were no -peripherals and the 256 byte memory size. But the computer was an open -system, and by 1977 MITS and many other small startups had added many -expansion cards to make the Altair quite a respectable little computer. The -"Altair Bus" that made this possible was soon called the S-100 Bus, later -adopted as an industry standard, and eventually became the IEE-696 Bus. - - -2. Hardware - - We are simulating a fairly "loaded" Altair 8800 from about 1977, with the -following configuration: - - device simulates - name(s) - - CPU Altair 8800 with Intel 8080 CPU board, 62KB - of RAM, 2K of EPROM with start boot ROM. - SIO MITS 88-2SIO Dual Serial Interface Board. Port 1 - is assumed to be connected to a serial "glass - TTY" that is your terminal running the Simulator. - PTR Paper Tape Reader attached to port 2 of the 2SIO board. - PTP Paper Tape Punch attached to port 2 of the - 2SIO board. This also doubles as a printer port. - DSK MITS 88-DISK Floppy Disk controller with up - to eight drives. - - -2.1 CPU - - We have 2 CPU options that were not present on the original machine but -are useful in the simulator. We also allow you to select memory sizes, but -be aware that some sample software requires the full 64K (i.e. CP/M) and -the MITS Disk Basic and Altair DOS require about a minimum of 24K. - - SET CPU 8080 Simulates the 8080 CPU (normal) - SET CPU Z80 Simulates the Z80 CPU. Note that some software (e.g. most - original Altair software such as 4K Basic) requires an 8080 CPU and - will not or not properly run on a Z80. This is mainly due to the use - of the parity flag on the 8080 which has not always the same - semantics on the Z80. - - SET CPU ITRAP Causes the simulator to halt if an invalid opcode - is detected (depending on the chosen CPU). - SET CPU NOITRAP Does not stop on an invalid Opcode. This is - how the real 8080 works. - - SET CPU 4K - SET CPU 8K - SET CPU 12K - SET CPU 16K - ...... (in 4K steps) - SET CPU 64K All these set various CPU memory configurations. - - SET CPU BANKED Enables the banked memory support. The simulated memory - has eight banks with address range 0..'common' (see registers below) - and a common area from 'common' to 0xfff which is common to all - banks. The currently active bank is determined by register 'bank' - (see below). You can only switch to banked memory if the memory - is set to 64K. The banked memory is used by CP/M 3. - - SET CPU NONBANKED Disables banked memory support. - - SET CPU ROM Enables the ROM from address 'ROMLOW' to 'ROMHIGH' - (see below under CPU Registers) and prevents write access - to these locations. This is the default setting. - - SET CPU NOROM Disables the ROM. - - SET CPU ALTAIRROM Enables the slightly modified but downwards compatible - Altair boot ROM at addresses 0FF00 to 0FFFF. This is the default. - - SET CPU NOALTAIRROM Disables standard Altair ROM behavior. - - SET CPU WARNROM Enables warning messages to be printed when the CPU - attempts to write into ROM or into non-existing memory. Also prints - a warning message if the CPU attempts to read from non-existing - memory. - - SET CPU NOWARNROM Suppreses all warning message of "WARNROM". Note that - some software tries on purpose to write to ROM in order to detect - the available RAM. - - The BOOT EPROM card starts at address 0FF00 if it has been enabled by -'SET CPU ALTAIRROM'. Jumping to this address will boot drive 0 of the -floppy controller (CPU must be set to ROM or equivalent code must be -present). If no valid bootable software is present there the machine -crashes. This is historically accurate behavior. - - The real 8080, on receiving a HLT (Halt) instruction, freezes the -processor and only an interrupt or CPU hardware reset will restore it. The -simulator is alot nicer, it will halt but send you back to the simulator -command line. - -CPU Registers include the following: - - Name Size Comment - - PC 16 The Program Counter - AF 16 The accumulator and the flag register - F = S Z - AC - P/V N C - S = Sign flag. - Z = Zero Flag. - AC = Auxillary Carry flag. - P/V = Parity flag on 8080 - Parity / Overflow flag on Z80 - - = not used (undefined) - N = Internal sign flag - C = Carry flag. - BC 16 The BC register pair. - Register B is the high 8 bits, C is the lower 8 bits - DE 16 The DE register pair. - Register D is the high 8 bits, E is the lower 8 bits. - HL 16 The HL register pair. - Register H is the high 8 bits, L is the lower 8 bits. - AF1 16 The alternate AF register (on Z80 only) - BC1 16 The alternate BC register (on Z80 only) - DE1 16 The alternate DE register (on Z80 only) - HL1 16 The alternate HL register (on Z80 only) - IX 16 The IX index register (on Z80 only) - IY 16 The IY index register (on Z80 only) - IFF 8 Interrupt flag (on Z80 only) - INT 8 Interrupt register (on Z80 only) - - SR 16 The front panel switches (use D SR 8 for 4k Basic). - WRU 8 The interrupt character. This starts as 5 - (ctrl-E) but some Altair software uses this - keystroke so best to change this to something - exotic such as 035 (which is Ctl-]). - - BANK 3 The currently active memory bank (if banked memory - is activated - see memory options above) - COMMON 16 The starting address of common memory. Originally set - to 0xc000 (note this setting must agree with the - value supplied to GENCPM for CP/M 3 system generation) - ROMLOW 16 The starting address of the ROM. Default is 0FF00. - ROMHIGH 16 The final address of the ROM. Default is 0FFFF. - CLOCK 32 The clock speed of the simulated CPU in kHz or 0 to run - at maximum speed. To set the clock speed for a typical - 4 MHz Z80 CPU, use D CLOCK 4000. The CP/M utility SPEED - measures the clock speed of the simulated CPU. - - -2.2 The Serial I/O Card (2SIO) - - This simple programmed I/O device provides 2 serial ports to the outside -world, which could be hardware jumpered to support RS-232 plugs or a TTY -current loop interface. The standard I/O addresses assigned by MITS was -10-11 (hex) for the first port, and 12-13 (hex) for the second. We follow -this standard in the Simulator. - - The simulator directs I/O to/from the first port to the screen. The -second port reads from an attachable "tape reader" file on input, and -writes to an attachable "punch file" on output. These files are considered -a simple stream of 8-bit bytes. - - The SIO can be configured in SIMH with the following commands: - - SET SIO TTY Bit 8 is set to zero on console output - SET SIO ANSI Bit 8 is not touched on console output - - SET SIO ALL Console input support lower- and upper case - SET SIO UPPER Console input is transformed to upper case characters only - (This feature is useful for most Altair software) - - SET SIO BS Map the delete character to backspace - SET SIO DEL Map the backspace character to delete - - SET SIO QUIET Do not print warning messages - SET SIO VERBOSE Print warning messages (useful for debugging) - The register SIOWL determines how often the same warning - is displayed. The default is 3. - - You can also attach the SIO to a port: - - ATTACH SIO 23 Console IO goes via a Telnet connection on port 23 - DETACH SIO Console IO goes via the regular SIMH console - - -2.3 The SIMH pseudo device - - The SIMH pseudo device facilitates the communication between the -simulated ALTAIR and the simulator environment. This device defines a -number of (most R/O) registers (see source code) which are primarily useful -for debugging purposes. - - The SIMH pseudo device can be configured with - - SET SIMH QUIET Do not print warning messages - SET SIMH VERBOSE Print warning messages (useful for debugging) - - SET SIMH TIMERON Start periodic timer interrupts - SET SIMH TIMEROFF Stop the periodic timer interrupts - - The following variables determine the behavior of the timer: - - TIMD This is the delay between consecutive interrupts in milliseconds. - Use D TIMD 20 for a 50 Hz clock. - TIMH This is the address of the interrupt handler to call for a - timer interrupt. - - -2.4 The 88-DISK controller. - - The MITS 88-DISK is a simple programmed I/O interface to the MITS 8-inch -floppy drive, which was basically a Pertec FD-400 with a power supply and -buffer board builtin. The controller supports neither interrupts nor DMA, -so floppy access required the sustained attention of the CPU. The standard -I/O addresses were 8, 9, and 0A (hex), and we follow the standard. Details -on controlling this hardware are in the altair_dsk.c source file. - - The only difference is that the simulated disks may be larger than the -original ones: The original disk had 77 tracks while the simulated disks -support up to 254 tracks (only relevant for CP/M). You can change the -number of tracks per disk by setting the appropriate value in TRACKS[..]. -For example "D TRACKS[0] 77" sets the number of tracks for disk 0 to the -original number of 77. The command "D TRACKS[0-7] 77" changes the highest -track number for all disks to 77. - - For debugging purposes you can set the trace level of some disk I/O -functions. To do so the following bits in TRACE (a register of the disk) -have been defined with the following meaning: - - 1 Trace all IN and OUT instructions on the disk ports 8 and 9 - 2 Trace all read and writes to full sectors on the disk - 4 Print a message whenever an unnecessary step-in or step out of the - disk head occurs (often an indication of an infinite loop) - 8 Print a message whenever the disk head appears to be waiting for a - sector which does not show up (often an indication of an infinite - loop) - -For example the command "D TRACE 10" will trace options 2+8 from above. - - The DSK device can be configured with - - SET DSK QUIET Do not print warning messages for disk - SET DSK VERBOSE Print warning messages for disk - (useful for debugging) - The register DSKWL determines how often the - same warning is displayed. The default is 3. - - SET DSK WRITEENABLED Allow write operations for disk - SET DSK LOCKED Disk is locked, i.e. no write operations - will be allowed. - - -2.5 The simulated hard disk - - In order to increase the available storage capacity, the simulator -features 8 simulated hard disks with a capacity of 8MB (HDSK0 to HDSK7). -Currently only CP/M supports two hard disks as devices I: and J:. - - For debugging purposes one can set the trace flag by executing the -command "D HDTRACE 1". The default for "HDTRACE" is 0 (no trace). - - The HDSK device can be configured with - - SET HDSK QUIET Do not print warning messages for hard disk - SET HDSK VERBOSE Print warning messages for hard disk - (useful for debugging) - - SET HDSK WRITEENABLED Allow write operations for hard disk - SET HDSK LOCKED Hard disk is locked, i.e. no - write operations will be allowed. - - -3. Sample Software - - Running an Altair in 1977 you would be running either MITS Disk Extended -BASIC, or the brand new and sexy CP/M Operating System from Digital -Research. Or possibly, you ordered Altair DOS back when it was promised in -1975, and are still waiting for it to be delivered in early 1977. - - We have samples of all three for you to check out. We can't go into the -details of how they work, but we'll give you a few hints. - - -3.1 CP/M Version 2.2 - - This version is my own port of the standard CP/M to the Altair. There -were some "official" versions but I don't have them. None were endorsed or -sold by MITS to my knowledge, however. - - To boot CP/M: - - sim> attach dsk cpm2.dsk - sim> boot dsk - - CP/M feels like DOS, sort of. DIR will work. I have included all the -standard CP/M utilities, plus a few common public-domain ones. I also -include the sources to the customized BIOS and some other small programs. -TYPE will print an ASCII file. DUMP will dump a binary one. LS is a -better DIR than DIR. ASM will assemble .ASM files to Hex, LOAD will "load" -them to binary format (.COM). ED is a simple editor, #A command will bring -the source file to the buffer, T command will "type" lines, L will move -lines, E exits the editor. 20L20T will move down 20 lines, and type 20. -Very DECish. DDT is the debugger, DO is a batch-type command processor. A -sample batch file that will assemble and write out the bootable CP/M image -(on drive A) is "SYSCPM2.SUB". To run it, type "DO SYSCPM2". - - In order to efficiently transfer files into the CP/M environment use the -included program R . If you have a file named foo.ext in the -current directory (i.e. the directory where SIMH is), executing R FOO.EXT -under CP/M will transfer the file onto the CP/M disk. Transferring a file -from the CP/M environment to the SIMH environment is accomplished by -W for text files or by W B for binary files. -The simplest way for transferring multiple files is to create a ".SUB" -batch file which contains the necessary R resp. W commands. - - If you need more storage space you can use a simulated hard disk on -drives I: and J:. To use do "attach HDSK0 hdi.dsk" and issue the -"XFORMAT I:" resp. "XFORMAT J:" command from CP/M do initialize the disk -to an empty state. - -The disk "cpm2.dsk" contains the following files: -Name Ext Size Comment -ASM .COM 8K ; CP/M assembler -BDOS .MAC 68K ; Basic Disk Operating System assembler source code -BOOT .COM 1K ; transfer control to boot ROM -BOOT .MAC 2K ; source for BOOT.COM -BOOTGEN .COM 2K ; put a program on the boot sectors -CBIOSX .MAC 48K ; CP/M 2 BIOS source for Altair -CCP .MAC 26K ; Console Command Processor assembler source code -COPY .COM 2K ; copy disks -CPMBOOT .COM 12K ; CP/M operating system -CPU .COM 2K ; get and set the CPU type (8080 or Z80) -CPU .MAC 2K ; source for CPU.COM -CREF80 .COM 4K ; cross reference utility -DDT .COM 6K ; 8080 debugger -DDTZ .COM 10K ; Z80 debugger -DIF .COM 4K ; determine differences between two files -DO .COM 2K ; batch processing -DSKBOOT .MAC 8K ; source for boot ROM -DUMP .COM 2K ; hex dump a file -ED .COM 8K ; line editor -ELIZA .BAS 10K ; Eliza game in Basic -EX8080 .COM 12K ; exercise 8080 instruction set -EXZ80N .COM 12K ; exercise Z80 instruction set, No undefined status bits -EXZ80U .COM 12K ; exercise Z80 instruction set, Undefined status bits -EXZ80 .MAC 54K ; source for EX8080.COM, EXZ80N.COM, EXZ80U.COM -EX .SUB 2K ; benchmark execution of EX8080.COM, EXZ80N.COM, EXZ80U.COM -FORMAT .COM 2K ; format disks -GO .COM 0K ; start the currently loaded program at 100H -HDSKBOOT.MAC 6K ; boot code for hard disk -L80 .COM 12K ; Microsoft linker -LADDER .COM 40K ; game -LADDER .DAT 2K ; high score file for LADDER.COM -LIB80 .COM 6K ; library utility -LOAD .COM 2K ; load hex files -LS .COM 4K ; directory utility -LU .COM 20K ; library utility -M80 .COM 20K ; Microsoft macro assembler -MBASIC .COM 24K ; Microsoft Basic interpreter -MC .SUB 2K ; assemble and link an assembler program -MCC .SUB 2K ; read, assemble and link an assembler program -MCCL .SUB 2K ; assemble, link and produce listing -MEMCFG .LIB 2K ; defines the memory configuration -MOVER .MAC 2K ; moves operating system in place -OTHELLO .COM 12K ; Othello (Reversi) game -PIP .COM 8K ; Peripheral Interchange Program -PRELIM .COM 2K ; preliminary CPU tests -PRELIM .MAC 6K ; source code for PRELIM.COM -R .COM 4K ; read files from SIMH environment -RSETSIMH.COM 2K ; reset SIMH interface -RSETSIMH.MAC 2K ; assembler source for RSETSIMH.COM -SHOWSEC .COM 3K ; show sectors on a disk -SID .COM 8K ; debugger for 8080 -SPEED .COM 2K ; utility to measure the clock speed of the simulated CPU -STAT .COM 6K ; provide information about currently logged disks -SURVEY .COM 2K ; system survey -SURVEY .MAC 16K ; assembler source for SURVEY.COM -SYSCOPY .COM 2K ; copy system tracks between disks -SYSCPM2 .SUB 2K ; create CP/M 2 on drive A: -TIMER .COM 2K ; perform various timer operations -TIMER .MAC 2K ; source code for TIMER.COM -UNCR .COM 8K ; un-crunch utility -UNERA .COM 2K ; un-erase a file -UNERA .MAC 16K ; source for UNERA.COM -USQ .COM 2K ; un-squeeze utility -W .COM 4K ; write files to SIMH environment -WM .COM 12K ; word master screen editor -WM .HLP 3K ; help file for WM.COM -WORM .COM 4K ; worm game for VT100 terminal -XFORMAT .COM 2K ; initialise a drive (floppy or hard disk) -XSUB .COM 2K ; support for DO.COM -ZAP .COM 10K ; SuperZap 5.2 disk editor configured for VT100 -ZSID .COM 10K ; debugger for Z80 -ZTRAN4 .COM 4K ; translate 8080 mnemonics into Z80 equivalents - - -3.2 CP/M Version 3 with banked memory - - CP/M 3 is the successor to CP/M 2.2. A customised BIOS (BIOS3.MAC) is -included to facilitate modification if so desired. The defaults supplied in -GENCPM.DAT for system generation can be used. BOOTGEN.COM is used to place -the CP/M loader (LDR.COM) on the boot tracks of a disk. - - Running CP/M 3 with banked memory: - sim> attach dsk cpm3.dsk - sim> reset cpu - sim> set cpu banked - sim> set cpu itrap - sim> boot dsk - - Executing "DO SYSCPM3" will re-generate the banked version of CP/M 3. You -can boot CP/M 3 with or without a Z80 CPU. The Z80 CPU is needed for both -sysgens due to the use of BOOTGEN.COM which requires it. - -The disk "cpm3.dsk" contains the following files: -ASM .COM 8K ; CP/M assembler -ASSIGN .SYS 2K -BDOS3 .SPR 10K -BIOS3 .MAC 28K ; CP/M 3 BIOS source for Altair SIMH -BIOS3 .SPR 4K -BNKBDOS3.SPR 14K -BNKBIOS3.SPR 4K -BOOT .COM 2K ; transfer control to boot ROM -BOOTGEN .COM 2K ; put a program on the boot sectors -CCP .COM 4K -COPYSYS .COM 2K -CPM3 .SYS 18K -CPMLDR .MAC 38K ; CP/M 3 loader assembler source -DATE .COM 4K ; date utility -DDT .COM 6K ; 8080 debugger -DDTZ .COM 10K ; Z80 debugger -DEFS .LIB 2K ; include file for BIOS3.MAC to create banked CP/M 3 -DEVICE .COM 8K -DIF .COM 4K ; determine differences between two files -DIR .COM 16K ; directory utility -DO .COM 6K ; batch processing -DUMP .COM 2K -ED .COM 10K -ERASE .COM 4K -GENCOM .COM 16K -GENCPM .COM 22K -GENCPM .DAT 4K ; CP/M generation information for banked version -GENCPMNB.DAT 4K ; CP/M generation information for non-banked version -GET .COM 8K -HELP .COM 8K ; help utility -HELP .HLP 62K ; help files -HEXCOM .CPM 2K -HIST .UTL 2K -INITDIR .COM 32K -L80 .COM 12K ; Microsoft linker -LDR .COM 4K ; CP/M loader with optimised loader BIOS -LDRBIOS3.MAC 14K ; optimised (for space) loader BIOS -LIB .COM 8K ; Digital Research librarian -LINK .COM 16K ; Digital Research linker -LOAD .COM 2K -M80 .COM 20K ; Microsoft macro assembler -MC .SUB 2K ; assemble and link an assmbler program -MCC .SUB 2K ; read, assemble and link an assembler program -PATCH .COM 4K -PIP .COM 10K ; Peripheral Interchange Program -PROFILE .SUB 2K ; commands to be executed at start up -PUT .COM 8K -R .COM 4K ; read files from SIMH environment -RENAME .COM 4K -RESBDOS3.SPR 2K -RMAC .COM 14K ; Digital Research macro assembler -RSETSIMH.COM 2K ; reset SIMH interface -SAVE .COM 2K -SCB .MAC 2K -SET .COM 12K -SETDEF .COM 6K -SHOW .COM 10K -SHOWSEC .COM 4K ; show sectors on a disk -SID .COM 8K ; 8080 debugger -SYSCOPY .COM 2K ; copy system tracks between disks -SYSCPM3 .SUB 2K ; create banked CP/M 3 system -TRACE .UTL 2K -TSHOW .COM 2K ; show split time -TSTART .COM 2K ; create timer and start it -TSTOP .COM 2K ; show final time and stop timer -TYPE .COM 4K -UNERA .COM 2K ; un-erase a file -W .COM 4K ; write files to SIMH environment -XREF .COM 16K ; cross reference utility -ZSID .COM 10K ; Z80 debugger - - -3.3 MP/M II with banked memory - - MP/M II is an acronym for MultiProgramming Monitor Control Program for -Microprocessors. It is a multiuser operating system for an eight bit -microcomputer. MP/M II supports multiprogramming at each terminal. This -version supports four terminals available via Telnet. To boot: - - sim> attach dsk mpm.dsk - sim> set cpu itrap - sim> set cpu z80 - sim> set cpu rom - sim> set cpu banked - sim> attach sio 23 - sim> d common b000 - sim> boot dsk - - Now connect a Telnet session to the simulator and type "MPM" at the "A>" -prompt. Now you can connect up to three additional terminals via Telnet to -the Altair running MP/M II. To re-generate the system perform "DO SYSMPM" -in the CP/M environment (not possible under MP/M since XSUB is needed). - -The disk "mpm.dsk" contains the following files: -Name Ext Size Comment -ABORT .PRL 2K ; abort a process -ABORT .RSP 2K -ASM .PRL 10K ; MP/M assembler -BNKBDOS .SPR 12K ; banked BDOS -BNKXDOS .SPR 2K ; banked XDOS -BNKXIOS .SPR 4K ; banked XIOS -BOOTGEN .COM 2K ; copy an executable to the boot section -CONSOLE .PRL 2K ; print console number -CPM .COM 2K ; return to CP/M -CPM .MAC 2K ; source for CPM.COM -DDT .COM 6K ; MP/M DDT -DDT2 .COM 6K ; CP/M DDT -DDTZ .COM 10K ; CP/M DDT with Z80 support -DIF .COM 4K ; difference between two files -DIR .PRL 2K ; directory command -DO .COM 2K ; CP/M submit -DSKRESET.PRL 2K ; disk reset command -DUMP .MAC 6K ; source for DUMP.PRL -DUMP .PRL 2K ; dump command -ED .PRL 10K ; MP/M line editor -ERA .PRL 2K ; erase command -ERAQ .PRL 4K ; erase comand (verbose) -GENHEX .COM 2K -GENMOD .COM 2K -GENSYS .COM 10K -L80 .COM 12K ; Microsoft linker -LDRBIOS .MAC 14K ; loader BIOS -LIB .COM 8K ; library utility -LINK .COM 16K ; linker -LOAD .COM 2K ; loader -M80 .COM 20K ; Microsoft macro assembler -MC .SUB 2K ; assemble and link an assmbler program -MCC .SUB 2K ; read, assemble and link an assembler program -MPM .COM 8K ; start MP/M II -MPM .SYS 26K ; MP/M system file -MPMD .LIB 2K ; define a banked system -MPMLDR .COM 6K ; MP/M loader without LDRBIOS -MPMSTAT .BRS 6K ; status of MP/M system -MPMSTAT .PRL 6K -MPMSTAT .RSP 2K -MPMXIOS .MAC 26K ; XIOS for MP/M -PIP .PRL 10K ; MP/M peripheral interchange program -PIP2 .COM 8K ; CP/M peripheral interchange program -PRINTER .PRL 2K -PRLCOM .PRL 4K -R .COM 4K ; read a file from the SIMH environment -RDT .PRL 8K ; debugger for page relocatable programs -REN .PRL 4K ; rename a file -RESBDOS .SPR 4K ; non-banked BDOS -RMAC .COM 14K ; Digital Research macro assembler -RSETSIMH.COM 2K ; reset SIMH interface -SCHED .BRS 2K ; schedule a job -SCHED .PRL 4K -SCHED .RSP 2K -SDIR .PRL 18K ; fancy directory command -SET .PRL 8K ; set parameters -SHOW .PRL 8K ; show status of disks -SPOOL .BRS 4K ; spool utility -SPOOL .PRL 4K -SPOOL .RSP 2K -STAT .COM 6K ; CP/M stat command -STAT .PRL 10K ; MP/M stat command -STOPSPLR.PRL 2K ; stop spooler -SUBMIT .PRL 6K ; MP/M submit -SYSCOPY .COM 2K ; copy system tracks -SYSMPM .SUB 2K ; do a system generation -SYSTEM .DAT 2K ; default values for system generation -TMP .SPR 2K -TOD .PRL 4K ; time of day -TSHOW .COM 2K ; show split time -TSTART .COM 2K ; create timer and start it -TSTOP .COM 2K ; show final time and stop timer -TYPE .PRL 2K ; type a file on the screen -USER .PRL 2K ; set user area -W .COM 4K ; write a file to SIMH environment -XDOS .SPR 10K ; XDOS -XREF .COM 16K ; cross reference utility -XSUB .COM 2K ; for CP/M DO - - -3.4 CP/M application software - - There is also a small collection of sample application software -containing the following items: - -- SPL: a Small Programming Language with a suite of sample programs -- PROLOGZ: a Prolog interpreter written in SPL with sources -- PASCFORM: a Pascal pretty printer written in Pascal -- Pascal MT+: Pascal language system needed to compile PASCFORM - -The sample software comes on "app.dsk" and to use it do - - sim> attach dsk1 app.dsk - -before booting CP/M. - -The disk "app.dsk" contains the following files: -Name Ext Size Comment -BOOTGEN .COM 2K -BOOTGEN .SPL 6K ; SPL source for BOOTGEN.COM -C .SUB 2K ; batch file for compiling an SPL source file -CALC .PRO 4K ; Prolog demo program: Calculator -CC .SUB 2K ; compile an SPL source which is on the underlying - file system -DECLARAT. 12K ; common include file, SPL source -DIF .COM 4K -DIF .SPL 10K ; SPL source for DIF.COM -EDIT .SPL 10K ; screen editor for PROLOGZ, SPL source -FAMILY .PRO 4K ; Prolog demo program: Family relations -INTEGER .PRO 2K ; Prolog demo program: Integer arithmetic -KNAKE .PRO 2K ; Prolog demo program: Logic puzzle -LINKMT .COM 12K ; Pascal MT+ 5.5 linker -MAIN .SPL 14K ; main module for PROLOGZ, SPL source -MOVE .MAC 4K ; helper functions for PROLOGZ in assembler -MTERRS .TXT 6K ; Pascal MT+ error messages -MTPLUS .000 14K ; Pascal MT+ 5.5 compiler file -MTPLUS .001 12K ; Pascal MT+ 5.5 compiler file -MTPLUS .002 8K ; Pascal MT+ 5.5 compiler file -MTPLUS .003 8K ; Pascal MT+ 5.5 compiler file -MTPLUS .004 18K ; Pascal MT+ 5.5 compiler file -MTPLUS .005 8K ; Pascal MT+ 5.5 compiler file -MTPLUS .006 6K ; Pascal MT+ 5.5 compiler file -MTPLUS .COM 36K ; Pascal MT+ 5.5 compiler -PASCFORM.COM 36K ; Pascal formatter -PASCFORM.PAS 54K ; Pascal formatter source code -PASCFORM.SUB 2K ; create Pascal formatter -PASLIB .ERL 24K ; Pascal MT+ 5.5 run time library -PINST .COM 4K ; terminal installation program for PROLOGZ -PINST .SPL 16K ; terminal installation program for PROLOGZ, - SPL source -PROLOGZ .COM 18K ; PROLOGZ interpreter and screen editor -PROLOGZ .SPL 2K ; PROLOGZ main program, SPL source -PROLOGZ .TXT 40K ; PROLOGZ documentation in German -PROVE .SPL 16K ; backtrack theorem prover for PROLOGZ, SPL source -PZCLEAN .SUB 2K ; PROLOGZ: remove all created ".rel" and ".lst" files -PZLINK .SUB 2K ; PROLOGZ: create PINST, PROLOGZ and personalise the - serial number -PZMAKE .SUB 2K ; PROLOGZ: compiles the sources (you can ignore - any compiler errors) -QUEEN .PRO 2K ; Prolog demo program: N-queens problem -READ .COM 4K -READ .SPL 10K ; SPL source for R.COM -SHOWSEC .COM 4K -SHOWSEC .SPL 6K ; SPL source for SHOWSEC.COM -SPEED .COM 2K ; utility to measure the clock speed of the simulated CPU -SPEED .SPL 2K ; SPL source for SPEED.COM, requires SWLIB.MAC -SPL .COM 38K ; the SPL compiler itself -SPL .TXT 56K ; SPL language and compiler documentation in German -SPLERROR.DAT 12K ; error messages of the compiler (in German) -SPLIB .REL 6K ; SPL runtime library -STDIO . 2K ; include file for SPL programs -SWLIB .MAC 2K ; assembler utility routines needed by SPEED.SPL -SYSCOPY .COM 2K -SYSCOPY .SPL 6K ; SPL source for SYSCOPY.COM -TERMBDOS.SPL 2K ; terminal interface to CP/M for PROLOGZ, SPL source -UTIL .SPL 18K ; utility functions for PROLOGZ, SPL source -WRITE .COM 4K -WRITE .SPL 8K ; SPL source for W.COM -XFORMAT .COM 2K -XFORMAT .SPL 6K ; SPL source for XFORMAT.COM - - -3.5 MITS Disk Extended BASIC Version 4.1 - - This was the commonly used software for serious users of the Altair -computer. It is a powerful (but slow) BASIC with some extended commands to -allow it to access and manage the disk. There was no operating system it -ran under. To boot: - - sim> set cpu 8080 ;Z80 will not work - sim> attach dsk mbasic.dsk - sim> set sio upper - sim> go ff00 - - MEMORY SIZE? [return] - LINEPRINTER? [C return] - HIGHEST DISK NUMBER? [0 return] (0 here = 1 drive system) - NUMBER OF FILES? [3 return] - NUMBER OF RANDOM FILES? [2 return] - - 44041 BYTES FREE - ALTAIR BASIC REV. 4.1 - [DISK EXTENDED VERSION] - COPYRIGHT 1977 BY MITS INC. - OK - [MOUNT 0] - OK - [FILES] - - -3.6 Altair DOS Version 1.0 - - This was long promised but not delivered until it was almost irrelevant. -A short attempted tour will reveal it to be a dog, far inferior to CP/M. To -boot: - - sim> d tracks[0-7] 77 ;set to Altair settings - sim> set cpu altairrom - sim> attach dsk altdos.dsk - sim> set sio upper - sim> go ff00 - - MEMORY SIZE? [return] - INTERRUPTS? N [return] - HIGHEST DISK NUMBER? [0 return] (3 here = 4 drive system) - HOW MANY DISK FILES? [3 return] - HOW MANY RANDOM FILES? [2 return] - - 056449 BYTES AVAILABLE - DOS MONITOR VER 1.0 - COPYRIGHT 1977 BY MITS INC - .[MNT 0] - - .[DIR 0] - - -3.7 Altair Basic 3.2 (4k) - - In order to run the famous 4k Basic, use the following commands (the -trick is to get the Switch Register right). - - sim> set cpu 8080 ;note 4k Basic will not run on a Z80 CPU - sim> set sio upper ;4k Basic does not like lower case letters as input - sim> set sio ansi ;4k Basic produces 8-bit output, strip to seven bits - sim> d sr 8 ;good setting for the Switch Register - sim> load 4kbas.bin 0 ;load it at 0 - sim> go 0 ;and start it - MEMORY SIZE? [return] - TERMINAL WIDTH? [return] - WANT SIN? [Y] - - 61911 BYTES FREE - - BASIC VERSION 3.2 - [4K VERSION] - - OK - - -3.8 Altair 8k Basic - Running 8k Basic follows the procedure for 4k Basic. - - sim> set cpu 8080 ;note 8k Basic will not run on a Z80 CPU - sim> set sio upper ;8k Basic does not like lower case letters as input - sim> set sio ansi ;8k Basic produces 8-bit output, strip to seven bits - sim> d sr 8 ;good setting for the Switch Register - sim> load 8kbas.bin 0 ;load it at 0 - sim> go 0 ;and start it - MEMORY SIZE? [A] - - WRITTEN FOR ROYALTIES BY MICRO-SOFT - - MEMORY SIZE? [return] - TERMINAL WIDTH? [return] - WANT SIN-COS-TAN-ATN? [Y] - - 58756 BYTES FREE - ALTAIR BASIC REV. 4.0 - [EIGHT-K VERSION] - COPYRIGHT 1976 BY MITS INC. - OK - - -3.9 Altair Basic 4.0 - - Execute the following commands to run Altair Extended Basic: - - sim> set sio upper ;Extended Basic does not like lower case letters as input - sim> set sio ansi ;Extended Basic produces 8-bit output, strip to seven bits - sim> d sr 8 ;good setting for the Switch Register - sim> load exbas.bin 0 ;load it at 0 - sim> go 0 ;and start it - 16384 Bytes loaded at 0. - - MEMORY SIZE? [return] - WANT SIN-COS-TAN-ATN? [Y] - - 50606 BYTES FREE - ALTAIR BASIC REV. 4.0 - [EXTENDED VERSION] - COPYRIGHT 1977 BY MITS INC. - OK - - -3.10 Altair Disk Extended Basic Version 300-5-C - - This version of Basic was provided by Scott LaBombard. To execute use the -following commands: - - sim> d tracks[0-7] 77 ;set to Altair settings - sim> at dsk extbas5.dsk - sim> g 0 - - MEMORY SIZE? [return] - LINEPRINTER? [C] - HIGHEST DISK NUMBER? [0] - HOW MANY FILES? [3] - HOW MANY RANDOM FILES? [3] - - 42082 BYTES FREE - - ALTAIR DISK EXTENDED BASIC - VERSION 300-5-C [01NOV78] - COPYRIGHT 1978 BY MITS INC. - - OK - - -4. Special simulator features - - -4.1 Memory access breakpoints - - In addition to the regular SIMH features such as PC queue, breakpoints -etc., this simulator supports memory access breakpoints. A memory access -breakpoint is triggered when a pre-defined memory location is accessed -(read, write or update). To set a memory location breakpoint enter - -sim> break -m - - Execution will stop whenever an operation accesses . Note that -a memory access breakpoint is not triggered by fetching code from memory -(this is the job of regular breakpoints). This feature has been implemented -by using the typing facility of the SIMH breakpoints. - - -4.2 T-state stepping - - The SIMH step command supports the "-t" modifier to allow steppping for -a predefined number of t-states. For example - -sim> step -t 1000 - -will cause the simulated CPU to execute 1000 t-states (note that the shortest -instruction will have 4 t-states). On the other hand, the command - -sim> step 1000 - -will cause the simulated CPU to execute 1000 instructions. - - -5. Brief summary of all major changes to the original Altair simulator -- Full support for Z80. CP/M software requiring a Z80 CPU now runs - properly. DDTZ and PROLOGZ are included for demonstration purposes. -- Added banked memory support. -- PC queue implemented. -- Full assembler and dis-assembler support for Z80 and 8080 mnemonics. - Depending on the current setting of the CPU, the appropriate mnemonics - are used. -- The BOOT ROM was changed to fully load the software from disk. The - original code basically loaded a copy of itself from the disk and - executed it. -- ROM and memory size settings are now fully honored. This means that you - cannot write into the ROM or outside the defined RAM (e.g. when the RAM size - was truncated with the SET CPU commands). This feature allows programs which - check for the size of available RAM to run properly (e.g. 4k Basic). In - addition one can enable and disable the ROM which is useful in special cases - (e.g. when testing a new version of the ROM). -- The console can also be used via Telnet. This is useful when a terminal is - needed which supports cursor control such as a VT100. PROLOGZ for example - has a built-in screen editor which works under Telnet. -- Simplified file exchange for CP/M. Using the READ program under CP/M one - can easily import files into CP/M from the regular file system. Note that PIP - does not work properly on non-text files on PTR. -- The WRITE program can be used to transfer files from the CP/M environment to - the regular environment (binary or ASCII transfer). -- The last character read from PTR is always Control-Z (the EOF character for - CP/M). This makes sure that PIP (Peripheral Interchange Program on CP/M) will - terminate properly. -- Fixed a bug in the BIOS warm boot routine which caused CP/M to crash. -- Modified the BIOS for CP/M to support 8 disks. -- Added CP/M 3 banked version as sample software -- Changed from octal to hex -- Made the DSK and SIO device more robust (previously malicious code could - crash the simulator) -- Added memory access break points -- Added periodic timer interrupts (useful for MP/M) -- Added additional consoles (useful for MP/M) -- Added MP/M II banked version as sample software diff --git a/AltairZ80/altairZ80_cpu.c b/AltairZ80/altairZ80_cpu.c index b62e9133..559e7741 100644 --- a/AltairZ80/altairZ80_cpu.c +++ b/AltairZ80/altairZ80_cpu.c @@ -90,17 +90,36 @@ static uint16 IFF; #define SetPV2(x) ((cpu_unit.flags & UNIT_CHIP) ? (((temp == (x)) << 2)) : (parity(temp))) /* checkCPU8080 must be invoked whenever a Z80 only instruction is executed */ +/* #define checkCPU8080 \ if (((cpu_unit.flags & UNIT_CHIP) == 0) && (cpu_unit.flags & UNIT_OPSTOP)) {\ reason = STOP_OPCODE; \ goto end_decode; \ } +*/ + +/* checkCPU8080 must be invoked whenever a Z80 only instruction is executed + In case a Z80 instruction is executed on an 8080 the following two cases exist: + 1) Trapping is enabled: execution stops + 2) Trapping is not enabled: decoding continues with the next byte +*/ +#define checkCPU8080 \ + if ((cpu_unit.flags & UNIT_CHIP) == 0) { \ + if (cpu_unit.flags & UNIT_OPSTOP) { \ + reason = STOP_OPCODE; \ + goto end_decode; \ + } \ + else { \ + sim_brk_pend = FALSE; \ + continue; \ + } \ + } /* checkCPUZ80 must be invoked whenever a non Z80 instruction is executed */ -#define checkCPUZ80 \ - if (cpu_unit.flags & UNIT_OPSTOP) { \ - reason = STOP_OPCODE; \ - goto end_decode; \ +#define checkCPUZ80 \ + if (cpu_unit.flags & UNIT_OPSTOP) { \ + reason = STOP_OPCODE; \ + goto end_decode; \ } #define POP(x) { \ diff --git a/AltairZ80/altairZ80_sio.c b/AltairZ80/altairZ80_sio.c index fb041050..ed85ba79 100644 --- a/AltairZ80/altairZ80_sio.c +++ b/AltairZ80/altairZ80_sio.c @@ -64,6 +64,8 @@ #define UNIT_BS (1 << UNIT_V_BS) #define UNIT_V_SIO_VERBOSE (UNIT_V_UF + 3) /* verbose mode, i.e. show error messages */ #define UNIT_SIO_VERBOSE (1 << UNIT_V_SIO_VERBOSE) +#define UNIT_V_MAP (UNIT_V_UF + 4) /* mapping mode on */ +#define UNIT_MAP (1 << UNIT_V_MAP) #define UNIT_V_SIMH_VERBOSE (UNIT_V_UF + 0) /* verbose mode for SIMH pseudo device */ #define UNIT_SIMH_VERBOSE (1 << UNIT_V_SIMH_VERBOSE) @@ -187,7 +189,7 @@ static SIO_TERMINAL sio_terminals[Terminals] = static TMLN TerminalLines[Terminals] = { {0} }; /* four terminals */ static TMXR altairTMXR = {Terminals, 0, 0, TerminalLines}; /* mux descriptor */ -static UNIT sio_unit = { UDATA (&sio_svc, UNIT_ATTABLE, 0), KBD_POLL_WAIT }; +static UNIT sio_unit = { UDATA (&sio_svc, UNIT_ATTABLE + UNIT_MAP, 0), KBD_POLL_WAIT }; static REG sio_reg[] = { { HRDATA (DATA0, sio_terminals[0].data, 8) }, @@ -215,6 +217,8 @@ static MTAB sio_mod[] = { { UNIT_SIO_VERBOSE, 0, "QUIET", "QUIET", NULL }, /* quiet, no error messages */ { UNIT_SIO_VERBOSE, UNIT_SIO_VERBOSE, "VERBOSE", "VERBOSE", &sio_set_verbose }, /* verbose, display warning messages */ + { UNIT_MAP, 0, "NOMAP", "NOMAP", NULL }, /* disable character mapping */ + { UNIT_MAP, UNIT_MAP, "MAP", "MAP", NULL }, /* enable all character mapping */ { 0 } }; DEVICE sio_dev = { @@ -491,17 +495,20 @@ int32 sio0d(const int32 port, const int32 io, const int32 data) { sio_terminals[ti].data = tmxr_getc_ln(&TerminalLines[ti]) & 0xff; } sio_terminals[ti].status &= 0xfe; - if (sio_unit.flags & UNIT_BS) { - if (sio_terminals[ti].data == BACKSPACE_CHAR) { - sio_terminals[ti].data = DELETE_CHAR; + if (sio_unit.flags & UNIT_MAP) { + if (sio_unit.flags & UNIT_BS) { + if (sio_terminals[ti].data == BACKSPACE_CHAR) { + sio_terminals[ti].data = DELETE_CHAR; + } + } + else { + if (sio_terminals[ti].data == DELETE_CHAR) { + sio_terminals[ti].data = BACKSPACE_CHAR; + } } } - else { - if (sio_terminals[ti].data == DELETE_CHAR) { - sio_terminals[ti].data = BACKSPACE_CHAR; - } - } - return (sio_unit.flags & UNIT_UPPER) ? toupper(sio_terminals[ti].data) : sio_terminals[ti].data; + return ((sio_unit.flags & UNIT_UPPER) && (sio_unit.flags & UNIT_MAP)) ? + toupper(sio_terminals[ti].data) : sio_terminals[ti].data; } else { /* OUT */ int32 d = sio_unit.flags & UNIT_ANSI ? data & 0x7f : data; diff --git a/AltairZ80/altairz80_doc.txt b/AltairZ80/altairz80_doc.txt index 388cdaa2..22530825 100644 --- a/AltairZ80/altairz80_doc.txt +++ b/AltairZ80/altairz80_doc.txt @@ -1,7 +1,7 @@ To: Users From: Peter Schorn Subj: AltairZ80 Simulator Usage -Date: 15-Feb-2004 +Date: 12-Apr-2004 COPYRIGHT NOTICE @@ -61,6 +61,7 @@ sim/AltairZ80/altairz80_defs.h 2. Revision History +- 12-Apr-2004, Peter Schorn (added MAP/NOMAP capability to switch off key mapping) - 26-Jan-2004, Peter Schorn (added support for t-state stepping) - 25-Feb-2003, Peter Schorn (added support for real time simulation) - 9-Oct-2002, Peter Schorn (added support for simulated hard disk) @@ -132,7 +133,9 @@ the MITS Disk Basic and Altair DOS require about a minimum of 24K. SET CPU ITRAP Causes the simulator to halt if an invalid opcode is detected (depending on the chosen CPU). SET CPU NOITRAP Does not stop on an invalid Opcode. This is - how the real 8080 works. + how the real 8080 works. Note that some software such as 4K Basic + apparently tries to execute nonexistent 8080 instructions. Therefore + it is advisable in this case to SET CPU NOITRAP. SET CPU 4K SET CPU 8K @@ -248,18 +251,29 @@ a simple stream of 8-bit bytes. SET SIO TTY Bit 8 is set to zero on console output SET SIO ANSI Bit 8 is not touched on console output - SET SIO ALL Console input support lower- and upper case + SET SIO ALL Console input remain unchanged SET SIO UPPER Console input is transformed to upper case characters only (This feature is useful for most Altair software) + SET SIO MAP must also have been executed for this + option to take effect - otherwise no mapping occurs. SET SIO BS Map the delete character to backspace + SET SIO MAP must also have been executed for this + option to take effect - otherwise no mapping occurs. SET SIO DEL Map the backspace character to delete + SET SIO MAP must also have been executed for this + option to take effect - otherwise no mapping occurs. SET SIO QUIET Do not print warning messages SET SIO VERBOSE Print warning messages (useful for debugging) The register SIOWL determines how often the same warning is displayed. The default is 3. + SET SIO MAP Enable mapping of characters + (see also SET SIO ALL/UPPER/BS/DEL) + SET SIO NOMAP Disable mapping of characters + (see also SET SIO ALL/UPPER/BS/DEL) + You can also attach the SIO to a port: ATTACH SIO 23 Console IO goes via a Telnet connection on port 23 @@ -382,7 +396,7 @@ TYPE will print an ASCII file. DUMP will dump a binary one. LS is a better DIR than DIR. ASM will assemble .ASM files to Hex, LOAD will "load" them to binary format (.COM). ED is a simple editor, #A command will bring the source file to the buffer, T command will "type" lines, L will move -lines, E exits the editor. 20L20T will move down 20 lines, and type 20. +lines, E exits the editor. 20L20T will move down 20 lines, and type 20. Very DECish. DDT is the debugger, DO is a batch-type command processor. A sample batch file that will assemble and write out the bootable CP/M image (on drive A) is "SYSCPM2.SUB". To run it, type "DO SYSCPM2". @@ -814,6 +828,7 @@ trick is to get the Switch Register right). sim> set cpu 8080 ;note 4k Basic will not run on a Z80 CPU sim> set sio upper ;4k Basic does not like lower case letters as input + sim> set cpu noitrap ;4k Basic likes to execute non 8080 instructions - ignore sim> set sio ansi ;4k Basic produces 8-bit output, strip to seven bits sim> d sr 8 ;good setting for the Switch Register sim> load 4kbas.bin 0 ;load it at 0 diff --git a/H316/h316_cpu.c b/H316/h316_cpu.c index 2a03a039..46b300c8 100644 --- a/H316/h316_cpu.c +++ b/H316/h316_cpu.c @@ -25,6 +25,7 @@ cpu H316/H516 CPU + 06-Nov-04 RMS Added =n to SHOW HISTORY 04-Jan-04 RMS Removed unnecessary compare 31-Dec-03 RMS Fixed bug in cpu_set_hist 24-Oct-03 RMS Added DMA/DMC support, instruction history @@ -338,7 +339,7 @@ MTAB cpu_mod[] = { &cpu_set_nchan, &cpu_show_nchan, NULL }, { UNIT_DMC, 0, "no DMC", "NODMC", NULL }, { UNIT_DMC, UNIT_DMC, "DMC", "DMC", NULL }, - { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "HISTORY", "HISTORY", + { MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_SHP, 0, "HISTORY", "HISTORY", &cpu_set_hist, &cpu_show_hist }, { MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "DMA1", NULL, NULL, &cpu_show_dma, NULL }, @@ -1369,8 +1370,10 @@ return SCPE_OK; t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc) { -int32 cr, k, di, op; +int32 cr, k, di, op, lnt; +char *cptr = (char *) desc; t_value sim_eval; +t_stat r; struct InstHistory *h; extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val, UNIT *uptr, int32 sw); @@ -1378,9 +1381,14 @@ static uint8 has_opnd[16] = { 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 1, 1, 1 }; if (hst_lnt == 0) return SCPE_NOFNC; /* enabled? */ +if (cptr) { + lnt = (int32) get_uint (cptr, 10, hst_lnt, &r); + if ((r != SCPE_OK) || (lnt == 0)) return SCPE_ARG; } +else lnt = hst_lnt; +di = hst_p - lnt; /* work forward */ +if (di < 0) di = di + hst_lnt; fprintf (st, "PC C A B X ea IR\n\n"); -di = hst_p; /* work forward */ -for (k = 0; k < hst_lnt; k++) { /* print specified */ +for (k = 0; k < lnt; k++) { /* print specified */ h = &hst[(++di) % hst_lnt]; /* entry pointer */ if (h->pc & HIST_PC) { /* instruction? */ cr = (h->pc & HIST_C)? 1: 0; /* carry */ diff --git a/H316/h316_doc.txt b/H316/h316_doc.txt index 6bf32676..798e3cd0 100644 --- a/H316/h316_doc.txt +++ b/H316/h316_doc.txt @@ -1,7 +1,7 @@ To: Users From: Bob Supnik Subj: H316 Simulator Usage -Date: 15-Feb-2004 +Date: 15-Nov-2004 COPYRIGHT NOTICE @@ -155,6 +155,17 @@ control registers for the interrupt system. most recent PC change first WRU 8 interrupt character +The CPU can maintain a history of the most recently executed instructions. +This is controlled by the SET CPU HISTORY and SHOW CPU HISTORY commands: + + SET CPU HISTORY clear history buffer + SET CPU HISTORY=0 disable history + SET CPU HISTORY=n enable history, length = n + SHOW CPU HISTORY print CPU history + SHOW CPU HISTORY=n print first n entries of CPU history + +The maximum length for the history is 65536 entries. + 2.2 Programmed I/O Devices 2.2.1 316/516-50 Paper Tape Reader (PTR) @@ -373,7 +384,7 @@ or write locked. SET MTn LOCKED set unit n write locked SET MTn WRITEENABLED set unit n write enabled -Units can be set ONLINE or OFFLINE, and WRITEENABLED or write LOCKED. +Units can also be set ENABLED or DISABLED. The magtape controller can be connected to the IO bus, a DMC channel, or a DMA channel: @@ -428,7 +439,7 @@ disk packs; a 4651, supporting 2 surface disk packs; or a 4720, supporting SET DP 4720 controller is 4720 The default is 4651. All disk packs on the controller must be of the -same type. Units can be set ONLINE or OFFLINE, and WRITEENABLED or +same type. Units can be set ENABLED or DISABLED, and WRITEENABLED or write LOCKED. The disk pack controller can be connected to a DMC channel or a DMA diff --git a/HP2100/hp2100_cpu.c b/HP2100/hp2100_cpu.c index 7695c152..61cd501f 100644 --- a/HP2100/hp2100_cpu.c +++ b/HP2100/hp2100_cpu.c @@ -23,6 +23,22 @@ be used in advertising or otherwise to promote the sale, use or other dealings in this Software without prior written authorization from Robert M Supnik. + CPU 2116A/2100A/21MXE central processing unit + MP 12892B memory protect + DMA0,DMA1 12895A/12897B direct memory access/dual channel port controller + + 25-Sep-04 JDB Moved MP into its own device; added MP option jumpers + Modified DMA to allow disabling + Modified SET CPU 2100/2116 to truncate memory > 32K + Added -F switch to SET CPU to force memory truncation + Fixed S-register behavior on 2116 + Fixed LIx/MIx behavior for DMA on 2116 and 2100 + Fixed LIx/MIx behavior for empty I/O card slots + Modified WRU to be REG_HRO + Added BRK and DEL to save console settings + Fixed use of "unsigned int16" in cpu_reset + Modified memory size routine to return SCPE_INCOMP if + memory size truncation declined 20-Jul-04 RMS Fixed bug in breakpoint test (reported by Dave Bryan) Back up PC on instruction errors (from Dave Bryan) 14-May-04 RMS Fixed bugs and added features from Dave Bryan @@ -68,6 +84,12 @@ 21-Nov-00 RMS Fixed bug in reset routine 15-Oct-00 RMS Added dynamic device number support + References: + - 21MX M-Series Computer, HP 2108B and HP 2112B, Operating and Reference Manual + (02108-90037, Apr-1979) + - HP 1000 M/E/F-Series Computers Engineering and Reference Documentation + (92851-90001, Mar-1981) + The register state for the HP 2116 CPU is: AR<15:0> A register - addressable as location 0 @@ -308,21 +330,27 @@ #define UNIT_V_21MX (UNIT_V_UF + 1) /* 21MX */ #define UNIT_V_EAU (UNIT_V_UF + 2) /* EAU */ #define UNIT_V_FP (UNIT_V_UF + 3) /* FP */ -#define UNIT_V_MPR (UNIT_V_UF + 4) /* mem prot */ -#define UNIT_V_DMS (UNIT_V_UF + 5) /* DMS */ -#define UNIT_V_IOP (UNIT_V_UF + 6) /* 2100 IOP */ -#define UNIT_V_IOPX (UNIT_V_UF + 7) /* 21MX IOP */ -#define UNIT_V_MSIZE (UNIT_V_UF + 8) /* dummy mask */ +#define UNIT_V_DMS (UNIT_V_UF + 4) /* DMS */ +#define UNIT_V_IOP (UNIT_V_UF + 5) /* 2100 IOP */ +#define UNIT_V_IOPX (UNIT_V_UF + 6) /* 21MX IOP */ +#define UNIT_V_MSIZE (UNIT_V_UF + 7) /* dummy mask */ +#define UNIT_2116 (0) #define UNIT_2100 (1 << UNIT_V_2100) #define UNIT_21MX (1 << UNIT_V_21MX) #define UNIT_EAU (1 << UNIT_V_EAU) #define UNIT_FP (1 << UNIT_V_FP) -#define UNIT_MPR (1 << UNIT_V_MPR) #define UNIT_DMS (1 << UNIT_V_DMS) #define UNIT_IOP (1 << UNIT_V_IOP) #define UNIT_IOPX (1 << UNIT_V_IOPX) #define UNIT_MSIZE (1 << UNIT_V_MSIZE) +#define UNIT_V_MP_JSB (UNIT_V_UF + 0) /* MP jumper W5 out */ +#define UNIT_V_MP_INT (UNIT_V_UF + 1) /* MP jumper W6 out */ +#define UNIT_V_MP_SEL1 (UNIT_V_UF + 2) /* MP jumper W7 out */ +#define UNIT_MP_JSB (1 << UNIT_V_MP_JSB) +#define UNIT_MP_INT (1 << UNIT_V_MP_INT) +#define UNIT_MP_SEL1 (1 << UNIT_V_MP_SEL1) + #define MOD_2116 1 #define MOD_2100 2 #define MOD_21MX 4 @@ -378,18 +406,23 @@ struct opt_table { /* options table */ int32 cpuf; }; static struct opt_table opt_val[] = { - { UNIT_EAU, MOD_2116 }, - { UNIT_FP, MOD_2100 }, - { UNIT_MPR, MOD_2100 | MOD_21MX }, - { UNIT_DMS, MOD_21MX }, - { UNIT_IOP, MOD_2100 | MOD_21MX }, + { UNIT_EAU, MOD_2116 }, + { UNIT_FP, MOD_2100 }, + { UNIT_DMS, MOD_21MX }, + { UNIT_IOP, MOD_2100 | MOD_21MX }, + { UNIT_2116, MOD_2116 | MOD_2100 | MOD_21MX }, + { UNIT_2100, MOD_2116 | MOD_2100 | MOD_21MX }, + { UNIT_21MX, MOD_2116 | MOD_2100 | MOD_21MX }, { 0, 0 } }; extern int32 sim_interval; extern int32 sim_int_char; +extern int32 sim_brk_char; +extern int32 sim_del_char; extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern FILE *sim_log; extern DEVICE *sim_devices[]; +extern int32 sim_switches; extern char halt_msg[]; t_stat Ea (uint32 IR, uint32 *addr, uint32 irq); @@ -421,6 +454,7 @@ t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_reset (DEVICE *dptr); t_stat cpu_boot (int32 unitno, DEVICE *dptr); +t_stat mp_reset (DEVICE *dptr); t_stat dma0_reset (DEVICE *dptr); t_stat dma1_reset (DEVICE *dptr); t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); @@ -458,13 +492,6 @@ REG cpu_reg[] = { { FLDATA (ION, ion, 0) }, { FLDATA (ION_DEFER, ion_defer, 0) }, { ORDATA (CIR, intaddr, 6) }, - { FLDATA (MPCTL, dev_ctl[PRO/32], INT_V (PRO)) }, - { FLDATA (MPFLG, dev_flg[PRO/32], INT_V (PRO)) }, - { FLDATA (MPFBF, dev_fbf[PRO/32], INT_V (PRO)) }, - { ORDATA (MPFR, mp_fence, 15) }, - { ORDATA (MPVR, mp_viol, 16) }, - { FLDATA (MPMEV, mp_mevff, 0) }, - { FLDATA (MPEVR, mp_evrff, 0) }, { FLDATA (DMSENB, dms_enb, 0) }, { FLDATA (DMSCUR, dms_ump, VA_N_PAG) }, { ORDATA (DMSSR, dms_sr, 16) }, @@ -476,7 +503,9 @@ REG cpu_reg[] = { { DRDATA (INDMAX, ind_max, 16), REG_NZ + PV_LEFT }, { BRDATA (PCQ, pcq, 8, 15, PCQ_SIZE), REG_RO+REG_CIRC }, { ORDATA (PCQP, pcq_p, 6), REG_HRO }, - { ORDATA (WRU, sim_int_char, 8) }, + { ORDATA (WRU, sim_int_char, 8), REG_HRO }, + { ORDATA (BRK, sim_brk_char, 8), REG_HRO }, + { ORDATA (DEL, sim_del_char, 8), REG_HRO }, { ORDATA (HCMD, dev_cmd[0], 32), REG_HRO }, { ORDATA (LCMD, dev_cmd[1], 32), REG_HRO }, { ORDATA (HCTL, dev_ctl[0], 32), REG_HRO }, @@ -490,15 +519,18 @@ REG cpu_reg[] = { { NULL } }; MTAB cpu_mod[] = { - { UNIT_2100+UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_MPR+UNIT_DMS+UNIT_IOP+UNIT_IOPX, - 0, NULL, "2116", NULL }, - { UNIT_2100+UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_MPR+UNIT_DMS+UNIT_IOP+UNIT_IOPX, - UNIT_2100+UNIT_EAU, NULL, "2100", NULL }, - { UNIT_2100+UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_MPR+UNIT_DMS+UNIT_IOP+UNIT_IOPX, - UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_MPR+UNIT_DMS, NULL, "21MX", NULL }, - { UNIT_2100+UNIT_21MX, 0, "2116", NULL, NULL }, - { UNIT_2100+UNIT_21MX, UNIT_2100, "2100", NULL, NULL }, - { UNIT_2100+UNIT_21MX, UNIT_21MX, "21MX", NULL, NULL }, + { UNIT_2116+UNIT_2100+UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_DMS+UNIT_IOP+UNIT_IOPX, + UNIT_2116, NULL, "2116", &cpu_set_opt, + NULL, (void *) UNIT_2116 }, + { UNIT_2116+UNIT_2100+UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_DMS+UNIT_IOP+UNIT_IOPX, + UNIT_2100+UNIT_EAU, NULL, "2100", &cpu_set_opt, + NULL, (void *) UNIT_2100 }, + { UNIT_2116+UNIT_2100+UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_DMS+UNIT_IOP+UNIT_IOPX, + UNIT_21MX+UNIT_EAU+UNIT_FP+UNIT_DMS, NULL, "21MX", &cpu_set_opt, + NULL, (void *) UNIT_21MX }, + { UNIT_2116+UNIT_2100+UNIT_21MX, UNIT_2116, "2116", NULL, NULL }, + { UNIT_2116+UNIT_2100+UNIT_21MX, UNIT_2100, "2100", NULL, NULL }, + { UNIT_2116+UNIT_2100+UNIT_21MX, UNIT_21MX, "21MX", NULL, NULL }, { UNIT_EAU, UNIT_EAU, "EAU", "EAU", &cpu_set_opt, NULL, (void *) UNIT_EAU }, { UNIT_EAU, 0, "no EAU", "NOEAU", &cpu_set_opt, @@ -507,10 +539,6 @@ MTAB cpu_mod[] = { NULL, (void *) UNIT_FP }, { UNIT_FP, 0, "no FP", "NOFP", &cpu_set_opt, NULL, (void *) UNIT_FP }, - { UNIT_MPR, UNIT_MPR, "MPR", "MPR", &cpu_set_opt, - NULL, (void *) UNIT_MPR }, - { UNIT_MPR, 0, "no MPR", "NOMPR", &cpu_set_opt, - NULL, (void *) UNIT_MPR }, { UNIT_DMS, UNIT_DMS, "DMS", "DMS", &cpu_set_opt, NULL, (void *) UNIT_DMS }, { UNIT_DMS, 0, "no DMS", "NODMS", &cpu_set_opt, @@ -538,6 +566,43 @@ DEVICE cpu_dev = { &cpu_ex, &cpu_dep, &cpu_reset, &cpu_boot, NULL, NULL }; +/* Memory protect data structures + + mp_dev MP device descriptor + mp_unit MP unit descriptor + mp_reg MP register list + mp_mod MP modifiers list +*/ + +UNIT mp_unit = { UDATA (NULL, UNIT_MP_SEL1, 0) }; + +REG mp_reg[] = { + { FLDATA (CTL, dev_ctl[PRO/32], INT_V (PRO)) }, + { FLDATA (FLG, dev_flg[PRO/32], INT_V (PRO)) }, + { FLDATA (FBF, dev_fbf[PRO/32], INT_V (PRO)) }, + { ORDATA (FR, mp_fence, 15) }, + { ORDATA (VR, mp_viol, 16) }, + { FLDATA (MEV, mp_mevff, 0) }, + { FLDATA (EVR, mp_evrff, 0) }, + { NULL } }; + +MTAB mp_mod[] = { + { UNIT_MP_JSB, UNIT_MP_JSB, "JSB (W5) in", "JSBIN", NULL }, + { UNIT_MP_JSB, 0, "JSB (W5) out", "JSBOUT", NULL }, + { UNIT_MP_INT, UNIT_MP_INT, "INT (W6) in", "INTIN", NULL }, + { UNIT_MP_INT, 0, "INT (W6) out", "INTOUT", NULL }, + { UNIT_MP_SEL1, UNIT_MP_SEL1, "SEL1 (W7) in", "SEL1IN", NULL }, + { UNIT_MP_SEL1, 0, "SEL1 (W7) out", "SEL1OUT", NULL }, + { 0 } }; + +DEVICE mp_dev = { + "MP", &mp_unit, mp_reg, mp_mod, + 1, 8, 1, 1, 8, 16, + NULL, NULL, &mp_reset, + NULL, NULL, NULL, + NULL, DEV_DISABLE | DEV_DIS }; + + /* DMA controller data structures dmax_dev DMAx device descriptor @@ -560,7 +625,8 @@ DEVICE dma0_dev = { "DMA0", &dma0_unit, dma0_reg, NULL, 1, 8, 1, 1, 8, 16, NULL, NULL, &dma0_reset, - NULL, NULL, NULL }; + NULL, NULL, NULL, + NULL, DEV_DISABLE }; UNIT dma1_unit = { UDATA (NULL, 0, 0) }; @@ -578,7 +644,8 @@ DEVICE dma1_dev = { "DMA1", &dma1_unit, dma1_reg, NULL, 1, 8, 1, 1, 8, 16, NULL, NULL, &dma1_reset, - NULL, NULL, NULL }; + NULL, NULL, NULL, + NULL, DEV_DISABLE }; /* Extended instruction decode tables */ @@ -715,6 +782,17 @@ reason = 0; /* Restore I/O state */ +if (mp_dev.flags & DEV_DIS) dtab[PRO] = NULL; +else dtab[PRO] = &proio; /* set up MP dispatch */ +if (dma0_dev.flags & DEV_DIS) dtab[DMA0] = dtab[DMALT0] = NULL; +else { /* set up DMA0 dispatch */ + dtab[DMA0] = &dmpio; + dtab[DMALT0] = &dmsio; } +if (dma1_dev.flags & DEV_DIS) dtab[DMA1] = dtab[DMALT1] = NULL; +else { /* set up DMA1 dispatch */ + dtab[DMA1] = &dmpio; + dtab[DMALT1] = &dmsio; } + for (i = VARDEV; i <= I_DEVMASK; i++) dtab[i] = NULL; /* clr disp table */ dev_cmd[0] = dev_cmd[0] & M_FXDEV; /* clear dynamic info */ dev_ctl[0] = dev_ctl[0] & M_FXDEV; @@ -846,6 +924,8 @@ case 0034:case 0035:case 0036:case 0037: case 0230:case 0231:case 0232:case 0233: case 0234:case 0235:case 0236:case 0237: if (reason = Ea (IR, &MA, intrq)) break; /* JSB */ + if ((mp_unit.flags & UNIT_MP_JSB) && CTL (PRO) && (MA < mp_fence)) + ABORT (ABORT_PRO); /* MP if W7 (JSB) out */ WriteW (MA, PC); /* store PC */ PCQ_ENTRY; PC = (MA + 1) & VAMASK; /* jump */ @@ -1850,8 +1930,9 @@ uint32 i, MA; MA = IR & (I_IA | I_DISP); /* ind + disp */ if (IR & I_CP) MA = ((PC - 1) & I_PAGENO) | MA; /* current page? */ for (i = 0; (i < ind_max) && (MA & I_IA); i++) { /* resolve multilevel */ - if ((i >= 2) && irq && /* >3 levels, int req, */ - (cpu_unit.flags & UNIT_MPR)) /* mprot installed? */ + if (irq && /* int req? */ + ((i >= 2) || (mp_unit.flags & UNIT_MP_INT)) && /* ind > 3 or W6 out? */ + !(mp_unit.flags & DEV_DIS)) /* MP installed? */ return STOP_INDINT; /* break out */ MA = ReadW (MA & VAMASK); } if (i >= ind_max) return STOP_IND; /* indirect loop? */ @@ -1868,8 +1949,9 @@ uint32 i, MA; MA = ReadW (PC); /* get next address */ PC = (PC + 1) & VAMASK; for (i = 0; (i < ind_max) && (MA & I_IA); i++) { /* resolve multilevel */ - if ((i >= 2) && irq && /* >3 levels, int req, */ - (cpu_unit.flags & UNIT_MPR)) /* mprot installed? */ + if (irq && /* int req? */ + ((i >= 2) || (mp_unit.flags & UNIT_MP_INT)) && /* ind > 3 or W6 out? */ + !(mp_unit.flags & DEV_DIS)) /* MP installed? */ return STOP_INDINT; /* break out */ MA = ReadW (MA & VAMASK); } if (i >= ind_max) return STOP_IND; /* indirect loop? */ @@ -1922,7 +2004,8 @@ uint32 dev, sop, iodata, ab; ab = (ir & I_AB)? 1: 0; /* get A/B select */ dev = ir & I_DEVMASK; /* get device */ sop = I_GETIOOP (ir); /* get subopcode */ -if (!iotrap && CTL (PRO) && ((sop == ioHLT) || (dev != OVF))) { /* protected? */ +if (!iotrap && CTL (PRO) && /* protected? */ + ((sop == ioHLT) || ((dev != OVF) && (mp_unit.flags & UNIT_MP_SEL1)))) { if (sop == ioLIX) ABREG[ab] = 0; /* A/B writes anyway */ ABORT (ABORT_PRO); } iodata = devdisp (dev, sop, ir, ABREG[ab]); /* process I/O */ @@ -2248,6 +2331,8 @@ return dms_sr; /* Device 0 (CPU) I/O routine + NOTE: LIx/MIx reads floating I/O bus (0 on all machines). + From Dave Bryan: RTE uses the undocumented instruction "SFS 0,C" to both test and turn off the interrupt system. This is confirmed in the "RTE-6/VM Technical Specifications" manual (HP 92084-90015), section 2.3.1 "Process @@ -2295,7 +2380,9 @@ if (IR & I_HC) ion = 0; /* HC option */ return dat; } -/* Device 1 (overflow) I/O routine */ +/* Device 1 (overflow) I/O routine + + NOTE: The S register is read-only on the 2115/2116. */ int32 ovfio (int32 inst, int32 IR, int32 dat) { @@ -2316,7 +2403,7 @@ case ioLIX: /* load */ dat = SR; break; case ioOTX: /* output */ - SR = dat; + if (cpu_unit.flags & (UNIT_2100 | UNIT_21MX)) SR = dat; break; default: break; } @@ -2348,8 +2435,6 @@ return dat; int32 proio (int32 inst, int32 IR, int32 dat) { -if ((cpu_unit.flags & UNIT_MPR) == 0) /* not installed? */ - return nulio (inst, IR, dat); /* non-existent dev */ switch (inst) { /* case on opcode */ case ioSFC: /* skip flag clear */ if (!mp_mevff) PC = (PC + 1) & VAMASK; /* skip if mem prot */ @@ -2407,7 +2492,9 @@ default: return dat; } -/* Devices 6,7 (primary DMA) I/O routine */ +/* Devices 6,7 (primary DMA) I/O routine + + NOTE: LIx/MIx reads floating S-bus (1 on 21MX, 0 on 2116/2100). */ int32 dmpio (int32 inst, int32 IR, int32 dat) { @@ -2426,8 +2513,10 @@ case ioSFC: /* skip flag clear */ case ioSFS: /* skip flag set */ if (FLG (DMA0 + ch) != 0) PC = (PC + 1) & VAMASK; break; -case ioMIX: case ioLIX: /* load, merge */ - dat = DMASK; +case ioLIX: /* load */ + dat = 0; +case ioMIX: /* merge */ + if (cpu_unit.flags & UNIT_21MX) dat = DMASK; break; case ioOTX: /* output */ dmac[ch].cw1 = dat; @@ -2495,19 +2584,27 @@ else { if (inp) { /* last cycle, input? */ return; } -/* Unimplemented device routine */ +/* Unimplemented device routine + + NOTE: For SC < 10, LIx/MIx reads floating S-bus (-1 on 21MX, 0 on 2116/2100). + For SC >= 10, LIx/MIx reads floating I/O bus (0 on all machines). */ int32 nulio (int32 inst, int32 IR, int32 dat) { +int32 devd; + +devd = IR & I_DEVMASK; /* get device no */ switch (inst) { /* case on opcode */ case ioSFC: /* skip flag clear */ PC = (PC + 1) & VAMASK; - return (stop_dev << IOT_V_REASON) | dat; -case ioSFS: /* skip flag set */ - return (stop_dev << IOT_V_REASON) | dat; + break; +case ioLIX: /* load */ + dat = 0; +case ioMIX: /* merge */ + if ((devd < VARDEV) && (cpu_unit.flags & UNIT_21MX)) dat = DMASK; + break; default: break; } -if (IR & I_HC) { clrFLG (IR & I_DEVMASK); } /* HC option */ return (stop_dev << IOT_V_REASON) | dat; } @@ -2522,30 +2619,35 @@ clrCMD (PWR); clrCTL (PWR); clrFLG (PWR); clrFBF (PWR); -clrCMD (PRO); -clrCTL (PRO); -clrFLG (PRO); -clrFBF (PRO); dev_srq[0] = dev_srq[0] & ~M_FXDEV; -mp_fence = 0; /* init mprot */ -mp_viol = 0; -mp_mevff = 0; -mp_evrff = 1; dms_enb = dms_ump = 0; /* init DMS */ dms_sr = 0; dms_vr = 0; pcq_r = find_reg ("PCQ", NULL, dptr); sim_brk_types = ALL_BKPTS; sim_brk_dflt = SWMASK ('E'); -if (M == NULL) M = calloc (PASIZE, sizeof (unsigned int16)); +if (M == NULL) M = calloc (PASIZE, sizeof (uint16)); if (M == NULL) return SCPE_MEM; if (pcq_r) pcq_r->qptr = 0; else return SCPE_IERR; return SCPE_OK; } +t_stat mp_reset (DEVICE *dptr) +{ +clrCTL (PRO); +clrFLG (PRO); +clrFBF (PRO); +mp_fence = 0; /* init mprot */ +mp_viol = 0; +mp_mevff = 0; +mp_evrff = 1; +return SCPE_OK; +} + t_stat dma0_reset (DEVICE *tptr) { +hp_enbdis_pair (&dma0_dev, &dma1_dev); /* make pair cons */ clrCMD (DMA0); clrCTL (DMA0); setFLG (DMA0); @@ -2556,6 +2658,7 @@ return SCPE_OK; t_stat dma1_reset (DEVICE *tptr) { +hp_enbdis_pair (&dma1_dev, &dma0_dev); /* make pair cons */ clrCMD (DMA1); clrCTL (DMA1); setFLG (DMA1); @@ -2601,9 +2704,10 @@ uint32 i; if ((val <= 0) || (val > PASIZE) || ((val & 07777) != 0) || (!(uptr->flags & UNIT_21MX) && (val > 32768))) return SCPE_ARG; -for (i = val; i < MEMSIZE; i++) mc = mc | M[i]; -if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE))) - return SCPE_OK; +if (!(sim_switches & SWMASK ('F'))) { /* force truncation? */ + for (i = val; i < MEMSIZE; i++) mc = mc | M[i]; + if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE))) + return SCPE_INCOMP; } MEMSIZE = val; for (i = MEMSIZE; i < PASIZE; i++) M[i] = 0; return SCPE_OK; @@ -2679,7 +2783,11 @@ for (i = 0; cdptr = sim_devices[i]; i++) { return FALSE; } -/* Configuration validation */ +/* Configuration validation + + Memory is trimmed to 32K if 2116 or 2100 is selected. + Memory protect is enabled if 2100 or 21MX or DMS is selected. + DMA is enabled if 2116 or 2100 or 21MX is selected. */ t_bool cpu_set_opt (UNIT *uptr, int32 val, char *cptr, void *desc) { @@ -2689,15 +2797,22 @@ int32 mod, i; mod = MOD_2116; if (uptr->flags & UNIT_2100) mod = MOD_2100; else if (uptr->flags & UNIT_21MX) mod = MOD_21MX; -for (i = 0; opt_val[i].optf != 0; i++) { +for (i = 0; opt_val[i].cpuf != 0; i++) { if ((opt == opt_val[i].optf) && (mod & opt_val[i].cpuf)) { if ((mod == MOD_2100) && (val == UNIT_FP)) uptr->flags = uptr->flags & ~UNIT_IOP; if ((opt == UNIT_IOP) && val) { - if (mod == MOD_2100) uptr->flags = - (uptr->flags & ~UNIT_FP) | UNIT_IOP | UNIT_MPR; - if (mod == MOD_21MX) uptr->flags |= UNIT_IOPX | UNIT_MPR; } - if (val == UNIT_DMS) uptr->flags |= UNIT_MPR; + if (mod == MOD_2100) + uptr->flags = (uptr->flags & ~UNIT_FP) | UNIT_IOP; + if (mod == MOD_21MX) uptr->flags |= UNIT_IOPX; } + if (opt == UNIT_2116) mp_dev.flags = mp_dev.flags | DEV_DIS; + else if ((val == UNIT_DMS) || (opt == UNIT_2100) || (opt == UNIT_21MX)) + mp_dev.flags = mp_dev.flags & ~DEV_DIS; + if ((opt == UNIT_2116) || (opt == UNIT_2100) || (opt == UNIT_21MX)) { + dma0_dev.flags = dma0_dev.flags & ~DEV_DIS; + dma1_dev.flags = dma1_dev.flags & ~DEV_DIS; } + if (((opt == UNIT_2116) || (opt == UNIT_2100)) && (MEMSIZE > 32768)) + return cpu_set_size (uptr, 32768, cptr, desc); return SCPE_OK; } } return SCPE_NOFNC; } diff --git a/HP2100/hp2100_defs.h b/HP2100/hp2100_defs.h index eacc89c6..2abd4619 100644 --- a/HP2100/hp2100_defs.h +++ b/HP2100/hp2100_defs.h @@ -35,7 +35,8 @@ 14-Apr-99 RMS Changed t_addr to unsigned The author gratefully acknowledges the help of Jeff Moffat in answering - questions about the HP2100. + questions about the HP2100; and of Dave Bryan in adding featurs and + correcting errors throughout the simulator. */ #include "sim_defs.h" /* simulator defns */ @@ -195,12 +196,12 @@ struct DMA { /* DMA channel */ /* I/O devices - variable assignment defaults */ -#define PTR 010 /* paper tape reader */ -#define TTY 011 /* console */ -#define PTP 012 /* paper tape punch */ -#define CLK 013 /* clock */ -#define LPS 014 /* 12653 line printer */ -#define LPT 015 /* 12845 line printer */ +#define PTR 010 /* 12597A-002 paper tape reader */ +#define TTY 011 /* 12531C teleprinter */ +#define PTP 012 /* 12597A-005 paper tape punch */ +#define CLK 013 /* 12539C time-base generator */ +#define LPS 014 /* 12653A line printer */ +#define LPT 015 /* 12845A line printer */ #define MTD 020 /* 12559A data */ #define MTC 021 /* 12559A control */ #define DPD 022 /* 12557A data */ @@ -211,9 +212,9 @@ struct DMA { /* DMA channel */ #define DRC 027 /* 12610A control */ #define MSD 030 /* 13181A data */ #define MSC 031 /* 13181A control */ -#define IPLI 032 /* 12556B link in */ -#define IPLO 033 /* 12556B link out */ -#define DS 034 /* 13037 control */ +#define IPLI 032 /* 12566B link in */ +#define IPLO 033 /* 12566B link out */ +#define DS 034 /* 13037A control */ #define MUXL 040 /* 12920A lower data */ #define MUXU 041 /* 12920A upper data */ #define MUXC 042 /* 12920A control */ diff --git a/HP2100/hp2100_diag.txt b/HP2100/hp2100_diag.txt index 68a1509e..a996c6ec 100644 --- a/HP2100/hp2100_diag.txt +++ b/HP2100/hp2100_diag.txt @@ -1,15 +1,15 @@ SIMH/HP 21XX DIAGNOSTICS PERFORMANCE ==================================== - Last update: 2004-08-28 + Last update: 2004-11-02 The HP 24396 diagnostic suite has been run against the SIMH HP 21xx simulation. Diagnostic programs were obtained from magnetic tape, HP 24396-13601 Rev. 2040. -The most exhaustive test sets were selected for each diagnostic, except as -noted below. +For each diagnostic, the recommended standard tests were selected, plus any +available optional tests that broadened the test coverage. The test system configuration is the default SIMH configuration with these -exceptions: +alterations (except where noted in the individual diagnostic reports): * All I/O devices are enabled. * The CPU is configured as a 21MX with 128KW of memory. @@ -29,11 +29,11 @@ The results of the diagnostic runs are summarized below: 101001 Alter-Skip Instruction Group 1431 3.2-3 Passed 101002 Shift-Rotate Instruction Group 1431 3.2-3 Passed 102200 Core Memory (2100/16/15/14) 1624 - No simulation -102104 Semiconductor Memory (21MX) 1644 3.2-3 Passed * +102104 Semiconductor Memory (21MX) 1644 3.2-3 Passed 101004 EAU Instruction Group 1431 3.2-3 Passed 101207 Floating Point Instruction Group 1551 3.2-3 Passed -102305 Memory Protect/Parity Error 1705 3.2-3 Passed * +102305 Memory Protect/Parity Error 1705 3.3-0 Partial 101206 Power Fail/Auto Restart 1635 - No simulation 141103 I/O Instruction Group 1810 3.2-3 Passed @@ -66,7 +66,7 @@ The results of the diagnostic runs are summarized below: 103121 12968 Asynchronous Comm. Interface 1602 - No simulation 103024 12821 ICD Disc Interface 1928 - No simulation -105102 2607 Line Printer 1446 - Not tested +105102 2607 Line Printer 1446 3.3-0 Passed 145103 2613/17/18 Line Printer 1633 - No simulation 105106 2631 Printer 1913 - No simulation 105107 2635 Printing Terminal 1913 - No simulation @@ -74,36 +74,70 @@ The results of the diagnostic runs are summarized below: 105104 9866 Line Printer 1541 - No simulation 111104 12732 Flexible Disc Subsystem 1708 - No simulation -151302 7900/01 Cartridge Disc 1805 3.2-3 Partial ** +151302 7900/01 Cartridge Disc 1805 3.2-3 Partial 151403 7905/06/20/25 Disc 1805 - No simulation 104117 92900 Terminal Subsystem 1814 - No simulation -112200 9-Track Magnetic Tape (7970, 13181/3) 2040 3.2-3 Partial ** +112200 9-Track Magnetic Tape (7970, 13181/3) 2040 3.2-3 Partial 112102 7/9-Track Magnetic Tape (13184 Interf.) 1629 - No simulation 010000 Diagnostic Cross Link 1627 - No simulation 011000 7900/05/20 Disc Initialization 1627 - No simulation -146200 Paper Tape Reader/Punch 1725 - Not tested +146200 Paper Tape Reader/Punch 1725 3.2-3 Passed 107000 Digital Plotter Interface (CALCOMP) 1540 - No simulation 113100 2892 Card Reader 1537 - No simulation 113001 2894 Card Reader Punch 1728 - No simulation -104003 Teleprinter 1509 - Not tested -104007 2615 Vodeo Terminal 1347 - No simulation +104003 Teleprinter 1509 3.2-3 Partial +104007 2615 Video Terminal 1347 - No simulation 103006 12909B PROM Writer 1420 - No simulation - * A subset of the tests available in the diagnostic were selected, and these - passed without error. See the detailed descriptions below for more - information regarding the test selections. -** Multiple runs of the diagnostic in different modes are required for complete - test coverage, and some of these runs failed, while others succeeded. See - the detailed descriptions below for more information regarding the test - results. +In addition, the following stand-alone diagnostics were run for older devices +not supported by the 24396 suite: + +Paper Tape Date SIMH +Part Number DSN Diagnostic Name Code Vers. Result +----------- ------ --------------------------------------- ---- ----- ---------- +12984-16001 105101 2767 Diagnostic 1611 3.3-0 Passed +24203-60001 -- HP2100A Cartridge Disc Memory (2871) A 3.3-0 Partial +12965-16001 111001 HP2100A Disc File (2883) 1451 3.3-0 Partial +22682-16017 177777 HP 2100 Fixed Head Disc/Drum (277x) 1612 3.3-0 Passed +13206-16001 101016 2100 2000/Access Comm. Proc. Firmware 1526 3.2-3 Partial +13207-16001 101217 21MX 2000/Access Comm. Proc. Firmware 1728 3.2-3 Passed +20433-????? -- HP 3030 Magnetic Tape Subsystem -- - Not tested + + +The "SIMH Version" is the version number of the earliest SIMH system that was +tested with the given diagnostic. Earlier versions may or may not work +properly. + +The "Result" column indicates the level of success in passing the given +diagnostic: + + Term Meaning + ------------- --------------------------------------------------------------- + Passed All of the standard tests relevant to the hardware model passed + without error. Optional "utility" tests, where present, were + not run unless they broadened the test coverage. + + Partial One or more of the standard tests relevant to the hardware + model were either excluded or failed as expected, due to known + limitations in the simulation, e.g., the lack of "defective + cylinder" flags in a disc simulation. + + Failed One or more of the standard tests relevant to the hardware + model failed unexpectedly. + + Not tested The diagnostic has not been run with the device simulation. + + No simulation A simulation of the given device does not exist. + +See the "Test Notes" associated with each diagnostic report below for details on +subsets, limitations, or errors encountered. - -DETAILED DIAGNOSTIC EXECUTION AND RESULTS -========================================= +24396 DIAGNOSTIC SUITE DETAILED EXECUTION AND RESULTS +===================================================== Each execution note below presumes that the target diagnostic has been loaded. For all runs other than the diagnostic configurator pretest, the configurator @@ -119,7 +153,8 @@ Serial Number (DSN), as follows: sim> deposit A [DSN] sim> deposit B 000000 sim> deposit S 113011 - sim> run 100 + sim> reset + sim> go 100 For the pretest, only the first three commands above were used to load the diagnostic configurator. @@ -133,7 +168,8 @@ DSN 000200 - Diagnostic Configurator Pretest TESTED DEVICE: CPU (hp2100_cpu.c) CONFIGURATION: sim> deposit S 000011 - sim> run 2 + sim> reset + sim> go 2 TEST REPORT: HALT instruction 102077 @@ -148,7 +184,8 @@ DSN 101100 - Memory Reference Instruction Group TESTED DEVICE: CPU (hp2100_cpu.c) CONFIGURATION: sim> deposit S 000000 - sim> run 100 + sim> reset + sim> go 100 TEST REPORT: HALT instruction 102077 @@ -163,7 +200,8 @@ DSN 101001 - Alter-Skip Instructions TESTED DEVICE: CPU (hp2100_cpu.c) CONFIGURATION: sim> deposit S 000000 - sim> run 100 + sim> reset + sim> go 100 TEST REPORT: HALT instruction 102077 @@ -178,7 +216,8 @@ DSN 101002 - Shift-Rotate Instructions TESTED DEVICE: CPU (hp2100_cpu.c) CONFIGURATION: sim> deposit S 000000 - sim> run 100 + sim> reset + sim> go 100 TEST REPORT: HALT instruction 102077 @@ -193,22 +232,22 @@ DSN 102104 - Semiconductor Memory TESTED DEVICE: CPU (hp2100_cpu.c) CONFIGURATION: sim> deposit S 001000 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102075 - sim> deposit A 054437 - sim> run + sim> deposit A 054777 + sim> deposit S 000000 + sim> reset + sim> go TEST REPORT: HALT instruction 102077 TEST RESULT: Passed. -TEST NOTES: Tests 5, 6, 7, 11, 12, and 14 are not executed. These tests are - designed specifically for the 4K RAM chips present on the - hardware and aren't relevant to simulation (the other tests - verify that the simulator accesses memory properly with and - without DMS). +TEST NOTES: The standard tests 00-10, plus optional tests 13, 14, and 16 are + executed. @@ -219,7 +258,8 @@ DSN 101004 - EAU Instruction Group TESTED DEVICE: CPU (hp2100_cpu.c) CONFIGURATION: sim> deposit S 000000 - sim> run 100 + sim> reset + sim> go 100 TEST REPORT: 2100 SERIES EAU DIAGNOSTIC END OF PASS 1 @@ -234,10 +274,11 @@ TEST RESULT: Passed. DSN 101207 - Floating Point Instruction Group --------------------------------------------- -TESTED DEVICE: CPU (hp2100_cpu.c) +TESTED DEVICE: CPU (hp2100_fp.c) CONFIGURATION: sim> deposit S 000000 - sim> run 100 + sim> reset + sim> go 100 TEST REPORT: 2100-21MX FLOATING POINT DIAGNOSTIC PASS 000001 @@ -252,23 +293,36 @@ TEST RESULT: Passed. DSN 102305 - Memory Protect/Parity Error ---------------------------------------- -TESTED DEVICE: CPU (hp2100_cpu.c) +TESTED DEVICE: MP (hp2100_cpu.c) -CONFIGURATION: sim> deposit S 140014 - sim> run 100 +CONFIGURATION: sim> set LPS diag + sim> deposit S 140014 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 001000 - sim> run + sim> reset + sim> go + + MEMORY PROTECT-PARITY ERROR DIAGNOSTIC HALT instruction 102075 - sim> deposit A 031777 + sim> deposit A 035777 sim> deposit S 000000 - sim> run + sim> reset + sim> go -TEST REPORT: MEMORY PROTECT-PARITY ERROR DIAGNOSTIC +TEST REPORT: H061 POWER DOWN COMPUTER + INSTALL JUMPERS PER TABLE 3-5 IN MOD + POWER UP COMPUTER + + HALT instruction 102061 + + sim> set MP jsbin,intin,sel1out + sim> go H314 PRESS HALT,PRESET AND RUN WITHIN 30 SECONDS @@ -280,13 +334,22 @@ TEST REPORT: MEMORY PROTECT-PARITY ERROR DIAGNOSTIC PASS 000001 + H062 POWER DOWN COMPUTER + SET JUMPERS TO INITIAL SETTINGS + PER TABLE 3-1 IN MOD + POWER UP COMPUTER + + HALT instruction 102062 + + sim> set MP jsbout,intout,sel1in + sim> go + HALT instruction 102077 -TEST RESULT: Passed. +TEST RESULT: Partially passed. -TEST NOTES: Test 10 tests parity error detection, and test 11 tests memory - protect card alternate jumper settings. Neither of these - features are simulated. +TEST NOTES: Test 10 is not executed. This test verifies parity error + detection. This feature is not simulated. @@ -296,14 +359,16 @@ DSN 141103 - I/O Instruction Group TESTED DEVICE: CPU (hp2100_cpu.c) -CONFIGURATION: sim> set lps diag +CONFIGURATION: sim> set LPS diag sim> deposit S 000014 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000000 - sim> run + sim> reset + sim> go TEST REPORT: I-O INSTRUCTION GROUP & CHANNEL OR EXTENDER DIAGNOSTIC DSN 141103 @@ -342,14 +407,16 @@ DSN 143300 - General Purpose Register TESTED DEVICE: LPS (hp2100_lps.c) -CONFIGURATION: sim> set lps diag +CONFIGURATION: sim> set LPS diag sim> deposit S 000014 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000000 - sim> run + sim> reset + sim> go TEST REPORT: GENERAL PURPOSE REGISTER DIAGNOSTIC, DSN 143300 H024 PRESS PRESET (EXT&INT),RUN @@ -373,16 +440,18 @@ TEST RESULT: Passed. DSN 101220 - Direct Memory Access --------------------------------- -TESTED DEVICE: CPU (hp2100_cpu.c) +TESTED DEVICE: DMA0/DMA1 (hp2100_cpu.c) -CONFIGURATION: sim> set lps diag +CONFIGURATION: sim> set LPS diag sim> deposit S 000014 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000000 - sim> run + sim> reset + sim> go TEST REPORT: DMA-DCPC DIAGNOSTIC @@ -407,8 +476,9 @@ DSN 101011 - Extended Instruction Group (Index) TESTED DEVICE: CPU (hp2100_cpu.c) -CONFIGURATION: sim> deposit S 0 - sim> run 100 +CONFIGURATION: sim> deposit S 000000 + sim> reset + sim> go 100 TEST REPORT: EIG (INDEX) DIAGNOSTIC PASS 000001 @@ -420,18 +490,21 @@ TEST RESULT: Passed. --------------------------------------------------------- -DSN 101011 - Extended Instruction Group (Word, Byte, Bit) +DSN 101112 - Extended Instruction Group (Word, Byte, Bit) --------------------------------------------------------- TESTED DEVICE: CPU (hp2100_cpu.c) -CONFIGURATION: sim> deposit S 000014 - sim> run 100 +CONFIGURATION: sim> set LPS diag + sim> deposit S 000014 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000000 - sim> run + sim> reset + sim> go TEST REPORT: EIG (WORD,BYTE,BIT) DIAGNOSTIC DSN 101112 PASS 000001 @@ -448,17 +521,28 @@ DSN 102103 - Memory Expansion Unit TESTED DEVICE: CPU (hp2100_cpu.c) -CONFIGURATION: sim> set lps diag +CONFIGURATION: sim> set LPS diag sim> deposit S 000014 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 - sim> deposit S 000000 - sim> run + sim> deposit S 001000 + sim> reset + sim> go -TEST REPORT: MEMORY EXPANSION MODULE DIAGNOSTIC, DSN = 102103 - H115 PRESS HALT-PRESET-RUN IN LESS THAN 10 SECONDS + MEMORY EXPANSION MODULE DIAGNOSTIC, DSN = 102103 + + HALT instruction 102075 + + sim> deposit A 177777 + sim> deposit B 000037 + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: H115 PRESS HALT-PRESET-RUN IN LESS THAN 10 SECONDS [CTRL+E] Simulation stopped @@ -467,12 +551,33 @@ TEST REPORT: MEMORY EXPANSION MODULE DIAGNOSTIC, DSN = 102103 sim> go H117 PRESET TEST COMPLETE + H327 00128K OF CONTIGUOUS MEMORY INSTALLED + H024 PRESS PRESET, RUN + + HALT instruction 102024 + + sim> reset + sim> go + + H025 BI-O COMP PASS 000001 HALT instruction 102077 TEST RESULT: Passed. +TEST NOTES: The standard tests 00-22 plus optional tests 23 and 24 are + executed. + + Test 25 (Register Crusher Test) is not executed. This test is + designed specifically for the RAM chips present on the hardware + and isn't relevant to simulation. + + Test 23 cannot be run with more than 256K of memory, or the + diagnostic will be corrupted. There is a fixed-size table in + revision 1830 that overflows if memory size is greater than + 256K. + -------------------------------- @@ -481,14 +586,16 @@ DSN 103301 - Time Base Generator TESTED DEVICE: CLK (hp2100_stddev.c) -CONFIGURATION: sim> set clk diag +CONFIGURATION: sim> set CLK diag sim> deposit S 100013 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000000 - sim> run + sim> reset + sim> go TEST REPORT: TBG DIAGNOSTIC, DSN = 103301 H024 PRESS PRESET (EXT&INT),RUN @@ -551,11 +658,99 @@ DSN 105102 - 2607 Line Printer TESTED DEVICE: LPT (hp2100_lpt.c) -CONFIGURATION: +CONFIGURATION: sim> attach LPT scratch.2607.printer + sim> deposit S 100015 + sim> reset + sim> go 100 -TEST REPORT: + HALT instruction 102074 -TEST RESULT: Not tested. + sim> deposit S 001000 + sim> reset + sim> go + + 2607 LINE PRINTER DIAGNOSTIC + + HALT instruction 102075 + + sim> deposit A 000377 + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: H024 PRESS PRESET (EXT&INT),RUN + + HALT instruction 102024 + + sim> reset + sim> go + + H025 BI-O COMP + H040 PWR OFF LP,PRESS RUN + + HALT instruction 102040 + + sim> set LPT poweroff + sim> go + + H041 PWR ON LP,READY LP,PRESS RUN + + HALT instruction 102041 + + sim> set LPT poweron + sim> go + + H042 PRINT SW OFF,PRESS RUN + + HALT instruction 102042 + + sim> set LPT offline + sim> go + + H043 PRINT SW ON,PRESS RUN + + HALT instruction 102043 + + sim> set LPT online + sim> go + + H044 OPEN PLATEN,PRESS RUN + + HALT instruction 102044 + + sim> set LPT offline + sim> go + + H045 CLOSE PLATEN,PRESS RUN + + HALT instruction 102045 + + sim> set LPT online + sim> go + + H046 REMOVE PAPER FROM LP,PRESS RUN + + HALT instruction 102046 + + sim> detach LPT + sim> go + + H047 RESTORE PAPER IN LP, READY LP,PRESS RUN + + HALT instruction 102047 + + sim> attach LPT scratch.2607.printer + sim> go + + PASS 000001 + + HALT instruction 102077 + +TEST RESULT: Passed. + +TEST NOTES: The standard tests 00-07 are executed. Test 08 (operator + design) is selected as a standard test in this diagnostic only + and so is excluded manually. @@ -570,12 +765,14 @@ CONFIGURATION: sim> attach DPC0 scratch.U0.7900.disc sim> attach DPC2 scratch.U2.7900.disc sim> attach DPC3 scratch.U3.7900.disc sim> deposit S 000022 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000004 - sim> run + sim> reset + sim> go H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC H24 CYLINDER TABLE @@ -628,6 +825,8 @@ TEST REPORT: H65 LONG PASS 0001,HEADS 0/1,UNIT 00, 0000 ERRORS TEST RESULT: Passed. +TEST NOTES: Eight passes are required to test all head/unit combinations. + ------------------------------------------------------------- @@ -638,12 +837,14 @@ TESTED DEVICE: DP (hp2100_dp.c) CONFIGURATION: sim> attach DPC0 scratch.U0.7900.disc sim> deposit S 000022 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000160 - sim> run + sim> reset + sim> go TEST REPORT: H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC H66 SET OVERRIDE SWITCH,PUSH RUN @@ -722,7 +923,7 @@ TEST REPORT: H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC [CTRL+E] Simulation stopped - sim> set DPC0 LOCKED + sim> set DPC0 locked sim> attach DPC0 scratch.U0.7900.disc sim> go @@ -730,7 +931,7 @@ TEST REPORT: H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC HALT instruction 102002 - sim> set DPC0 WRITEENABLED + sim> set DPC0 writeenabled sim> go H71 PRESS PRESET(S) THEN PRESS RUN @@ -745,11 +946,10 @@ TEST REPORT: H0 7900/7901 CARTRIDGE DISC MEMORY DIAGNOSTIC [CTRL+E] Simulation stopped -TEST RESULT: Passed with expected errors. +TEST RESULT: Partially passed. TEST NOTES: Steps 4, 7, 8, and 9 test the defective and protected cylinder - bits and the FORMAT switch. Neither of these features are - simulated. + bits and the FORMAT switch. These features are not simulated. @@ -774,22 +974,21 @@ DSN 112200 - 9-Track Magnetic Tape (7970B, 13181) DEVICE: MS (hp2100_ms.c) CONFIGURATION: sim> detach MSC0 - sim> set MSC 13181A - sim> set MSC REALTIME - + sim> set MSC realtime sim> attach MSC0 scratch.U0.7970.tape sim> attach MSC1 scratch.U1.7970.tape sim> attach MSC2 scratch.U2.7970.tape sim> attach MSC3 scratch.U3.7970.tape - sim> deposit S 102030 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000217 - sim> run + sim> reset + sim> go TEST REPORT: 7970-13181 DIAG. H024 PRESS PRESET (EXT&INT),RUN @@ -867,14 +1066,14 @@ TEST REPORT: 7970-13181 DIAG. HALT instruction 106030 - sim> set MSC0 LOCKED + sim> set MSC0 locked sim> go H131 REPLACE WRITE RING HALT instruction 106031 - sim> set MSC0 WRITEENABLED + sim> set MSC0 writeenabled sim> go H137 PUT TAPE UNIT ON-LINE @@ -909,12 +1108,12 @@ TEST REPORT: 7970-13181 DIAG. HALT instruction 102077 -TEST RESULT: Passed with expected errors. +TEST RESULT: Partially passed. TEST NOTES: Test 23 verifies the LRCC and CRCC values obtained from the - interface. Neither of these features are simulated. (Setting - bit 7 of the S register during configuration eliminates most - LRCC/CRCC checks but does not inhibit test 23.) + interface. These features are not simulated. (Setting bit 7 of + the S register during configuration eliminates most LRCC/CRCC + checks but does not inhibit test 23.) If test 34 is selected manually, E065 WRITE ERROR will occur. This is due to the implementation of the tape simulation @@ -925,7 +1124,7 @@ TEST NOTES: Test 23 verifies the LRCC and CRCC values obtained from the buffer to accumulate the entire record before calling "sim_tape_wrrecf" to write the record. The simulator uses a data buffer of 32768 words. When the buffer is full, - parity-error status will be returned to the program. + parity-error status is returned to the program. @@ -936,22 +1135,21 @@ DSN 112200 - 9-Track Magnetic Tape (7970E, 13183) DEVICE: MS (hp2100_ms.c) CONFIGURATION: sim> detach MSC0 - sim> set MSC 13183A - sim> set MSC REALTIME - + sim> set MSC realtime sim> attach MSC0 scratch.U0.7970.tape sim> attach MSC1 scratch.U1.7970.tape sim> attach MSC2 scratch.U2.7970.tape sim> attach MSC3 scratch.U3.7970.tape - sim> deposit S 104030 - sim> run 100 + sim> reset + sim> go 100 HALT instruction 102074 sim> deposit S 000017 - sim> run + sim> reset + sim> go TEST REPORT: 7970-13183 DIAG. H024 PRESS PRESET (EXT&INT),RUN @@ -1005,14 +1203,14 @@ TEST REPORT: 7970-13183 DIAG. HALT instruction 106030 - sim> set MSC0 LOCKED + sim> set MSC0 locked sim> go H131 REPLACE WRITE RING HALT instruction 106031 - sim> set MSC0 WRITEENABLED + sim> set MSC0 writeenabled sim> go H137 PUT TAPE UNIT ON-LINE @@ -1055,13 +1253,190 @@ TEST RESULT: Passed. DSN 146200 - Paper Tape Reader/Punch ------------------------------------ -TESTED DEVICE: PTR (hp2100_stddev.c) +TESTED DEVICE: PTR and PTP (hp2100_stddev.c) -CONFIGURATION: +CONFIGURATION: sim> deposit S 001012 + sim> reset + sim> go 100 -TEST REPORT: + HALT instruction 102074 -TEST RESULT: Not tested. + sim> deposit S 001000 + sim> reset + sim> go + + PAPER TAPE READER AND PUNCH DIAGNOSTIC DSN 146200 + + HALT instruction 102075 + + sim> deposit A 000200 + sim> reset + sim> go + + H060 TO MAKE LOOP, PUNCH ON AND RUN + + HALT instruction 102060 + + sim> attach PTP loop.2895.punch + sim> go + + PASS 000001 + + HALT instruction 102077 + + sim> detach PTP + sim> deposit S 001000 + sim> reset + sim> go 2000 + + PAPER TAPE READER AND PUNCH DIAGNOSTIC DSN 146200 + + HALT instruction 102075 + + sim> deposit A 003177 + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: H050 BI-O ON PUNCH + H024 PRESS PRESET (EXT&INT),RUN + + HALT instruction 102024 + + sim> reset + sim> go + + H025 BI-O COMP + H055 BI-O ON READER + H024 PRESS PRESET (EXT&INT),RUN + + HALT instruction 102024 + + sim> reset + sim> go + + H025 BI-O COMP + H051 ALL CHARTR COMBINATIONS, PUNCH ONLY + TURN PUNCH ON, PRESS RUN + + HALT instruction 102051 + + sim> attach PTP scratch.2895.punch + sim> go + + H052 ALL CHARTR COMBINATIONS, VERIFY + TEAR TAPE AT PUNCH, PLACE IN READER, PRESS RUN + + HALT instruction 102052 + + sim> detach PTP + sim> attach PTR scratch.2895.punch + sim> go + + H054 PLACE LOOP IN READER-PRESS RUN + TO START READ, SET BIT0 TO 1 + TO EXIT TEST, SET BIT0 TO 0 + + HALT instruction 102054 + + sim> set PTR diag + sim> attach PTR loop.2895.punch + sim> deposit S 000001 + sim> go + + [CTRL+E] + Simulation stopped + + sim> deposit S 000000 + sim> go + + H054 PLACE LOOP IN READER-PRESS RUN + TO START READ, SET BIT0 TO 1 + TO EXIT TEST, SET BIT0 TO 0 + + HALT instruction 102054 + + sim> deposit S 000001 + sim> go + + [CTRL+E] + Simulation stopped + + sim> deposit PTR TIME 100 + sim> deposit PTP TIME 200 + sim> deposit S 000000 + sim> go + + H056 TURN PUNCH ON, PRESS RUN. PUNCH ROUTINE + WILL START. LOAD THE TAPE BEING PUNCHED + INTO THE READER. + TO START READ, SET BIT0 TO 1 + TO EXIT, SET BIT0 TO 0 + + HALT instruction 102056 + + sim> set PTR reader + sim> attach PTR scratch.2895.punch + sim> attach PTP scratch.2895.punch + sim> go + + [CTRL+E] + Simulation stopped + + sim> deposit S 000001 + sim> go + + [CTRL+E] + Simulation stopped + + sim> deposit S 000000 + sim> go + + H057 TO COMPLETE, TEAR TAPE, PRESS RUN + + HALT instruction 102057 + + sim> go + + H063 READER SPEED TEST. PLACE LOOP IN READER + BIT 5=0 FOR 2748-58, BIT 5=1 FOR 2737. PRESS RUN. + + HALT instruction 102063 + + sim> set PTR diag + sim> attach PTR loop.2895.punch + sim> deposit PTR TIME 3150 + sim> go + + H066 TEST 11 COMPLETE + H100 PUNCH SPEED TEST. + BIT 6=0 FOR 2895 OR BIT 6=1 FOR 2753-PRESS RUN + + HALT instruction 106000 + + sim> deposit PTP TIME 20790 + sim> go + + H103 TEST 12 COMPLETE + PASS 000001 + + HALT instruction 102077 + +TEST RESULT: Passed. + +TEST NOTES: Test 07 is executed to punch a tape loop that is used in tests + 04, 05, and 11. Then the default tests 00-06, plus tests 11 and + 12, are executed. + + Test 06 punches and reads the same tape concurrently (the tape + coming out of the punch is then fed into the reader). Under + simulation, it is necessary to delay starting the read until the + punch buffer has been flushed to the disc. Also, this test + depends on the reader being at least twice as fast as the punch, + so the PTR/PTP TIME registers are adjusted accordingly. + + Test 11 and test 12 are speed tests, so the PTR and PTP TIMEs + are set for realistic timing. @@ -1071,8 +1446,1020 @@ DSN 104003 - Teleprinter TESTED DEVICE: TTY (hp2100_stddev.c) -CONFIGURATION: +CONFIGURATION: sim> deposit S 000011 + sim> reset + sim> go 100 -TEST REPORT: + HALT instruction 102074 + + sim> deposit S 001000 + sim> reset + sim> go + + START TTY DIAGNOSTIC + + HALT instruction 102075 + + sim> deposit A 000373 + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: H024 PRESS PRESET (EXT&INT),RUN + + HALT instruction 102024 + + sim> reset + sim> go + + H025 BI-O COMP + H030 TURN TTY PUNCH ON + PRESS RUN + + HALT instruction 102030 + + sim> attach TTY2 scratch.2752.punch + sim> go + + H045 TURN TTY PUNCH OFF + PRESS RUN + + HALT instruction 102045 + + sim> detach TTY2 + sim> deposit S 100000 + sim> go + + HALT instruction 102076 + + sim> go + + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_ + + HALT instruction 102076 + + sim> set console WRU=003 + sim> go + + INPUT THE FOLLOWING: + 1 2 3 4 5 6 7 8 9 0 : - + + Q W E R T Y U I O P + + A S D F G H J K L ; + + Z X C V B N M , . / + + SHIFT+ + ! " # $ % & ' ( ) * = + + _ @ + ^ < > ? + + CNTRL+ + WRU TAPE NTAP XOFF EOT RU BELL TAB VT FORM + + + RBOT CR LF + + + HALT instruction 102076 + + sim> set console WRU=005 + sim> go + + INPUT ANY KEY + T H I S 040 I S 040 A 040 + T E S T + + [CTRL+E] + Simulation stopped + + sim> deposit S 000002 + sim> go + + [CTRL+E] + Simulation stopped + + sim> deposit S 000000 + sim> go + + H044 INPUT TERMINATED + + ECHO MODE ANY INPUT IS ECHOED + THIS IS A TEST + + [CTRL+E] + Simulation stopped + + sim> deposit S 000002 + sim> go + + [CTRL+E] + Simulation stopped + + sim> deposit S 100000 + sim> go + + H044 INPUT TERMINATED + + HALT instruction 102076 + + sim> deposit TTY TTIME 158000 + sim> deposit S 000000 + sim> go + + PASS 000001 + + HALT instruction 102077 + +TEST RESULT: Partially passed. + +TEST NOTES: Test 2 is not executed. This test uses the teleprinter paper + tape reader. This feature is not simulated. + + Test 7 is the oscillator tolerance test, so the TTY TTIME is set + for realistic timing. + + + + +STAND-ALONE DIAGNOSTIC DETAILED EXECUTION AND RESULTS +===================================================== + +Each execution note below presumes that the target diagnostic has been loaded. +For all runs, the diagnostic configurator was used in automatic mode to load the +target diagnostic from a paper tape image, as follows: + + sim> attach -r MSC0 24396-13601-REV-2040.tape + sim> deposit S 000000 + sim> boot MSC0 + + HALT instruction 102077 + + sim> attach PTR [paper-tape-image-file] + sim> deposit S 001011 + sim> reset + sim> go 100 + + + +------------------------------ +DSN 105101 - 2767 Line Printer +------------------------------ + +TESTED DEVICE: LPS (hp2100_lps.c) + +BINARY TAPE: 12984-16001 Rev. 1611 + +CONFIGURATION: sim> set LPS realtime + sim> attach LPS scratch.2767.printer + sim> deposit S 000014 + sim> reset + sim> go 100 + + HALT instruction 102074 + + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: 2767 L.P. DIAGNOSTIC + H024 PRESS PRESET (EXT&INT),RUN + + HALT instruction 102024 + + sim> reset + sim> go + + H025 BI-O COMP + H035 TURN OFF L.P. POWER + + HALT instruction 102035 + + sim> set LPS poweroff + sim> go + + H036 TURN ON L.P. POWER + + HALT instruction 102036 + + sim> set LPS poweron + sim> go + + H033 PUT L.P. ON-LINE + + HALT instruction 102033 + + sim> set LPS online + sim> go + + H034 MASTER CLEAR L.P. + + HALT instruction 102034 + + sim> set LPS offline + sim> go + + H033 PUT L.P. ON-LINE + + HALT instruction 102033 + + sim> set LPS online + sim> go + + H040 PUT L.P. OFF-LINE. TOGGLE TOP-OF-FORM SWITCH + + HALT instruction 102040 + + sim> set LPS offline + sim> go + + H033 PUT L.P. ON-LINE + + HALT instruction 102033 + + sim> set LPS online + sim> go + + H041 PUT L.P. OFF-LINE. TOGGLE PAPER-STEP 5 TIMES + + HALT instruction 102041 + + sim> set LPS offline + sim> go + + H033 PUT L.P. ON-LINE + + HALT instruction 102033 + + sim> set LPS online + sim> go + + PASS 000001 + + HALT instruction 102077 + +TEST RESULT: Passed. + +TEST NOTES: The simulation provides no manual Master Clear, Top of Form, or + Paper Step functions, so these are merely presumed above. + + + +----------------------------------------------------------------- +DSN (none) - HP2100A Cartridge Disc Memory (2871) (multiple unit) +----------------------------------------------------------------- + +TESTED DEVICE: DP (hp2100_dp.c) + +BINARY TAPE: 24203-60001 Rev. A + +CONFIGURATION: sim> set DPC 12557A + sim> attach DPC0 scratch.U0.2871.disc + sim> attach DPC1 scratch.U1.2871.disc + sim> attach DPC2 scratch.U2.2871.disc + sim> attach DPC3 scratch.U3.2871.disc + sim> deposit S 002211 + sim> reset + sim> go 2 + + HALT instruction 107077 + + sim> deposit S 000400 + sim> reset + sim> go 100 + + H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC + H34 ENTER UNIT NUMBERS(0-3)SEPARATED BY COMMAS + 0,1,2,3 + + H33 RESET SWITCH 8 + + HALT instruction 102002 + + sim> deposit S 000004 + sim> go + + H24 CYLINDER TABLE + 000,001,002,004,008,016,032,064,128,202 + H25 WISH TO ALTER TABLE? + NO + + H27 PATTERN TABLE + 000000 177777 125252 052525 007417 + 170360 162745 163346 155555 022222 + H25 WISH TO ALTER TABLE? + NO + + H62 TYPE A FOR HEADS 0,1;B FOR 2,3;C FOR ALTERNATELY 0,1 THEN 2,3 + C + + H32 RESET SWITCH 2 + + HALT instruction 102002 + + sim> deposit S 000000 + sim> reset + sim> go 100 + +TEST REPORT: H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC + H65 PASS 0001 + H65 PASS 0002 + H65 PASS 0003 + H65 PASS 0004 + + [CTRL+E] + Simulation stopped + +TEST RESULT: Passed. + +TEST NOTES: Four passes are required to test all head/unit combinations. + + + +-------------------------------------------------------------------- +DSN (none) - HP2100A Cartridge Disc Memory (2871) (user interaction) +-------------------------------------------------------------------- + +TESTED DEVICE: DP (hp2100_dp.c) + +BINARY TAPE: 24203-60001 Rev. A + +CONFIGURATION: sim> set DPC 12557A + sim> attach DPC0 scratch.U0.2871.disc + sim> deposit S 002211 + sim> reset + sim> go 2 + + HALT instruction 107077 + + sim> deposit S 010020 + sim> reset + sim> go 100 + +TEST REPORT: H0 HP2100A CARTRIDGE DISC MEMORY DIAGNOSTIC + H66 SET OVERRIDE SWITCH,PUSH RUN + + HALT instruction 102002 + + sim> go + + H37 READ AFTER WRITE ADDRESS IN S0 + E64 STATUS IS 000000 SHOULD BE 000010 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H22 CYCLIC CHECK IN S0 + E64 STATUS IS 000000 SHOULD BE 000010 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H67 CLEAR OVERRIDE SWITCH,PUSH RUN + + HALT instruction 102002 + + sim> go + + H41 READ DEFECTIVE TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000031 + H51 CYL 0001 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H42 WRITE PROTECTED TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000011 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H36 WRITE ADDRESS IN S0 + E64 STATUS IS 000000 SHOULD BE 000011 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 3072 UNIT 00 + + HALT instruction 102001 + + sim> go + + H66 SET OVERRIDE SWITCH,PUSH RUN + + HALT instruction 102002 + + sim> go + + H67 CLEAR OVERRIDE SWITCH,PUSH RUN + + HALT instruction 102002 + + sim> go + + H70 UNLOCK UNIT 0,PUSH RUN + + HALT instruction 102002 + + sim> detach DPC0 + sim> go + + H40 READY UNIT 0 + + [CTRL+E] + Simulation stopped + + sim> attach DPC0 scratch.U0.2871.disc + sim> go + + H71 PRESS PRESET THEN PRESS RUN + + HALT instruction 102002 + + sim> deposit S 000140 + sim> reset + sim> go + + H65 PASS 0001 + +TEST RESULT: Partially passed. + +TEST NOTES: Step 0 tests the the defective and protected cylinder bits and + the FORMAT OVERRIDE switch. These features are not simulated. + + + +----------------------------------------------------- +DSN 111001 - HP2100A Disc File (2883) (multiple unit) +----------------------------------------------------- + +TESTED DEVICE: DQ (hp2100_dq.c) + +BINARY TAPE: 12965-16001 Rev. 1451 + +CONFIGURATION: sim> attach DQC0 scratch.U0.2883.disc + sim> attach DQC1 scratch.U1.2883.disc + sim> reset + sim> go 100 + + H0 HP 2100 SERIES DISC FILE(2883) DIAGNOSTIC + + H72 ENTER SELECT CODES,DMA CHANNEL IN SWITCH REGISTER,PRESS RUN + + HALT instruction 107001 + + sim> deposit S 002411 + sim> go + + H1 ENTER PROGRAM OPTIONS IN SWITCH REGISTER,PRESS RUN + + HALT instruction 107077 + + sim> deposit S 000400 + sim> go + +TEST REPORT: H65 PASS 0001 + H65 PASS 0002 + + [CTRL+E] + Simulation stopped + +TEST RESULT: Passed. + +TEST NOTES: Two passes are required to test all head/unit combinations. + + + +-------------------------------------------------------- +DSN 111001 - HP2100A Disc File (2883) (user interaction) +-------------------------------------------------------- + +TESTED DEVICE: DQ (hp2100_dq.c) + +BINARY TAPE: 12965-16001 Rev. 1451 + +CONFIGURATION: sim> attach DQC0 scratch.U0.2883.disc + sim> reset + sim> go 100 + + H0 HP 2100 SERIES DISC FILE(2883) DIAGNOSTIC + + H72 ENTER SELECT CODES,DMA CHANNEL IN SWITCH REGISTER,PRESS RUN + + HALT instruction 107001 + + sim> deposit S 002411 + sim> go + + H1 ENTER PROGRAM OPTIONS IN SWITCH REGISTER,PRESS RUN + + HALT instruction 107077 + + sim> deposit S 000142 + sim> go + +TEST REPORT: H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN + + HALT instruction 102002 + + sim> go + + H37 READ ADDRESS IN S0 + E47 DATA WORD 0000 IS 000000 SHOULD BE 100000 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0002 UNIT 00 + + HALT instruction 102001 + + sim> go + + H37 READ ADDRESS IN S0 + E47 DATA WORD 0000 IS 000000 SHOULD BE 100001 + H51 CYL 0001 HEAD 01 SECTOR 00 WORD COUNT 0002 UNIT 00 + + HALT instruction 102001 + + sim> go + + H33 WRITE DEFECTIVE TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000031 + H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H41 READ DEFECTIVE TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000031 + H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN + + HALT instruction 102002 + + sim> go + + H33 WRITE DEFECTIVE TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000031 + H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H41 READ DEFECTIVE TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000031 + H51 CYL 0000 HEAD 01 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H42 WRITE PROTECTED TRACK IN S0 + E64 STATUS IS 000000 SHOULD BE 000011 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0128 UNIT 00 + + HALT instruction 102001 + + sim> go + + H36 WRITE ADDRESS IN S0 + E64 STATUS IS 000000 SHOULD BE 000011 + H51 CYL 0000 HEAD 00 SECTOR 00 WORD COUNT 0046 UNIT 00 + + HALT instruction 102001 + + sim> go + + H66 SET FORMAT SWITCH ON UNIT 0,PUSH RUN + + HALT instruction 102002 + + sim> go + + H67 CLEAR FORMAT SWITCH ON UNIT 0,PUSH RUN + + HALT instruction 102002 + + sim> go + + H70 DISABLE UNIT 0,PUSH RUN + + HALT instruction 102002 + + sim> detach DQC0 + sim> go + + H40 ENABLE UNIT 0 + + [CTRL+E] + Simulation stopped + + sim> attach DQC0 scratch.U0.2883.disc + sim> go + + H71 PRESS PRESET THEN PRESS RUN + + HALT instruction 102002 + + sim> deposit S 010140 + sim> reset + sim> go + + H74 SHORT PASS + H65 PASS 0001 + + HALT instruction 102077 + +TEST RESULT: Partially passed. + +TEST NOTES: Step 0 tests the FORMAT OVERRIDE switch, the use of the flagged + track bit to indicate a protected or defective track, and the + ability to write a sector address field that differs from the + sector location to indicate track sparing. These features are + not simulated. + + + +----------------------------------------------------------- +DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2770) +----------------------------------------------------------- + +TESTED DEVICE: DR (hp2100_dr.c) + +BINARY TAPE: 22682-16017 Rev. 1612 + +CONFIGURATION: sim> reset + sim> go 100 + + H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC + ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN + + HALT instruction 107001 + + sim> set DRC 180K + sim> set DRC TRACKPROT=8 + sim> attach DRC0 scratch.U0.2770.disc + sim> deposit S 002611 + sim> go + + H1 CONFIGURATION COMPLETE + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, + H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN + + HALT instruction 107077 + + sim> deposit S 010000 + sim> go + +TEST REPORT: H12 DEVICE HAS 90 SECTORS + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN + + HALT instruction 102002 + + sim> set DRC PROTECTED + sim> go + + H14 DEVICE HAS 0032 TRACKS,THE FOLLOWING ARE PROTECTED: + H63 0000 TO 0007 + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H36 PASS 0001 + + HALT instruction 102077 + +TEST RESULT: Passed. + + + +--------------------------------------------------------------- +DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2771-001) +--------------------------------------------------------------- + +TESTED DEVICE: DR (hp2100_dr.c) + +BINARY TAPE: 22682-16017 Rev. 1612 + +CONFIGURATION: sim> reset + sim> go 100 + + H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC + ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN + + HALT instruction 107001 + + sim> set DRC 720K + sim> set DRC TRACKPROT=32 + sim> attach DRC0 scratch.U0.2771.disc + sim> deposit S 002611 + sim> go + + H1 CONFIGURATION COMPLETE + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, + H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN + + HALT instruction 107077 + + sim> deposit S 010000 + sim> go + +TEST REPORT: H12 DEVICE HAS 90 SECTORS + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN + + HALT instruction 102002 + + sim> set DRC PROTECTED + sim> go + + H14 DEVICE HAS 0128 TRACKS,THE FOLLOWING ARE PROTECTED: + H63 0000 TO 0031 + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H36 PASS 0001 + + HALT instruction 102077 + +TEST RESULT: Passed. + + + +----------------------------------------------------------- +DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2773) +----------------------------------------------------------- + +TESTED DEVICE: DR (hp2100_dr.c) + +BINARY TAPE: 22682-16017 Rev. 1612 + +CONFIGURATION: sim> reset + sim> go 100 + + H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC + ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN + + HALT instruction 107001 + + sim> set DRC 384K + sim> set DRC TRACKPROT=16 + sim> attach DRC0 scratch.U0.2773.disc + sim> deposit S 002611 + sim> go + + H1 CONFIGURATION COMPLETE + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, + H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN + + HALT instruction 107077 + + sim> deposit S 010000 + sim> go + +TEST REPORT: H12 DEVICE HAS 32 SECTORS + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN + + HALT instruction 102002 + + sim> set DRC PROTECTED + sim> go + + H14 DEVICE HAS 0192 TRACKS,THE FOLLOWING ARE PROTECTED: + H63 0000 TO 0015 + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H36 PASS 0001 + + HALT instruction 102077 + +TEST RESULT: Passed. + + + +----------------------------------------------------------- +DSN 177777 - HP 2100 Fixed Head Disc/Drum Diagnostic (2775) +----------------------------------------------------------- + +TESTED DEVICE: DR (hp2100_dr.c) + +BINARY TAPE: 22682-16017 Rev. 1612 + +CONFIGURATION: sim> reset + sim> go 100 + + H0 2100 SERIES FIXED HEAD DISC/DRUM DIAGNOSTIC + ENTER SELECT CODES, CHANNELS IN SWITCH REGISTER,PUSH RUN + + HALT instruction 107001 + + sim> set DRC 1536K + sim> set DRC TRACKPROT=64 + sim> attach DRC0 scratch.U0.2775.disc + sim> deposit S 002611 + sim> go + + H1 CONFIGURATION COMPLETE + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, + H70 ENTER PROGRAM OPTIONS IN SWITCH REGISTER, PUSH RUN + + HALT instruction 107077 + + sim> deposit S 010000 + sim> go + +TEST REPORT: H12 DEVICE HAS 32 SECTORS + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H10 SET TRACK PROTECT SWITCH TO PROTECTED,PRESS RUN + + HALT instruction 102002 + + sim> set DRC PROTECTED + sim> go + + H14 DEVICE HAS 0768 TRACKS,THE FOLLOWING ARE PROTECTED: + H63 0000 TO 0063 + H11 SET TRACK PROTECT SWITCH TO NOT PROTECTED, PRESS RUN + + HALT instruction 102002 + + sim> set DRC UNPROTECTED + sim> go + + H36 PASS 0001 + + HALT instruction 102077 + +TEST RESULT: Passed. + + + +------------------------------------------------- +DSN 101016 - 2000/Access Comm. Processor Firmware +------------------------------------------------- + +TESTED DEVICE: CPU (hp2100_cpu.c) + +BINARY TAPE: 13206-16001 Rev. 1526 + +CONFIGURATION: sim> set CPU 2100 + sim> set CPU 32K + sim> set CPU IOP + sim> deposit S 000013 + sim> reset + sim> go 100 + + HALT instruction 102074 + + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: 2100 2000-ACCESS COMM. PROC. FIRMWARE DIAGNOSTIC + H030 CRC TEST + H040 ENQ, DEQ AND PENQ TESTS + H060 IAL TEST + H110 READF, SAVE AND RESTR TESTS + H120 LAI AND SAI TESTS + H130 PFREX TEST + H140 PFREI TEST + H150 PFRIO TEST + H160 STORE-LOAD BYTE, TRSLT + AND BYTE MOVE TEST + + TEST 10 + E165 TRSLT NOT INTERRUPTIBLE + + HALT instruction 106065 + + sim> go + + H230 WORD MOVE TEST + + TEST 11 + E234 WORD MOVE NOT INTERRUPTIBLE + + HALT instruction 103034 + + sim> go + + PASS 000001 + + HALT instruction 102077 + +TEST RESULT: Partially passed. + +TEST NOTES: Tests 10 and 11 test the interruptibility of the TRSLT and MWORD + instructions. These features are not simulated. + + + +------------------------------------------------- +DSN 101217 - 2000/Access Comm. Processor Firmware +------------------------------------------------- + +TESTED DEVICE: CPU (hp2100_cpu.c) + +BINARY TAPE: 13207-16001 Rev. 1728 + +CONFIGURATION: sim> set CPU IOP + sim> deposit S 000013 + sim> reset + sim> go 100 + + HALT instruction 102074 + + sim> deposit S 000000 + sim> reset + sim> go + +TEST REPORT: 21MX 2000 COMPUTER SYSTEM COMM. PROC. FIRMWARE DIAGNOSTIC + H030 CRC TEST + H040 ENQ, DEQ AND PENQ TESTS + H060 IAL TEST + H110 INS,READF, SAVE AND RESTR TESTS + H120 LAI AND SAI TESTS + H130 PFREX TEST + H140 PFREI TEST + H150 PFRIO TEST + PASS 000001 + + HALT instruction 102077 + +TEST RESULT: Passed. + + + +-------------------------------------------- +DSN (none) - HP 3030 Magnetic Tape Subsystem +-------------------------------------------- + +TESTED DEVICE: MT (hp2100_mt.c) + +BINARY TAPE: None available. + +CONFIGURATION: (none) + +TEST REPORT: (none) TEST RESULT: Not tested. + +TEST NOTES: The limited documentation available for this unit suggests that + the diagnostic is HP product number 20433, but no copy of this + diagnostic has been found. diff --git a/HP2100/hp2100_doc.txt b/HP2100/hp2100_doc.txt index 9f53d93d..45c7d86a 100644 --- a/HP2100/hp2100_doc.txt +++ b/HP2100/hp2100_doc.txt @@ -1,7 +1,7 @@ To: Users From: Bob Supnik Subj: HP2100 Simulator Usage -Date: 20-Aug-2004 +Date: 26-Oct-2004 COPYRIGHT NOTICE @@ -77,25 +77,27 @@ name(s) CPU 2116 CPU with 32KW memory 2100 CPU with 32KW memory, FP or IOP instructions - 21MX CPU with 1024KW memory, FP or DMS instructions -DMA0, DMA1 dual channel DMA controller -PTR,PTP 12597A paper tape reader/punch -TTY 12531C buffered terminal controller -LPS 12653A printer controller with 2767 printer - 12566B microcircuit interface for diagnostics -LPT 12845A printer controller with 2607 printer -CLK 12539A/B/C time base generator -MUXL,MUXU,MUXC 12920A terminal multiplexor + 21MX CPU with 1024KW memory, FP, DMS, and/or IOP instructions +MP 12892B memory protect +DMA0, DMA1 12895A/12897B direct memory access/dual channel port controller +PTR 12597A duplex register interface with 2748 paper tape reader +PTP 12597A duplex register interface with 2895 paper tape punch +TTY 12531C buffered teleprinter interface with 2752 teleprinter +LPS 12653A printer controller with 2767 line printer + 12566B microcircuit interface with loopback connector +LPT 12845B printer controller with 2607 line printer +CLK 12539C time base generator +MUX,MUXL,MUXM 12920A terminal multiplexor DP 12557A disk controller with four 2871 drives 13210A disk controller with four 7900 drives DQ 12565A disk controller with two 2883 drives -DR 12606B fixed head disk controller with 2770/2771 disks - 12610B drum controller with 2773/2774/2775 drums +DR 12606B fixed head disk controller with 2770/2771 disk + 12610B drum controller with 2773/2774/2775 drum MT 12559C magnetic tape controller with one 3030 drive MS 13181A magnetic tape controller with four 7970B drives 13183A magnetic tape controller with four 7970E drives -IPLI 12556B interprocessor link, input side -IPLO 12556B interprocessor link, output side +IPLI 12566B interprocessor link, input side +IPLO 12566B interprocessor link, output side The HP2100 simulator implements several unique stop conditions: @@ -109,7 +111,12 @@ command is not implemented. 2.1 CPU -CPU options include choice of instruction set and memory size. +CPU options include choice of instruction set and memory size. The +general command form is: + + SET {-F} CPU