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IBM1130: Correct the width of the ILSW registers

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This commit is contained in:
Mark Pizzolato 2020-02-26 21:55:51 -08:00
parent 814ce9ea2a
commit ba7316ea8a
1 changed files with 6 additions and 6 deletions
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12
Ibm1130/ibm1130_cpu.c
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@ -292,12 +292,12 @@ REG cpu_reg[] = {
{ ORDATA (WRU, sim_int_char, 8) }, { ORDATA (WRU, sim_int_char, 8) },
{ FLDATA (IntRun, tbit, 1) }, { FLDATA (IntRun, tbit, 1) },
{ HRDATA (ILSW0, ILSW[0], 32), REG_RO }, { HRDATA (ILSW0, ILSW[0], 16), REG_RO },
{ HRDATA (ILSW1, ILSW[1], 32), REG_RO }, { HRDATA (ILSW1, ILSW[1], 16), REG_RO },
{ HRDATA (ILSW2, ILSW[2], 32), REG_RO }, { HRDATA (ILSW2, ILSW[2], 16), REG_RO },
{ HRDATA (ILSW3, ILSW[3], 32), REG_RO }, { HRDATA (ILSW3, ILSW[3], 16), REG_RO },
{ HRDATA (ILSW4, ILSW[4], 32), REG_RO }, { HRDATA (ILSW4, ILSW[4], 16), REG_RO },
{ HRDATA (ILSW5, ILSW[5], 32), REG_RO }, { HRDATA (ILSW5, ILSW[5], 16), REG_RO },
#ifdef ENABLE_1800_SUPPORT #ifdef ENABLE_1800_SUPPORT
{ HRDATA (IS_1800, is_1800, 32), REG_RO|REG_HIDDEN}, /* is_1800 flag is part of state, but hidden */ { HRDATA (IS_1800, is_1800, 32), REG_RO|REG_HIDDEN}, /* is_1800 flag is part of state, but hidden */