PDP11: Fix RS device address window size and propagate that through to RH

As discussed  in #396
This commit is contained in:
Mark Pizzolato 2017-02-11 10:39:52 -08:00
parent 84f1e7104e
commit bce72b2b1a
4 changed files with 34 additions and 31 deletions

View file

@ -202,11 +202,9 @@ static int32 mba_mapofs[(MBA_OFSMASK + 1) >> 1] = {
mbax_reg RHx register list mbax_reg RHx register list
*/ */
#define IOLN_RP 054
DIB mba0_dib = { DIB mba0_dib = {
IOBA_AUTO, IOLN_RP, &mba_rd, &mba_wr, IOBA_AUTO, 0, &mba_rd, &mba_wr,
1, IVCL (RP), VEC_AUTO, { &mba0_inta }, IOLN_RP, 1, IVCL (RP), VEC_AUTO, { &mba0_inta }
}; };
UNIT mba0_unit = { UDATA (NULL, 0, 0) }; UNIT mba0_unit = { UDATA (NULL, 0, 0) };
@ -237,11 +235,9 @@ MTAB mba0_mod[] = {
{ 0 } { 0 }
}; };
#define IOLN_TU 040
DIB mba1_dib = { DIB mba1_dib = {
IOBA_AUTO, IOLN_TU, &mba_rd, &mba_wr, IOBA_AUTO, 0, &mba_rd, &mba_wr,
1, IVCL (TU), VEC_AUTO, { &mba1_inta }, IOLN_TU 1, IVCL (TU), VEC_AUTO, { &mba1_inta }
}; };
UNIT mba1_unit = { UDATA (NULL, 0, 0) }; UNIT mba1_unit = { UDATA (NULL, 0, 0) };
@ -272,11 +268,9 @@ MTAB mba1_mod[] = {
{ 0 } { 0 }
}; };
#define IOLN_RS 040
DIB mba2_dib = { DIB mba2_dib = {
IOBA_AUTO, IOLN_RS, &mba_rd, &mba_wr, IOBA_AUTO, 0, &mba_rd, &mba_wr,
1, IVCL (RS), VEC_AUTO, { &mba2_inta }, IOLN_RS 1, IVCL (RS), VEC_AUTO, { &mba2_inta }
}; };
UNIT mba2_unit = { UDATA (NULL, 0, 0) }; UNIT mba2_unit = { UDATA (NULL, 0, 0) };
@ -855,6 +849,7 @@ if (dptr->flags & DEV_DIS) { /* Disabling? */
uint32 mb = dibp->ba; uint32 mb = dibp->ba;
dibp->ba = MBA_AUTO; /* Flag unassigned */ dibp->ba = MBA_AUTO; /* Flag unassigned */
dibp->ulnt = dibp->lnt = 0;
mba_reset (&mba_dev[mb]); /* reset prior MBA */ mba_reset (&mba_dev[mb]); /* reset prior MBA */
} }
build_dib_tab(); build_dib_tab();
@ -874,7 +869,7 @@ if (dptr == NULL)
dibp = (DIB *) dptr->ctxt; dibp = (DIB *) dptr->ctxt;
if (dibp == NULL) if (dibp == NULL)
return SCPE_IERR; return SCPE_IERR;
fprintf (st, "Massbus adapter %d", dibp->ba); fprintf (st, "Massbus adapter %d (RH%c)", dibp->ba, 'A' + dibp->ba);
return SCPE_OK; return SCPE_OK;
} }
@ -923,13 +918,12 @@ if ((mbregR[idx] && dibp->rd && /* conflict? */
sim_dname (dptr), dibp->ba); sim_dname (dptr), dibp->ba);
return SCPE_STOP; return SCPE_STOP;
} }
if (dibp->rd) /* set rd dispatch */ mbregR[idx] = dibp->rd; /* set rd dispatch */
mbregR[idx] = dibp->rd; mbregW[idx] = dibp->wr; /* set wr dispatch */
if (dibp->wr) /* set wr dispatch */ mbabort[idx] = dibp->ack[0]; /* set abort dispatch */
mbregW[idx] = dibp->wr;
if (dibp->ack[0]) /* set abort dispatch */
mbabort[idx] = dibp->ack[0];
mba_dev[idx].flags &= ~DEV_DIS; /* mark MBA enabled */ mba_dev[idx].flags &= ~DEV_DIS; /* mark MBA enabled */
((DIB *)mba_dev[idx].ctxt)->lnt = dibp->lnt;
((DIB *)mba_dev[idx].ctxt)->ulnt = dibp->lnt;
return build_ubus_tab (&mba_dev[idx], (DIB *)mba_dev[idx].ctxt); return build_ubus_tab (&mba_dev[idx], (DIB *)mba_dev[idx].ctxt);
} }
@ -971,6 +965,8 @@ for (idx = active = 0; idx < MBA_NUM; idx++) {
break; break;
} }
} }
((DIB *)mba_dev[dibp->ba].ctxt)->lnt = dibp->lnt;
((DIB *)mba_dev[dibp->ba].ctxt)->ulnt = dibp->ulnt;
++active; ++active;
} }
} }
@ -981,15 +977,17 @@ const char *const text =
/*567901234567890123456789012345678901234567890123456789012345678901234567890*/ /*567901234567890123456789012345678901234567890123456789012345678901234567890*/
" RH70/RH11 Massbus adapters (RHA, RHB, RHC)\n" " RH70/RH11 Massbus adapters (RHA, RHB, RHC)\n"
"\n" "\n"
" The RH70/RH11 Massbus adapters interface Massbus peripherals to the memory\n" " The RH70/RH11 Massbus adapters interface Massbus peripherals to the\n"
" bus or Unibus of the CPU. The simulator provides three Massbus adapters.\n" " memory bus or Unibus of the CPU. The simulator provides three Massbus\n"
" The first, RHA, is configured for the RP family of disk drives. The\n" " adapters. These adapters (RHA, RHB, and RHC) are used by (in order):\n"
" second, RHB, is configured for the TU family of tape controllers. The\n" " 1) the RP family of disk drives.\n"
" third, RHC, is configured for the RS family of fixed head disks. By\n" " 2) the TU family of tape controllers.\n"
" default, RHA is enabled, and RHB and RHC are disabled. In a Unibus system,\n" " 3) the RS family of fixed head disks.\n"
" the RH adapters implement 22b addressing for the 11/70 and 18b addressing\n" " Depending on which of the RP, TU, and RS devices are enabled, will\n"
" for all other models. In a Qbus system, the RH adapters always implement\n" " determine which adapter is assigned to which device.\n"
" 22b addressing.\n" " In a Unibus system, the RH adapters implement 22b addressing for the\n"
" 11/70 and 18b addressing for all other models. In a Qbus system, the\n"
" RH adapters always implement 22b addressing.\n"
/*567901234567890123456789012345678901234567890123456789012345678901234567890*/ /*567901234567890123456789012345678901234567890123456789012345678901234567890*/
"\n"; "\n";
fprintf (st, "%s", text); fprintf (st, "%s", text);

View file

@ -595,7 +595,9 @@ const char *rp_description (DEVICE *dptr);
rp_mod RP modifier list rp_mod RP modifier list
*/ */
DIB rp_dib = { MBA_AUTO, 0, &rp_mbrd, &rp_mbwr, 0, 0, 0, { &rp_abort } }; #define IOLN_RP 054
DIB rp_dib = { MBA_AUTO, IOLN_RP, &rp_mbrd, &rp_mbwr, 0, 0, 0, { &rp_abort } };
UNIT rp_unit[] = { UNIT rp_unit[] = {
{ UDATA (&rp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_AUTO+ { UDATA (&rp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_AUTO+

View file

@ -197,7 +197,9 @@ const char *rs_description (DEVICE *dptr);
rs_mod RS modifier list rs_mod RS modifier list
*/ */
DIB rs_dib = { MBA_AUTO, 0, &rs_mbrd, &rs_mbwr, 0, 0, 0, { &rs_abort } }; #define IOLN_RS 034
DIB rs_dib = { MBA_AUTO, IOLN_RS, &rs_mbrd, &rs_mbwr, 0, 0, 0, { &rs_abort } };
UNIT rs_unit[] = { UNIT rs_unit[] = {
{ UDATA (&rs_svc, UNIT_FIX|UNIT_ATTABLE|UNIT_DISABLE|UNIT_AUTO| { UDATA (&rs_svc, UNIT_FIX|UNIT_ATTABLE|UNIT_DISABLE|UNIT_AUTO|

View file

@ -266,7 +266,8 @@ t_stat tu_map_err (int32 drv, t_stat st, t_bool qdt);
tu_mod TU modifier list tu_mod TU modifier list
*/ */
DIB tu_dib = { MBA_AUTO, 0, &tu_mbrd, &tu_mbwr,0, 0, 0, { &tu_abort } }; #define IOLN_TU 040
DIB tu_dib = { MBA_AUTO, IOLN_TU, &tu_mbrd, &tu_mbwr,0, 0, 0, { &tu_abort } };
UNIT tu_unit[] = { UNIT tu_unit[] = {
{ UDATA (&tu_svc, UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE, 0) }, { UDATA (&tu_svc, UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE, 0) },