PDP11: Fix RS device address window size and propagate that through to RH
As discussed in #396
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84f1e7104e
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4 changed files with 34 additions and 31 deletions
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@ -202,11 +202,9 @@ static int32 mba_mapofs[(MBA_OFSMASK + 1) >> 1] = {
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mbax_reg RHx register list
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mbax_reg RHx register list
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*/
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*/
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#define IOLN_RP 054
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DIB mba0_dib = {
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DIB mba0_dib = {
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IOBA_AUTO, IOLN_RP, &mba_rd, &mba_wr,
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IOBA_AUTO, 0, &mba_rd, &mba_wr,
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1, IVCL (RP), VEC_AUTO, { &mba0_inta }, IOLN_RP,
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1, IVCL (RP), VEC_AUTO, { &mba0_inta }
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};
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};
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UNIT mba0_unit = { UDATA (NULL, 0, 0) };
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UNIT mba0_unit = { UDATA (NULL, 0, 0) };
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@ -237,11 +235,9 @@ MTAB mba0_mod[] = {
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{ 0 }
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{ 0 }
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};
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};
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#define IOLN_TU 040
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DIB mba1_dib = {
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DIB mba1_dib = {
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IOBA_AUTO, IOLN_TU, &mba_rd, &mba_wr,
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IOBA_AUTO, 0, &mba_rd, &mba_wr,
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1, IVCL (TU), VEC_AUTO, { &mba1_inta }, IOLN_TU
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1, IVCL (TU), VEC_AUTO, { &mba1_inta }
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};
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};
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UNIT mba1_unit = { UDATA (NULL, 0, 0) };
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UNIT mba1_unit = { UDATA (NULL, 0, 0) };
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@ -272,11 +268,9 @@ MTAB mba1_mod[] = {
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{ 0 }
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{ 0 }
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};
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};
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#define IOLN_RS 040
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DIB mba2_dib = {
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DIB mba2_dib = {
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IOBA_AUTO, IOLN_RS, &mba_rd, &mba_wr,
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IOBA_AUTO, 0, &mba_rd, &mba_wr,
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1, IVCL (RS), VEC_AUTO, { &mba2_inta }, IOLN_RS
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1, IVCL (RS), VEC_AUTO, { &mba2_inta }
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};
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};
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UNIT mba2_unit = { UDATA (NULL, 0, 0) };
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UNIT mba2_unit = { UDATA (NULL, 0, 0) };
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@ -855,6 +849,7 @@ if (dptr->flags & DEV_DIS) { /* Disabling? */
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uint32 mb = dibp->ba;
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uint32 mb = dibp->ba;
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dibp->ba = MBA_AUTO; /* Flag unassigned */
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dibp->ba = MBA_AUTO; /* Flag unassigned */
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dibp->ulnt = dibp->lnt = 0;
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mba_reset (&mba_dev[mb]); /* reset prior MBA */
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mba_reset (&mba_dev[mb]); /* reset prior MBA */
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}
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}
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build_dib_tab();
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build_dib_tab();
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@ -874,7 +869,7 @@ if (dptr == NULL)
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dibp = (DIB *) dptr->ctxt;
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dibp = (DIB *) dptr->ctxt;
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if (dibp == NULL)
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if (dibp == NULL)
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return SCPE_IERR;
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return SCPE_IERR;
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fprintf (st, "Massbus adapter %d", dibp->ba);
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fprintf (st, "Massbus adapter %d (RH%c)", dibp->ba, 'A' + dibp->ba);
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return SCPE_OK;
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return SCPE_OK;
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}
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}
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@ -923,13 +918,12 @@ if ((mbregR[idx] && dibp->rd && /* conflict? */
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sim_dname (dptr), dibp->ba);
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sim_dname (dptr), dibp->ba);
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return SCPE_STOP;
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return SCPE_STOP;
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}
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}
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if (dibp->rd) /* set rd dispatch */
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mbregR[idx] = dibp->rd; /* set rd dispatch */
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mbregR[idx] = dibp->rd;
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mbregW[idx] = dibp->wr; /* set wr dispatch */
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if (dibp->wr) /* set wr dispatch */
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mbabort[idx] = dibp->ack[0]; /* set abort dispatch */
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mbregW[idx] = dibp->wr;
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if (dibp->ack[0]) /* set abort dispatch */
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mbabort[idx] = dibp->ack[0];
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mba_dev[idx].flags &= ~DEV_DIS; /* mark MBA enabled */
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mba_dev[idx].flags &= ~DEV_DIS; /* mark MBA enabled */
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((DIB *)mba_dev[idx].ctxt)->lnt = dibp->lnt;
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((DIB *)mba_dev[idx].ctxt)->ulnt = dibp->lnt;
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return build_ubus_tab (&mba_dev[idx], (DIB *)mba_dev[idx].ctxt);
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return build_ubus_tab (&mba_dev[idx], (DIB *)mba_dev[idx].ctxt);
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}
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}
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@ -971,6 +965,8 @@ for (idx = active = 0; idx < MBA_NUM; idx++) {
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break;
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break;
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}
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}
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}
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}
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((DIB *)mba_dev[dibp->ba].ctxt)->lnt = dibp->lnt;
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((DIB *)mba_dev[dibp->ba].ctxt)->ulnt = dibp->ulnt;
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++active;
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++active;
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}
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}
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}
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}
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@ -981,15 +977,17 @@ const char *const text =
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/*567901234567890123456789012345678901234567890123456789012345678901234567890*/
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/*567901234567890123456789012345678901234567890123456789012345678901234567890*/
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" RH70/RH11 Massbus adapters (RHA, RHB, RHC)\n"
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" RH70/RH11 Massbus adapters (RHA, RHB, RHC)\n"
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"\n"
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"\n"
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" The RH70/RH11 Massbus adapters interface Massbus peripherals to the memory\n"
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" The RH70/RH11 Massbus adapters interface Massbus peripherals to the\n"
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" bus or Unibus of the CPU. The simulator provides three Massbus adapters.\n"
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" memory bus or Unibus of the CPU. The simulator provides three Massbus\n"
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" The first, RHA, is configured for the RP family of disk drives. The\n"
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" adapters. These adapters (RHA, RHB, and RHC) are used by (in order):\n"
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" second, RHB, is configured for the TU family of tape controllers. The\n"
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" 1) the RP family of disk drives.\n"
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" third, RHC, is configured for the RS family of fixed head disks. By\n"
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" 2) the TU family of tape controllers.\n"
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" default, RHA is enabled, and RHB and RHC are disabled. In a Unibus system,\n"
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" 3) the RS family of fixed head disks.\n"
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" the RH adapters implement 22b addressing for the 11/70 and 18b addressing\n"
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" Depending on which of the RP, TU, and RS devices are enabled, will\n"
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" for all other models. In a Qbus system, the RH adapters always implement\n"
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" determine which adapter is assigned to which device.\n"
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" 22b addressing.\n"
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" In a Unibus system, the RH adapters implement 22b addressing for the\n"
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" 11/70 and 18b addressing for all other models. In a Qbus system, the\n"
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" RH adapters always implement 22b addressing.\n"
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/*567901234567890123456789012345678901234567890123456789012345678901234567890*/
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/*567901234567890123456789012345678901234567890123456789012345678901234567890*/
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"\n";
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"\n";
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fprintf (st, "%s", text);
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fprintf (st, "%s", text);
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@ -595,7 +595,9 @@ const char *rp_description (DEVICE *dptr);
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rp_mod RP modifier list
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rp_mod RP modifier list
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*/
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*/
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DIB rp_dib = { MBA_AUTO, 0, &rp_mbrd, &rp_mbwr, 0, 0, 0, { &rp_abort } };
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#define IOLN_RP 054
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DIB rp_dib = { MBA_AUTO, IOLN_RP, &rp_mbrd, &rp_mbwr, 0, 0, 0, { &rp_abort } };
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UNIT rp_unit[] = {
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UNIT rp_unit[] = {
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{ UDATA (&rp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_AUTO+
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{ UDATA (&rp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_AUTO+
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@ -197,7 +197,9 @@ const char *rs_description (DEVICE *dptr);
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rs_mod RS modifier list
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rs_mod RS modifier list
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*/
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*/
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DIB rs_dib = { MBA_AUTO, 0, &rs_mbrd, &rs_mbwr, 0, 0, 0, { &rs_abort } };
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#define IOLN_RS 034
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DIB rs_dib = { MBA_AUTO, IOLN_RS, &rs_mbrd, &rs_mbwr, 0, 0, 0, { &rs_abort } };
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UNIT rs_unit[] = {
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UNIT rs_unit[] = {
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{ UDATA (&rs_svc, UNIT_FIX|UNIT_ATTABLE|UNIT_DISABLE|UNIT_AUTO|
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{ UDATA (&rs_svc, UNIT_FIX|UNIT_ATTABLE|UNIT_DISABLE|UNIT_AUTO|
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@ -266,7 +266,8 @@ t_stat tu_map_err (int32 drv, t_stat st, t_bool qdt);
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tu_mod TU modifier list
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tu_mod TU modifier list
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*/
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*/
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DIB tu_dib = { MBA_AUTO, 0, &tu_mbrd, &tu_mbwr,0, 0, 0, { &tu_abort } };
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#define IOLN_TU 040
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DIB tu_dib = { MBA_AUTO, IOLN_TU, &tu_mbrd, &tu_mbwr,0, 0, 0, { &tu_abort } };
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UNIT tu_unit[] = {
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UNIT tu_unit[] = {
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{ UDATA (&tu_svc, UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE, 0) },
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{ UDATA (&tu_svc, UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE, 0) },
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