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Generalized sim_debug_u16 into sim_debug_bits and added support to display bit fields of variable size as well as bit states.

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This commit is contained in:
Mark Pizzolato 2012-12-04 09:32:40 -08:00
parent c90bdf935a
commit bcf0e8b19c
4 changed files with 79 additions and 24 deletions
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33
PDP11/pdp11_xq.c
View file

@ -518,19 +518,22 @@ const char* const xqt_xmit_regnames[] = {
"IBAL", "IBAH", "ICR", "", "SRQR", "", "", "ARQR"
};
const char* const xq_csr_bits[] = {
"RE", "SR", "NI", "BD", "XL", "RL", "IE", "XI",
"IL", "EL", "SE", "RR", "OK", "CA", "PE", "RI"
BITFIELD xq_csr_bits[] = {
BIT(RE), BIT(SR), BIT(NI), BIT(BD), BIT(XL), BIT(RL), BIT(IE), BIT(XI),
BIT(IL), BIT(EL), BIT(SE), BIT(RR), BIT(OK), BIT(CA), BIT(PE), BIT(RI),
ENDBITS
};
const char* const xq_var_bits[] = {
"ID", "RR", "V0", "V1", "V2", "V3", "V4", "V5",
"V6", "V7", "S1", "S2", "S3", "RS", "OS", "MS"
BITFIELD xq_var_bits[] = {
BIT(ID), BIT(RR), BIT(V0), BIT(V1), BIT(V2), BIT(V3), BIT(V4), BIT(V5),
BIT(V6), BIT(V7), BIT(S1), BIT(S2), BIT(S3), BIT(RS), BIT(OS), BIT(MS),
ENDBITS
};
const char* const xq_srr_bits[] = {
"RS0", "RS1", "", "", "", "", "", "",
"", "TBL", "IME", "PAR", "NXM", "", "CHN", "FES"
BITFIELD xq_srr_bits[] = {
BIT(RS0), BIT(RS1), BITNC, BITNC, BITNC, BITNC, BITNC, BITNC,
BITNC, BIT(TBL), BIT(IME), BIT(PAR), BIT(NXM), BITNC, BIT(CHN), BIT(FES),
ENDBITS
};
/* internal debugging routines */
@ -926,16 +929,16 @@ t_stat xq_rd(int32* data, int32 PA, int32 access)
break;
case 6:
if (xq->var->mode != XQ_T_DELQA_PLUS) {
sim_debug_u16(DBG_VAR, xq->dev, xq_var_bits, xq->var->var, xq->var->var, 0);
sim_debug (DBG_VAR, xq->dev, ", vec = 0%o\n", (xq->var->var & XQ_VEC_IV));
sim_debug_bits(DBG_VAR, xq->dev, xq_var_bits, xq->var->var, xq->var->var, 0);
sim_debug (DBG_VAR, xq->dev, ", vec = 0%o\n", (xq->var->var & XQ_VEC_IV));
*data = xq->var->var;
} else {
sim_debug_u16(DBG_VAR, xq->dev, xq_srr_bits, xq->var->srr, xq->var->srr, 0);
sim_debug_bits(DBG_VAR, xq->dev, xq_srr_bits, xq->var->srr, xq->var->srr, 0);
*data = xq->var->srr;
}
break;
case 7:
sim_debug_u16(DBG_CSR, xq->dev, xq_csr_bits, xq->var->csr, xq->var->csr, 1);
sim_debug_bits(DBG_CSR, xq->dev, xq_csr_bits, xq->var->csr, xq->var->csr, 1);
*data = xq->var->csr;
break;
}
@ -1991,7 +1994,7 @@ t_stat xq_wr_var(CTLR* xq, int32 data)
else
xq->dib->vec = 0;
sim_debug_u16(DBG_VAR, xq->dev, xq_var_bits, save_var, xq->var->var, 1);
sim_debug_bits(DBG_VAR, xq->dev, xq_var_bits, save_var, xq->var->var, 1);
return SCPE_OK;
}
@ -2839,7 +2842,7 @@ void xq_csr_set_clr (CTLR* xq, uint16 set_bits, uint16 clear_bits)
/* set the bits in the csr */
xq->var->csr = (xq->var->csr | set_bits) & ~clear_bits;
sim_debug_u16(DBG_CSR, xq->dev, xq_csr_bits, saved_csr, xq->var->csr, 1);
sim_debug_bits(DBG_CSR, xq->dev, xq_csr_bits, saved_csr, xq->var->csr, 1);
/* check and correct the state of controller interrupt */

44
scp.c
View file

@ -5860,19 +5860,49 @@ if (!debug_unterm) {
}
/* Prints state of a register: bit translation + state (0,1,_,^)
indicating the state and transition of the bit. States:
indicating the state and transition of the bit and bitfields. States:
0=steady(0->0), 1=steady(1->1), _=falling(1->0), ^=rising(0->1) */
void sim_debug_u16(uint32 dbits, DEVICE* dptr, const char* const* bitdefs,
uint16 before, uint16 after, int terminate)
void sim_debug_bits(uint32 dbits, DEVICE* dptr, BITFIELD* bitdefs,
uint32 before, uint32 after, int terminate)
{
if (sim_deb && (dptr->dctrl & dbits)) {
int32 i;
int32 i, fields, offset;
uint32 value, beforevalue, mask;
for (fields=offset=0; bitdefs[fields].name; ++fields) {
if (bitdefs[fields].offset == -1) /* fixup uninitialized offsets */
bitdefs[fields].offset = offset;
offset += bitdefs[fields].width;
}
sim_debug_prefix(dbits, dptr); /* print prefix if required */
for (i = 15; i >= 0; i--) { /* print xlation, transition */
int off = ((after >> i) & 1) + (((before ^ after) >> i) & 1) * 2;
fprintf(sim_deb, "%s%c ", bitdefs[i], debug_bstates[off]);
for (i = fields-1; i >= 0; i--) { /* print xlation, transition */
if (bitdefs[i].name[0] == '\0')
continue;
if ((bitdefs[i].width == 1) && (bitdefs[i].valuenames == NULL)) {
int off = ((after >> bitdefs[i].offset) & 1) + (((before ^ after) >> i) & 1) * 2;
fprintf(sim_deb, "%s%c ", bitdefs[i].name, debug_bstates[off]);
}
else {
char *delta = "";
mask = 0xFFFFFFFF >> (32-bitdefs[i].width);
value = ((after >> bitdefs[i].offset) & mask) + (((before ^ after) >> bitdefs[i].offset) & mask) * 2;
beforevalue = ((before >> bitdefs[i].offset) & mask);
if (value < beforevalue)
delta = "_";
if (value > beforevalue)
delta = "^";
if (bitdefs[i].valuenames)
fprintf(sim_deb, "%s=%s%s ", bitdefs[i].name, delta, bitdefs[i].valuenames[value]);
else
if (bitdefs[i].format) {
fprintf(sim_deb, "%s=%s", bitdefs[i].name, delta, value);
fprintf(sim_deb, bitdefs[i].format, value);
}
else
fprintf(sim_deb, "%s=%s0x%X ", bitdefs[i].name, delta, value);
}
}
if (terminate)
fprintf(sim_deb, "\r\n");

4
scp.h
View file

@ -125,8 +125,8 @@ char *match_ext (char *fnam, char *ext);
const char *sim_error_text (t_stat stat);
t_stat sim_string_to_stat (char *cptr, t_stat *cond);
t_stat sim_cancel_step (void);
void sim_debug_u16 (uint32 dbits, DEVICE* dptr, const char* const* bitdefs,
uint16 before, uint16 after, int terminate);
void sim_debug_bits (uint32 dbits, DEVICE* dptr, BITFIELD* bitdefs,
uint32 before, uint32 after, int terminate);
#if defined (__DECC) && defined (__VMS) && (defined (__VAX) || (__DECC_VER < 60590001))
#define CANT_USE_MACRO_VA_ARGS 1
#endif

22
sim_defs.h
View file

@ -506,6 +506,14 @@ struct sim_debtab {
#define DEBUG_PRI(d,m) (sim_deb && (d.dctrl & (m)))
#define DEBUG_PRJ(d,m) (sim_deb && (d->dctrl & (m)))
struct sim_bitfield {
char *name; /* field name */
uint32 offset; /* starting bit */
uint32 width; /* width */
char **valuenames; /* map of values to strings */
char *format; /* value format string */
};
/* File Reference */
struct sim_fileref {
char name[CBUFSIZE]; /* file name */
@ -526,6 +534,12 @@ struct sim_fileref {
#define BRDATA(nm,loc,rdx,wd,dep) #nm, (loc), (rdx), (wd), 0, (dep)
#define URDATA(nm,loc,rdx,wd,off,dep,fl) \
#nm, &(loc), (rdx), (wd), (off), (dep), ((fl) | REG_UNIT)
#define BIT(nm) {#nm, -1, 1}
#define BITNC {"", -1, 1}
#define BITF(nm,sz) {#nm, -1, sz}
#define BITNCF(sz) {"", -1, sz}
#define BITFFMT(nm,sz,fmt) {#nm, -1, sz, NULL, #fmt}
#define BITFNAM(nm,sz,names) {#nm, -1, sz, names}
#else
#define ORDATA(nm,loc,wd) "nm", &(loc), 8, (wd), 0, 1
#define DRDATA(nm,loc,wd) "nm", &(loc), 10, (wd), 0, 1
@ -535,7 +549,14 @@ struct sim_fileref {
#define BRDATA(nm,loc,rdx,wd,dep) "nm", (loc), (rdx), (wd), 0, (dep)
#define URDATA(nm,loc,rdx,wd,off,dep,fl) \
"nm", &(loc), (rdx), (wd), (off), (dep), ((fl) | REG_UNIT)
#define BIT(nm) {"nm", -1, 1}
#define BITNC {"", -1, 1}
#define BITF(nm,sz) {"nm", -1, sz}
#define BITNCF(sz) {"", -1, sz}
#define BITFFMT(nm,sz,fmt) {"nm", -1, sz, NULL, "fmt"}
#define BITFNAM(nm,sz,names) {"nm", -1, sz, names}
#endif
#define ENDBITS {NULL} /* end of bitfield list */
/* Typedefs for principal structures */
@ -550,6 +571,7 @@ typedef struct sim_schtab SCHTAB;
typedef struct sim_brktab BRKTAB;
typedef struct sim_debtab DEBTAB;
typedef struct sim_fileref FILEREF;
typedef struct sim_bitfield BITFIELD;
/* Function prototypes */