Fix of Big Endian DELQA-T issue

This commit is contained in:
Mark Pizzolato 2013-03-22 17:39:53 -07:00
parent 7217f60a5f
commit be270bb9c1

View file

@ -2290,9 +2290,9 @@ t_stat xq_wr_srqr(CTLR* xq, int32 data)
uint32 saved_debug = xq->dev->dctrl; uint32 saved_debug = xq->dev->dctrl;
/* Correct byte ordering of non word fields for Big Endian platforms */ /* Correct byte ordering of non word fields for Big Endian platforms */
sim_buf_swap_data (xq->var->init.phys, sizeof(uint16), sizeof(xq->var->init.phys)); sim_buf_swap_data (xq->var->init.phys, sizeof(uint16), sizeof(xq->var->init.phys)/sizeof(uint16));
sim_buf_swap_data (xq->var->init.hash_filter, sizeof(uint16), sizeof(xq->var->init.hash_filter)); sim_buf_swap_data (xq->var->init.hash_filter, sizeof(uint16), sizeof(xq->var->init.hash_filter)/sizeof(uint16));
sim_buf_swap_data (xq->var->init.bootpassword, sizeof(uint16), sizeof(xq->var->init.bootpassword)); sim_buf_swap_data (xq->var->init.bootpassword, sizeof(uint16), sizeof(xq->var->init.bootpassword)/sizeof(uint16));
/* temporarily turn on Ethernet debugging if setup debugging is enabled */ /* temporarily turn on Ethernet debugging if setup debugging is enabled */
if (xq->dev->dctrl & DBG_SET) if (xq->dev->dctrl & DBG_SET)