SDS: Clean up CPU modes and record CPU mode in instruction history record
The three CPU modes -- normal, monitor and user were represented by two binary flags (nml_mode and usr_mode). The code is simpler and easier to read if the three modes are represented by one three-valued variable, cpu_mode. In addition, record the CPU mode in the instruction history record, and add the mode to the history display. In addition, add an optional flag to the SET CPU HISTORY=n command to *not* record instructions executed in a particular CPU mode. Flags are -n, -m and -u for normal, monitor and user mode respectively. For example, SET -m CPU HISTORY=n will only record instructions executed in normal or user mode, and will not record instructions executed in monitor mode. This change aids user-mode program debugging by not filling the history with monitor-mode service functions and interrupt activity.
This commit is contained in:
parent
be18514beb
commit
bf06cb4f87
3 changed files with 88 additions and 70 deletions
147
SDS/sds_cpu.c
147
SDS/sds_cpu.c
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@ -39,8 +39,9 @@
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X<0:23> X (index) register
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X<0:23> X (index) register
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OV overflow indicator
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OV overflow indicator
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P<0:13> program counter
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P<0:13> program counter
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nml_mode compatible (1) vs 940 (0) mode
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cpu_mode SDS 930 normal (compatible) mode (0)
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usr_mode user (1) vs monitor (0) mode
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SDS 940 monitor mode (1)
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SDS 940 user mode (2)
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RL1<0:23> user map low
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RL1<0:23> user map low
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RL2<0:23> user map high
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RL2<0:23> user map high
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RL4<12:23> monitor map high
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RL4<12:23> monitor map high
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@ -168,8 +169,7 @@ uint32 int_reqhi = 0; /* highest int request *
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uint32 api_lvl = 0; /* api active */
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uint32 api_lvl = 0; /* api active */
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uint32 api_lvlhi = 0; /* highest api active */
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uint32 api_lvlhi = 0; /* highest api active */
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t_bool chan_req; /* chan request */
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t_bool chan_req; /* chan request */
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uint32 nml_mode = 1; /* normal mode */
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uint32 cpu_mode = NML_MODE; /* normal mode */
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uint32 usr_mode = 0; /* user mode */
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uint32 mon_usr_trap = 0; /* mon-user trap */
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uint32 mon_usr_trap = 0; /* mon-user trap */
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uint32 EM2 = 2, EM3 = 3; /* extension registers */
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uint32 EM2 = 2, EM3 = 3; /* extension registers */
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uint32 RL1, RL2, RL4; /* relocation maps */
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uint32 RL1, RL2, RL4; /* relocation maps */
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@ -190,6 +190,7 @@ int32 pcq_p = 0; /* PC queue ptr */
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REG *pcq_r = NULL; /* PC queue reg ptr */
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REG *pcq_r = NULL; /* PC queue reg ptr */
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int32 hst_p = 0; /* history pointer */
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int32 hst_p = 0; /* history pointer */
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int32 hst_lnt = 0; /* history length */
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int32 hst_lnt = 0; /* history length */
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uint32 hst_exclude = BAD_MODE; /* cpu_mode excluded from history */
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InstHistory *hst = NULL; /* instruction history */
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InstHistory *hst = NULL; /* instruction history */
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int32 rtc_pie = 0; /* rtc pulse ie */
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int32 rtc_pie = 0; /* rtc pulse ie */
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int32 rtc_tps = 60; /* rtc ticks/sec */
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int32 rtc_tps = 60; /* rtc ticks/sec */
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@ -251,8 +252,7 @@ REG cpu_reg[] = {
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{ ORDATA (RL1, RL1, 24) },
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{ ORDATA (RL1, RL1, 24) },
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{ ORDATA (RL2, RL2, 24) },
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{ ORDATA (RL2, RL2, 24) },
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{ ORDATA (RL4, RL4, 12) },
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{ ORDATA (RL4, RL4, 12) },
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{ FLDATA (NML, nml_mode, 0) },
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{ ORDATA (MODE, cpu_mode, 2) },
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{ FLDATA (USR, usr_mode, 0) },
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{ FLDATA (MONUSR, mon_usr_trap, 0) },
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{ FLDATA (MONUSR, mon_usr_trap, 0) },
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{ FLDATA (ION, ion, 0) },
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{ FLDATA (ION, ion, 0) },
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{ FLDATA (INTDEF, ion_defer, 0) },
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{ FLDATA (INTDEF, ion_defer, 0) },
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@ -402,14 +402,14 @@ while (reason == 0) { /* loop until halted */
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break;
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break;
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}
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}
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tinst = ReadP (pa); /* get inst */
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tinst = ReadP (pa); /* get inst */
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save_mode = usr_mode; /* save mode */
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save_mode = cpu_mode; /* save mode */
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usr_mode = 0; /* switch to mon */
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cpu_mode = MON_MODE; /* switch to mon */
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if (hst_lnt) /* record inst */
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if (hst_lnt) /* record inst */
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inst_hist (tinst, P, HIST_INT);
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inst_hist (tinst, P, HIST_INT);
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if (pa != VEC_RTCP) { /* normal intr? */
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if (pa != VEC_RTCP) { /* normal intr? */
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tr = one_inst (tinst, P, save_mode); /* exec intr inst */
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tr = one_inst (tinst, P, save_mode); /* exec intr inst */
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if (tr) { /* stop code? */
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if (tr) { /* stop code? */
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usr_mode = save_mode; /* restore mode */
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cpu_mode = save_mode; /* restore mode */
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reason = (tr > 0)? tr: STOP_MMINT;
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reason = (tr > 0)? tr: STOP_MMINT;
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break;
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break;
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}
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}
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@ -418,7 +418,7 @@ while (reason == 0) { /* loop until halted */
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}
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}
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else { /* clock intr */
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else { /* clock intr */
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tr = rtc_inst (tinst); /* exec RTC inst */
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tr = rtc_inst (tinst); /* exec RTC inst */
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usr_mode = save_mode; /* restore mode */
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cpu_mode = save_mode; /* restore mode */
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if (tr) { /* stop code? */
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if (tr) { /* stop code? */
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reason = (tr > 0)? tr: STOP_MMINT;
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reason = (tr > 0)? tr: STOP_MMINT;
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break;
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break;
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@ -429,14 +429,12 @@ while (reason == 0) { /* loop until halted */
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}
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}
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else { /* normal instr */
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else { /* normal instr */
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if (sim_brk_summ) {
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if (sim_brk_summ) {
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uint32 btyp = SWMASK ('E');
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static uint32 bmask[] = {SWMASK ('E') | SWMASK ('N'),
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SWMASK ('E') | SWMASK ('M'),
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SWMASK ('E') | SWMASK ('U')};
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uint32 btyp;
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if (nml_mode)
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btyp = sim_brk_test (P, bmask[cpu_mode]);
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btyp = SWMASK ('E') | SWMASK ('N');
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else
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btyp = usr_mode ? SWMASK ('E') | SWMASK ('U')
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: SWMASK ('E') | SWMASK ('M');
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btyp = sim_brk_test (P, btyp);
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if (btyp) {
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if (btyp) {
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if (btyp & SWMASK ('E')) /* unqualified breakpoint? */
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if (btyp & SWMASK ('E')) /* unqualified breakpoint? */
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reason = STOP_IBKPT; /* stop simulation */
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reason = STOP_IBKPT; /* stop simulation */
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@ -460,7 +458,7 @@ while (reason == 0) { /* loop until halted */
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ion_defer = 0; /* clear ion */
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ion_defer = 0; /* clear ion */
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if (hst_lnt)
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if (hst_lnt)
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inst_hist (inst, save_P, HIST_XCT);
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inst_hist (inst, save_P, HIST_XCT);
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reason = one_inst (inst, save_P, usr_mode); /* exec inst */
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reason = one_inst (inst, save_P, cpu_mode); /* exec inst */
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if (reason > 0) { /* stop code? */
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if (reason > 0) { /* stop code? */
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if (reason != STOP_HALT)
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if (reason != STOP_HALT)
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P = save_P;
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P = save_P;
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@ -478,14 +476,14 @@ while (reason == 0) { /* loop until halted */
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reason = STOP_TRPINS; /* fatal err */
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reason = STOP_TRPINS; /* fatal err */
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break;
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break;
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}
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}
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save_mode = usr_mode; /* save mode */
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save_mode = cpu_mode; /* save mode */
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usr_mode = 0; /* switch to mon */
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cpu_mode = MON_MODE; /* switch to mon */
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mon_usr_trap = 0;
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mon_usr_trap = 0;
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if (hst_lnt)
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if (hst_lnt)
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inst_hist (tinst, save_P, HIST_TRP);
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inst_hist (tinst, save_P, HIST_TRP);
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tr = one_inst (tinst, save_P, save_mode); /* trap inst */
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tr = one_inst (tinst, save_P, save_mode); /* trap inst */
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if (tr) { /* stop code? */
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if (tr) { /* stop code? */
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usr_mode = save_mode; /* restore mode */
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cpu_mode = save_mode; /* restore mode */
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P = save_P; /* restore PC */
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P = save_P; /* restore PC */
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reason = (tr > 0)? tr: STOP_MMTRP;
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reason = (tr > 0)? tr: STOP_MMTRP;
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break;
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break;
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@ -514,26 +512,29 @@ EXU_LOOP:
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op = I_GETOP (inst); /* get opcode */
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op = I_GETOP (inst); /* get opcode */
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if (inst & I_POP) { /* POP? */
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if (inst & I_POP) { /* POP? */
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dat = (EM3 << 18) | (EM2 << 15) | I_IND | pc; /* data to save */
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dat = (EM3 << 18) | (EM2 << 15) | I_IND | pc; /* data to save */
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if (nml_mode) { /* normal mode? */
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switch (cpu_mode)
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{
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case NML_MODE:
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dat = (OV << 23) | dat; /* ov in <0> */
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dat = (OV << 23) | dat; /* ov in <0> */
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WriteP (0, dat);
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WriteP (0, dat);
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}
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break;
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else if (usr_mode) { /* user mode? */
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case USR_MODE:
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if (inst & I_USR) { /* SYSPOP? */
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if (inst & I_USR) { /* SYSPOP? */
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dat = I_USR | (OV << 21) | dat; /* ov in <2> */
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dat = I_USR | (OV << 21) | dat; /* ov in <2> */
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WriteP (0, dat);
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WriteP (0, dat);
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usr_mode = 0; /* set mon mode */
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cpu_mode = MON_MODE; /* set mon mode */
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}
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}
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else { /* normal POP */
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else { /* normal POP */
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dat = (OV << 23) | dat; /* ov in <0> */
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dat = (OV << 23) | dat; /* ov in <0> */
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if ((r = Write (0, dat)))
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if ((r = Write (0, dat)))
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return r;
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return r;
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}
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}
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}
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break;
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else { /* mon mode */
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case MON_MODE:
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dat = (OV << 21) | dat; /* ov in <2> */
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dat = (OV << 21) | dat; /* ov in <2> */
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WriteP (0, dat); /* store return */
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WriteP (0, dat); /* store return */
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}
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break;
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}
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PCQ_ENTRY; /* save PC */
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PCQ_ENTRY; /* save PC */
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P = 0100 | op; /* new PC */
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P = 0100 | op; /* new PC */
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OV = 0; /* clear ovflo */
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OV = 0; /* clear ovflo */
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@ -589,7 +590,7 @@ switch (op) { /* case on opcode */
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case EAX:
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case EAX:
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if ((r = Ea (inst, &va))) /* decode eff addr */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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return r;
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return r;
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if (nml_mode || usr_mode) /* normal or user? */
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if (cpu_mode != MON_MODE) /* normal or user? */
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X = (X & ~VA_MASK) | (va & VA_MASK); /* only 14b */
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X = (X & ~VA_MASK) | (va & VA_MASK); /* only 14b */
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else X = (X & ~XVA_MASK) | (va & XVA_MASK); /* mon, 15b */
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else X = (X & ~XVA_MASK) | (va & XVA_MASK); /* mon, 15b */
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break;
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break;
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@ -786,7 +787,7 @@ switch (op) { /* case on opcode */
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break;
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break;
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case HLT:
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case HLT:
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if (!nml_mode && usr_mode) /* priv inst */
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if (cpu_mode == USR_MODE) /* priv inst */
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return MM_PRVINS;
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return MM_PRVINS;
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return STOP_HALT; /* halt CPU */
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return STOP_HALT; /* halt CPU */
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@ -802,15 +803,16 @@ switch (op) { /* case on opcode */
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goto EXU_LOOP;
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goto EXU_LOOP;
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case BRU:
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case BRU:
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if (nml_mode && (inst & I_IND)) api_dismiss (); /* normal BRU*, dism */
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if ((cpu_mode == NML_MODE) && (inst & I_IND))
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api_dismiss (); /* normal-mode BRU*, dism */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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return r;
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return r;
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if ((r = Read (va, &dat))) /* get operand */
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if ((r = Read (va, &dat))) /* get operand */
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return r;
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return r;
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PCQ_ENTRY;
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PCQ_ENTRY;
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P = va & VA_MASK; /* branch */
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P = va & VA_MASK; /* branch */
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if ((va & VA_USR) && !nml_mode && !usr_mode) { /* user ref from mon. mode? */
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if ((va & VA_USR) && (cpu_mode == MON_MODE)) { /* user ref from mon. mode? */
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usr_mode = 1; /* transition to user mode */
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cpu_mode = USR_MODE; /* transition to user mode */
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if (mon_usr_trap)
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if (mon_usr_trap)
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return MM_MONUSR;
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return MM_MONUSR;
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}
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}
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@ -825,8 +827,8 @@ switch (op) { /* case on opcode */
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return r;
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return r;
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PCQ_ENTRY;
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PCQ_ENTRY;
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P = va & VA_MASK; /* branch */
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P = va & VA_MASK; /* branch */
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if ((va & VA_USR) && !nml_mode && !usr_mode) { /* user ref from mon. mode? */
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if ((va & VA_USR) && (cpu_mode == MON_MODE)) { /* user ref from mon. mode? */
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usr_mode = 1; /* transition to user mode */
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cpu_mode = USR_MODE; /* transition to user mode */
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if (mon_usr_trap)
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if (mon_usr_trap)
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return MM_MONUSR;
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return MM_MONUSR;
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}
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}
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@ -837,15 +839,15 @@ switch (op) { /* case on opcode */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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return r;
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return r;
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dat = (EM3 << 18) | (EM2 << 15) | pc; /* form return word */
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dat = (EM3 << 18) | (EM2 << 15) | pc; /* form return word */
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if (!nml_mode && !usr_mode) /* monitor mode? */
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if (cpu_mode == MON_MODE) /* monitor mode? */
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dat = dat | (mode << 23) | (OV << 21);
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dat = dat | ((mode == USR_MODE) << 23) | (OV << 21);
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else dat = dat | (OV << 23); /* normal or user */
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else dat = dat | (OV << 23); /* normal or user */
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if ((r = Write (va, dat))) /* write ret word */
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if ((r = Write (va, dat))) /* write ret word */
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return r;
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return r;
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PCQ_ENTRY;
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PCQ_ENTRY;
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P = (va + 1) & VA_MASK; /* branch */
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P = (va + 1) & VA_MASK; /* branch */
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if ((va & VA_USR) && !nml_mode && !usr_mode) { /* user ref from mon. mode? */
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if ((va & VA_USR) && (cpu_mode == MON_MODE)) { /* user ref from mon. mode? */
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usr_mode = 1; /* transition to user mode */
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cpu_mode = USR_MODE; /* transition to user mode */
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if (mon_usr_trap)
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if (mon_usr_trap)
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return MM_MONUSR;
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return MM_MONUSR;
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}
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}
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return r;
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return r;
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PCQ_ENTRY;
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PCQ_ENTRY;
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P = (dat + 1) & VA_MASK; /* branch */
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P = (dat + 1) & VA_MASK; /* branch */
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if (!nml_mode && !usr_mode) { /* monitor mode? */
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if (cpu_mode == MON_MODE) { /* monitor mode? */
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OV = OV | ((dat >> 21) & 1); /* restore OV */
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OV = OV | ((dat >> 21) & 1); /* restore OV */
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if ((va & VA_USR) | (dat & I_USR)) { /* mode change? */
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if ((va & VA_USR) | (dat & I_USR)) { /* mode change? */
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usr_mode = 1;
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cpu_mode = USR_MODE;
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if (mon_usr_trap)
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if (mon_usr_trap)
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return MM_MONUSR;
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return MM_MONUSR;
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}
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}
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@ -870,7 +872,7 @@ switch (op) { /* case on opcode */
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break;
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break;
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case BRI:
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case BRI:
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if (!nml_mode && usr_mode) /* priv inst */
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if (cpu_mode == USR_MODE) /* priv inst */
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return MM_PRVINS;
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return MM_PRVINS;
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if ((r = Ea (inst, &va))) /* decode eff addr */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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return r;
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return r;
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@ -879,10 +881,10 @@ switch (op) { /* case on opcode */
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api_dismiss (); /* dismiss hi api */
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api_dismiss (); /* dismiss hi api */
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PCQ_ENTRY;
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PCQ_ENTRY;
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P = dat & VA_MASK; /* branch */
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P = dat & VA_MASK; /* branch */
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if (!nml_mode) { /* monitor mode? */
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if (cpu_mode == MON_MODE) { /* monitor mode? */
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OV = (dat >> 21) & 1; /* restore OV */
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OV = (dat >> 21) & 1; /* restore OV */
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if ((va & VA_USR) | (dat & I_USR)) { /* mode change? */
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if ((va & VA_USR) | (dat & I_USR)) { /* mode change? */
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usr_mode = 1;
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cpu_mode = USR_MODE;
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if (mon_usr_trap)
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if (mon_usr_trap)
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return MM_MONUSR;
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return MM_MONUSR;
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}
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}
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@ -1022,7 +1024,7 @@ switch (op) { /* case on opcode */
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/* I/O instructions */
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/* I/O instructions */
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case MIW: case MIY:
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case MIW: case MIY:
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if (!nml_mode && usr_mode) /* priv inst */
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if (cpu_mode == USR_MODE) /* priv inst */
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return MM_PRVINS;
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return MM_PRVINS;
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if ((r = Ea (inst, &va))) /* decode eff addr */
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if ((r = Ea (inst, &va))) /* decode eff addr */
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return r;
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return r;
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@ -1035,7 +1037,7 @@ switch (op) { /* case on opcode */
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break;
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break;
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|
|
||||||
case WIM: case YIM:
|
case WIM: case YIM:
|
||||||
if (!nml_mode && usr_mode) /* priv inst */
|
if (cpu_mode == USR_MODE) /* priv inst */
|
||||||
return MM_PRVINS;
|
return MM_PRVINS;
|
||||||
if ((r = Ea (inst, &va))) /* decode eff addr */
|
if ((r = Ea (inst, &va))) /* decode eff addr */
|
||||||
return r;
|
return r;
|
||||||
|
@ -1048,7 +1050,7 @@ switch (op) { /* case on opcode */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EOM: case EOD:
|
case EOM: case EOD:
|
||||||
if (!nml_mode && usr_mode) /* priv inst */
|
if (cpu_mode == USR_MODE) /* priv inst */
|
||||||
return MM_PRVINS;
|
return MM_PRVINS;
|
||||||
if ((r = op_eomd (inst))) /* process inst */
|
if ((r = op_eomd (inst))) /* process inst */
|
||||||
return r;
|
return r;
|
||||||
|
@ -1058,7 +1060,7 @@ switch (op) { /* case on opcode */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case POT:
|
case POT:
|
||||||
if (!nml_mode && usr_mode) /* priv inst */
|
if (cpu_mode == USR_MODE) /* priv inst */
|
||||||
return MM_PRVINS;
|
return MM_PRVINS;
|
||||||
if ((r = Ea (inst, &va))) /* decode eff addr */
|
if ((r = Ea (inst, &va))) /* decode eff addr */
|
||||||
return r;
|
return r;
|
||||||
|
@ -1071,7 +1073,7 @@ switch (op) { /* case on opcode */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case PIN:
|
case PIN:
|
||||||
if (!nml_mode && usr_mode) /* priv inst */
|
if (cpu_mode == USR_MODE) /* priv inst */
|
||||||
return MM_PRVINS;
|
return MM_PRVINS;
|
||||||
if ((r = Ea (inst, &va))) /* decode eff addr */
|
if ((r = Ea (inst, &va))) /* decode eff addr */
|
||||||
return r;
|
return r;
|
||||||
|
@ -1084,7 +1086,7 @@ switch (op) { /* case on opcode */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case SKS:
|
case SKS:
|
||||||
if (!nml_mode && usr_mode) /* priv inst */
|
if (cpu_mode == USR_MODE) /* priv inst */
|
||||||
return MM_PRVINS;
|
return MM_PRVINS;
|
||||||
if ((r = op_sks (inst, &dat))) /* process inst */
|
if ((r = op_sks (inst, &dat))) /* process inst */
|
||||||
return r;
|
return r;
|
||||||
|
@ -1093,7 +1095,7 @@ switch (op) { /* case on opcode */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
if (!nml_mode && usr_mode) /* priv inst */
|
if (cpu_mode == USR_MODE) /* priv inst */
|
||||||
return MM_PRVINS;
|
return MM_PRVINS;
|
||||||
CRETINS; /* invalid inst */
|
CRETINS; /* invalid inst */
|
||||||
break;
|
break;
|
||||||
|
@ -1160,7 +1162,7 @@ t_stat Read (uint32 va, uint32 *dat)
|
||||||
{
|
{
|
||||||
uint32 pgn, map, pa;
|
uint32 pgn, map, pa;
|
||||||
|
|
||||||
if (nml_mode) { /* normal? */
|
if (cpu_mode == NML_MODE) { /* normal? */
|
||||||
va = va & VA_MASK; /* ignore user */
|
va = va & VA_MASK; /* ignore user */
|
||||||
if (va < 020000) /* first 8K: 1 for 1 */
|
if (va < 020000) /* first 8K: 1 for 1 */
|
||||||
pa = va;
|
pa = va;
|
||||||
|
@ -1168,7 +1170,7 @@ if (nml_mode) { /* normal? */
|
||||||
pa = va + em2_dyn;
|
pa = va + em2_dyn;
|
||||||
else pa = va + em3_dyn; /* next 4K: ext EM3 */
|
else pa = va + em3_dyn; /* next 4K: ext EM3 */
|
||||||
}
|
}
|
||||||
else if (usr_mode || (va & VA_USR)) { /* user mapping? */
|
else if ((cpu_mode == USR_MODE) || (va & VA_USR)) { /* user mapping? */
|
||||||
pgn = VA_GETPN (va); /* get page no */
|
pgn = VA_GETPN (va); /* get page no */
|
||||||
map = usr_map[pgn]; /* get map entry */
|
map = usr_map[pgn]; /* get map entry */
|
||||||
if (map == MAP_PROT) /* prot? no access */
|
if (map == MAP_PROT) /* prot? no access */
|
||||||
|
@ -1192,7 +1194,7 @@ t_stat Write (uint32 va, uint32 dat)
|
||||||
{
|
{
|
||||||
uint32 pgn, map, pa;
|
uint32 pgn, map, pa;
|
||||||
|
|
||||||
if (nml_mode) { /* normal? */
|
if (cpu_mode == NML_MODE) { /* normal? */
|
||||||
va = va & VA_MASK; /* ignore user */
|
va = va & VA_MASK; /* ignore user */
|
||||||
if (va < 020000) /* first 8K: 1 for 1 */
|
if (va < 020000) /* first 8K: 1 for 1 */
|
||||||
pa = va;
|
pa = va;
|
||||||
|
@ -1200,7 +1202,7 @@ if (nml_mode) { /* normal? */
|
||||||
pa = va + em2_dyn;
|
pa = va + em2_dyn;
|
||||||
else pa = va + em3_dyn; /* next 4K: ext EM3 */
|
else pa = va + em3_dyn; /* next 4K: ext EM3 */
|
||||||
}
|
}
|
||||||
else if (usr_mode || (va & VA_USR)) { /* user mapping? */
|
else if ((cpu_mode == USR_MODE) || (va & VA_USR)) { /* user mapping? */
|
||||||
pgn = VA_GETPN (va); /* get page no */
|
pgn = VA_GETPN (va); /* get page no */
|
||||||
map = usr_map[pgn]; /* get map entry */
|
map = usr_map[pgn]; /* get map entry */
|
||||||
if (map & MAP_PROT) { /* protected page? */
|
if (map & MAP_PROT) { /* protected page? */
|
||||||
|
@ -1226,21 +1228,20 @@ return SCPE_OK;
|
||||||
|
|
||||||
uint32 RelocC (int32 va, int32 sw)
|
uint32 RelocC (int32 va, int32 sw)
|
||||||
{
|
{
|
||||||
uint32 nml = nml_mode, usr = usr_mode;
|
uint32 mode = cpu_mode;
|
||||||
uint32 pa, pgn, map;
|
uint32 pa, pgn, map;
|
||||||
|
|
||||||
if (sw & SWMASK ('N')) /* -n: normal */
|
if (sw & SWMASK ('N')) /* -n: normal */
|
||||||
nml = 1;
|
mode = NML_MODE;
|
||||||
else if (sw & SWMASK ('X')) /* -x: mon */
|
else if (sw & SWMASK ('X')) /* -x: mon */
|
||||||
nml = usr = 0;
|
mode = MON_MODE;
|
||||||
else if (sw & SWMASK ('U')) { /* -u: user */
|
else if (sw & SWMASK ('U')) { /* -u: user */
|
||||||
nml = 0;
|
mode = USR_MODE;
|
||||||
usr = 1;
|
|
||||||
}
|
}
|
||||||
else if (!(sw & SWMASK ('V'))) /* -v: curr */
|
else if (!(sw & SWMASK ('V'))) /* -v: curr */
|
||||||
return va;
|
return va;
|
||||||
set_dyn_map ();
|
set_dyn_map ();
|
||||||
if (nml) { /* normal? */
|
if (mode == NML_MODE) { /* normal? */
|
||||||
if (va < 020000) /* first 8K: 1 for 1 */
|
if (va < 020000) /* first 8K: 1 for 1 */
|
||||||
pa = va;
|
pa = va;
|
||||||
else if (va < 030000) /* next 4K: ext EM2 */
|
else if (va < 030000) /* next 4K: ext EM2 */
|
||||||
|
@ -1249,7 +1250,7 @@ if (nml) { /* normal? */
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
pgn = VA_GETPN (va); /* get page no */
|
pgn = VA_GETPN (va); /* get page no */
|
||||||
map = usr? usr_map[pgn]: mon_map[pgn]; /* get map entry */
|
map = (mode == USR_MODE)? usr_map[pgn]: mon_map[pgn]; /* get map entry */
|
||||||
if (map == MAP_PROT) /* no access page? */
|
if (map == MAP_PROT) /* no access page? */
|
||||||
return MAXMEMSIZE + 1;
|
return MAXMEMSIZE + 1;
|
||||||
pa = (map & ~MAP_PROT) | (va & VA_POFF); /* map address */
|
pa = (map & ~MAP_PROT) | (va & VA_POFF); /* map address */
|
||||||
|
@ -1483,8 +1484,7 @@ EM2 = 2;
|
||||||
EM3 = 3;
|
EM3 = 3;
|
||||||
RL1 = RL2 = RL4 = 0;
|
RL1 = RL2 = RL4 = 0;
|
||||||
ion = ion_defer = 0;
|
ion = ion_defer = 0;
|
||||||
nml_mode = 1;
|
cpu_mode = NML_MODE;
|
||||||
usr_mode = 0;
|
|
||||||
mon_usr_trap = 0;
|
mon_usr_trap = 0;
|
||||||
int_req = 0;
|
int_req = 0;
|
||||||
int_reqhi = 0;
|
int_reqhi = 0;
|
||||||
|
@ -1652,10 +1652,12 @@ return SCPE_OK;
|
||||||
|
|
||||||
void inst_hist (uint32 ir, uint32 pc, uint32 tp)
|
void inst_hist (uint32 ir, uint32 pc, uint32 tp)
|
||||||
{
|
{
|
||||||
|
if (cpu_mode == hst_exclude)
|
||||||
|
return;
|
||||||
hst_p = (hst_p + 1); /* next entry */
|
hst_p = (hst_p + 1); /* next entry */
|
||||||
if (hst_p >= hst_lnt)
|
if (hst_p >= hst_lnt)
|
||||||
hst_p = 0;
|
hst_p = 0;
|
||||||
hst[hst_p].typ = tp | (OV << 4);
|
hst[hst_p].typ = tp | (OV << 4) | (cpu_mode << 5);
|
||||||
hst[hst_p].pc = pc;
|
hst[hst_p].pc = pc;
|
||||||
hst[hst_p].ir = ir;
|
hst[hst_p].ir = ir;
|
||||||
hst[hst_p].a = A;
|
hst[hst_p].a = A;
|
||||||
|
@ -1682,6 +1684,14 @@ lnt = (int32) get_uint (cptr, 10, HIST_MAX, &r);
|
||||||
if ((r != SCPE_OK) || (lnt && (lnt < HIST_MIN)))
|
if ((r != SCPE_OK) || (lnt && (lnt < HIST_MIN)))
|
||||||
return SCPE_ARG;
|
return SCPE_ARG;
|
||||||
hst_p = 0;
|
hst_p = 0;
|
||||||
|
if (sim_switches & SWMASK('M'))
|
||||||
|
hst_exclude = MON_MODE;
|
||||||
|
else if (sim_switches & SWMASK('N'))
|
||||||
|
hst_exclude = NML_MODE;
|
||||||
|
else if (sim_switches & SWMASK('U'))
|
||||||
|
hst_exclude = USR_MODE;
|
||||||
|
else
|
||||||
|
hst_exclude = BAD_MODE;
|
||||||
if (hst_lnt) {
|
if (hst_lnt) {
|
||||||
free (hst);
|
free (hst);
|
||||||
hst_lnt = 0;
|
hst_lnt = 0;
|
||||||
|
@ -1706,6 +1716,7 @@ t_stat r;
|
||||||
t_value sim_eval;
|
t_value sim_eval;
|
||||||
InstHistory *h;
|
InstHistory *h;
|
||||||
static char *cyc[] = { " ", " ", "INT", "TRP" };
|
static char *cyc[] = { " ", " ", "INT", "TRP" };
|
||||||
|
static char *modes = "NMU?";
|
||||||
|
|
||||||
if (hst_lnt == 0) /* enabled? */
|
if (hst_lnt == 0) /* enabled? */
|
||||||
return SCPE_NOFNC;
|
return SCPE_NOFNC;
|
||||||
|
@ -1718,13 +1729,13 @@ else lnt = hst_lnt;
|
||||||
di = hst_p - lnt; /* work forward */
|
di = hst_p - lnt; /* work forward */
|
||||||
if (di < 0)
|
if (di < 0)
|
||||||
di = di + hst_lnt;
|
di = di + hst_lnt;
|
||||||
fprintf (st, "CYC PC OV A B X EA IR\n\n");
|
fprintf (st, "CYC PC MD OV A B X EA IR\n\n");
|
||||||
for (k = 0; k < lnt; k++) { /* print specified */
|
for (k = 0; k < lnt; k++) { /* print specified */
|
||||||
h = &hst[(++di) % hst_lnt]; /* entry pointer */
|
h = &hst[(++di) % hst_lnt]; /* entry pointer */
|
||||||
if (h->typ) { /* instruction? */
|
if (h->typ) { /* instruction? */
|
||||||
ov = (h->typ >> 4) & 1; /* overflow */
|
ov = (h->typ >> 4) & 1; /* overflow */
|
||||||
fprintf (st, "%s %05o %o %08o %08o %08o ", cyc[h->typ & 3],
|
fprintf (st, "%s %05o %c %o %08o %08o %08o ", cyc[h->typ & 3],
|
||||||
h->pc, ov, h->a, h->b, h->x);
|
h->pc, modes[(h->typ >> 5) & 3], ov, h->a, h->b, h->x);
|
||||||
if (h->ea & HIST_NOEA)
|
if (h->ea & HIST_NOEA)
|
||||||
fprintf (st, " ");
|
fprintf (st, " ");
|
||||||
else fprintf (st, "%05o ", h->ea);
|
else fprintf (st, "%05o ", h->ea);
|
||||||
|
|
|
@ -81,6 +81,13 @@
|
||||||
#define SXT_EXP(x) ((int32) (((x) & EXPS)? ((x) | ~EXPMASK): \
|
#define SXT_EXP(x) ((int32) (((x) & EXPS)? ((x) | ~EXPMASK): \
|
||||||
((x) & EXPMASK)))
|
((x) & EXPMASK)))
|
||||||
|
|
||||||
|
/* CPU modes */
|
||||||
|
|
||||||
|
#define NML_MODE 0
|
||||||
|
#define MON_MODE 1
|
||||||
|
#define USR_MODE 2
|
||||||
|
#define BAD_MODE 3
|
||||||
|
|
||||||
/* Memory */
|
/* Memory */
|
||||||
|
|
||||||
#define MAXMEMSIZE (1 << 16) /* max memory size */
|
#define MAXMEMSIZE (1 << 16) /* max memory size */
|
||||||
|
|
|
@ -81,7 +81,7 @@ extern uint32 int_req; /* int req */
|
||||||
extern uint32 xfr_req; /* xfer req */
|
extern uint32 xfr_req; /* xfer req */
|
||||||
extern uint32 alert; /* pin/pot alert */
|
extern uint32 alert; /* pin/pot alert */
|
||||||
extern uint32 X, EM2, EM3, OV, ion, bpt;
|
extern uint32 X, EM2, EM3, OV, ion, bpt;
|
||||||
extern uint32 nml_mode, usr_mode;
|
extern uint32 cpu_mode;
|
||||||
extern int32 rtc_pie;
|
extern int32 rtc_pie;
|
||||||
extern int32 stop_invins, stop_invdev, stop_inviop;
|
extern int32 stop_invins, stop_invdev, stop_inviop;
|
||||||
extern uint32 mon_usr_trap;
|
extern uint32 mon_usr_trap;
|
||||||
|
@ -431,7 +431,7 @@ switch (mod) {
|
||||||
else if (inst & 01000) /* alert RL2 */
|
else if (inst & 01000) /* alert RL2 */
|
||||||
alert = POT_RL2;
|
alert = POT_RL2;
|
||||||
if (inst & 02000) { /* nml to mon */
|
if (inst & 02000) { /* nml to mon */
|
||||||
nml_mode = usr_mode = 0;
|
cpu_mode = MON_MODE;
|
||||||
if (inst & 00400)
|
if (inst & 00400)
|
||||||
mon_usr_trap = 1;
|
mon_usr_trap = 1;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Add table
Reference in a new issue