From c02491f733de9e44efb0fae8d5f8b467d5ace65a Mon Sep 17 00:00:00 2001 From: Seth Morabito Date: Wed, 11 Aug 2021 19:43:51 -0700 Subject: [PATCH] 3B2: Header refactoring and cleanup This change signficantly improves header hygiene in the 3B2 project by moving global symbols out of 3b2_defs.h and into the appropriate individual module header files. Each compilation unit now includes: - its appropriate matching .h file - any other .h files necessary for linting and compilation Each header file in turn includes 3b2_defs.h, which contains truly global symbols, and which pulls in sim_defs.h and exports global devices. --- 3B2/3b2_cpu.c | 16 +++++++- 3B2/3b2_cpu.h | 14 ++++++- 3B2/3b2_ctc.c | 6 ++- 3B2/3b2_ctc.h | 3 +- 3B2/3b2_defs.h | 95 +++++++++++---------------------------------- 3B2/3b2_dmac.c | 10 ++++- 3B2/3b2_dmac.h | 4 +- 3B2/3b2_id.c | 5 ++- 3B2/3b2_id.h | 4 +- 3B2/3b2_if.c | 12 +++++- 3B2/3b2_if.h | 5 ++- 3B2/3b2_io.c | 19 ++++++++- 3B2/3b2_io.h | 7 ++-- 3B2/3b2_iu.c | 13 ++++++- 3B2/3b2_iu.h | 8 +++- 3B2/3b2_mem.c | 12 +++++- 3B2/3b2_mem.h | 2 +- 3B2/3b2_ni.c | 5 ++- 3B2/3b2_ni.h | 2 +- 3B2/3b2_ports.c | 10 ++++- 3B2/3b2_ports.h | 2 +- 3B2/3b2_rev2_csr.c | 5 ++- 3B2/3b2_rev2_csr.h | 4 +- 3B2/3b2_rev2_defs.h | 4 -- 3B2/3b2_rev2_mau.c | 13 ++++++- 3B2/3b2_rev2_mmu.c | 4 +- 3B2/3b2_rev2_mmu.h | 3 +- 3B2/3b2_rev2_sys.c | 10 +++++ 3B2/3b2_rev3_csr.c | 6 ++- 3B2/3b2_rev3_csr.h | 4 +- 3B2/3b2_rev3_defs.h | 6 --- 3B2/3b2_rev3_mmu.c | 6 ++- 3B2/3b2_rev3_mmu.h | 2 +- 3B2/3b2_rev3_sys.c | 10 ++++- 3B2/3b2_scsi.c | 9 +++-- 3B2/3b2_scsi.h | 2 +- 3B2/3b2_stddev.c | 9 ++++- 3B2/3b2_stddev.h | 4 +- 3B2/3b2_sys.c | 5 ++- 3B2/3b2_sys.h | 6 ++- 40 files changed, 235 insertions(+), 131 deletions(-) diff --git a/3B2/3b2_cpu.c b/3B2/3b2_cpu.c index 9061394d..29d87fca 100644 --- a/3B2/3b2_cpu.c +++ b/3B2/3b2_cpu.c @@ -42,16 +42,28 @@ * - "WE 32200 Microprocessor Information Manual" (AT&T, 1988) * */ -#include -#include "3b2_defs.h" #include "3b2_cpu.h" + #if defined(REV3) +#include "3b2_rev2_mau.h" /* TODO: Replace with Rev 3 MAU when implemented */ +#include "3b2_rev3_csr.h" +#include "3b2_rev3_mmu.h" #include "rom_rev3_bin.h" #else +#include "3b2_rev2_csr.h" +#include "3b2_rev2_mau.h" +#include "3b2_rev2_mmu.h" +#include "3b2_id.h" #include "rom_rev2_bin.h" #endif +#include "3b2_dmac.h" +#include "3b2_io.h" +#include "3b2_iu.h" +#include "3b2_mem.h" +#include "3b2_stddev.h" + #define MAX_SUB_RETURN_SKIP 9 uint32 rom_size = BOOT_CODE_SIZE; diff --git a/3B2/3b2_cpu.h b/3B2/3b2_cpu.h index 1f7bfec8..44b8be33 100644 --- a/3B2/3b2_cpu.h +++ b/3B2/3b2_cpu.h @@ -31,7 +31,7 @@ #ifndef _3B2_CPU_H_ #define _3B2_CPU_H_ -#include "sim_defs.h" +#include "3b2_defs.h" /* Execution Modes */ #define EX_LVL_KERN 0 @@ -649,4 +649,16 @@ void cpu_clear_irq(uint8 ipl, uint16 csr_flags); (d) = (uint8) (a)[(p)++]; \ } +extern volatile int32 stop_reason; +extern uint32 rom_size; +extern instr *cpu_instr; +extern t_bool cpu_nmi; +extern uint32 *ROM; +extern uint32 *RAM; +extern uint32 R[NUM_REGISTERS]; +extern REG cpu_reg[]; +extern UNIT cpu_unit; +extern uint8 fault; +extern t_bool cpu_km; + #endif diff --git a/3B2/3b2_ctc.c b/3B2/3b2_ctc.c index 8a91e746..01769d85 100644 --- a/3B2/3b2_ctc.c +++ b/3B2/3b2_ctc.c @@ -28,9 +28,13 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_ctc.h" +#include "sim_disk.h" + +#include "3b2_mem.h" +#include "3b2_io.h" + #define CTQRESIZE 20 #define CTQCESIZE 16 diff --git a/3B2/3b2_ctc.h b/3B2/3b2_ctc.h index 9ac3cb06..67f0b884 100644 --- a/3B2/3b2_ctc.h +++ b/3B2/3b2_ctc.h @@ -51,8 +51,7 @@ #ifndef _3B2_CTC_H_ #define _3B2_CTC_H_ -#include "sim_defs.h" -#include "3b2_io.h" +#include "3b2_defs.h" #define CTC_ID 0x0005 #define CTC_IPL 12 diff --git a/3B2/3b2_defs.h b/3B2/3b2_defs.h index 62158609..d165c478 100644 --- a/3B2/3b2_defs.h +++ b/3B2/3b2_defs.h @@ -31,38 +31,16 @@ #ifndef _3B2_DEFS_H_ #define _3B2_DEFS_H_ -#include "sim_defs.h" -#include "sim_tmxr.h" -#include "sim_disk.h" #include +#include "sim_defs.h" #if defined(REV3) #include "3b2_rev3_defs.h" -#include "3b2_rev3_csr.h" -#include "3b2_rev3_mmu.h" -#include "3b2_rev2_mau.h" /* Use Rev 2 MAU until Rev 3 is implemented */ -#include "3b2_scsi.h" #else #include "3b2_rev2_defs.h" -#include "3b2_rev2_csr.h" -#include "3b2_rev2_mau.h" -#include "3b2_rev2_mmu.h" -#include "3b2_id.h" -#include "3b2_ctc.h" #endif -#include "3b2_sys.h" -#include "3b2_cpu.h" -#include "3b2_io.h" -#include "3b2_stddev.h" -#include "3b2_mem.h" -#include "3b2_dmac.h" -#include "3b2_if.h" -#include "3b2_iu.h" -#include "3b2_ports.h" -#include "3b2_ni.h" - #ifndef FALSE #define FALSE 0 #endif @@ -159,54 +137,27 @@ noret __libc_longjmp(jmp_buf buf, int val); /* Global symbols */ -extern volatile int32 stop_reason; - -extern CIO_STATE cio[CIO_SLOTS]; - -extern uint32 rom_size; -extern instr *cpu_instr; -extern t_bool cpu_nmi; -extern uint32 *ROM; -extern uint32 *RAM; -extern uint32 R[NUM_REGISTERS]; -extern REG cpu_reg[]; -extern UNIT cpu_unit; -extern uint8 fault; -extern t_bool cpu_km; -extern char sim_name[]; -extern REG *sim_PC; -extern int32 sim_emax; -extern int32 tmxr_poll; - -extern DEBTAB sys_deb_tab[]; -extern DEVICE contty_dev; -extern DEVICE cpu_dev; -extern DEVICE csr_dev; -extern DEVICE ctc_dev; -extern DEVICE dmac_dev; -extern DEVICE id_dev; -extern DEVICE if_dev; -extern DEVICE iu_timer_dev; -extern DEVICE mau_dev; -extern DEVICE mmu_dev; -extern DEVICE ni_dev; -extern DEVICE nvram_dev; -extern DEVICE ports_dev; -extern DEVICE timer_dev; -extern DEVICE tod_dev; -extern DEVICE tti_dev; -extern DEVICE tto_dev; - -extern IU_PORT iu_console; -extern IU_PORT iu_contty; -extern IF_STATE if_state; -extern MMU_STATE mmu_state; -extern DMA_STATE dma_state; - -extern t_bool id_drq; -extern t_bool if_irq; -extern t_bool cio_skip_seqbit; -extern t_bool iu_increment_a; -extern t_bool iu_increment_b; +extern DEBTAB sys_deb_tab[]; +extern DEVICE contty_dev; +extern DEVICE cpu_dev; +extern DEVICE csr_dev; +extern DEVICE ctc_dev; +extern DEVICE dmac_dev; +extern DEVICE id_dev; +extern DEVICE if_dev; +extern DEVICE iu_timer_dev; +extern DEVICE mau_dev; +extern DEVICE mmu_dev; +extern DEVICE ni_dev; +extern DEVICE nvram_dev; +extern DEVICE ports_dev; +extern DEVICE timer_dev; +extern DEVICE tod_dev; +extern DEVICE tti_dev; +extern DEVICE tto_dev; +#if defined(REV3) +extern DEVICE flt_dev; +extern DEVICE ha_dev; +#endif #endif diff --git a/3B2/3b2_dmac.c b/3B2/3b2_dmac.c index b989d744..08273b99 100644 --- a/3B2/3b2_dmac.c +++ b/3B2/3b2_dmac.c @@ -28,9 +28,17 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_dmac.h" +#if defined(REV2) +#include "3b2_id.h" +#endif + +#include "3b2_cpu.h" +#include "3b2_if.h" +#include "3b2_iu.h" +#include "3b2_mem.h" + DMA_STATE dma_state; UNIT dmac_unit[] = { diff --git a/3B2/3b2_dmac.h b/3B2/3b2_dmac.h index f9d4fc6e..a5fe8e79 100644 --- a/3B2/3b2_dmac.h +++ b/3B2/3b2_dmac.h @@ -31,7 +31,7 @@ #ifndef _3B2_DMAC_H_ #define _3B2_DMAC_H_ -#include "sim_defs.h" +#include "3b2_defs.h" #define DMA_MODE_VERIFY 0 #define DMA_MODE_WRITE 1 /* Write to memory from device */ @@ -79,4 +79,6 @@ void dmac_service_drqs(); void dmac_generic_dma(uint8 channel, uint32 service_address); uint32 dma_address(uint8 channel, uint32 offset, t_bool r); +extern DMA_STATE dma_state; + #endif diff --git a/3B2/3b2_id.c b/3B2/3b2_id.c index 77d26f1f..6b87ac15 100644 --- a/3B2/3b2_id.c +++ b/3B2/3b2_id.c @@ -42,9 +42,12 @@ * HD135 11 1224 15 18 512 Maxtor XT1190 */ -#include "3b2_defs.h" #include "3b2_id.h" +#include "sim_disk.h" + +#include "3b2_cpu.h" + #define ID_SEEK_WAIT 50 #define ID_SEEK_BASE 700 #define ID_RECAL_WAIT 6000 diff --git a/3B2/3b2_id.h b/3B2/3b2_id.h index b32f77c0..fcb1bc1a 100644 --- a/3B2/3b2_id.h +++ b/3B2/3b2_id.h @@ -31,7 +31,7 @@ #ifndef __3B2_ID_H__ #define __3B2_ID_H__ -#include "sim_defs.h" +#include "3b2_defs.h" #define ID0 0 #define ID1 1 @@ -174,4 +174,6 @@ void id_handle_data(uint8 val); void id_handle_command(uint8 val); void id_after_dma(); +extern t_bool id_drq; + #endif diff --git a/3B2/3b2_if.c b/3B2/3b2_if.c index e3d3c0f4..fb1ce64e 100644 --- a/3B2/3b2_if.c +++ b/3B2/3b2_if.c @@ -28,9 +28,19 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_if.h" +#include "sim_disk.h" + + +#if defined(REV3) +#include "3b2_rev3_csr.h" +#else +#include "3b2_rev2_csr.h" +#endif + +#include "3b2_cpu.h" + /* Static function declarations */ static SIM_INLINE void if_set_irq(); static SIM_INLINE void if_clear_irq(); diff --git a/3B2/3b2_if.h b/3B2/3b2_if.h index 75955998..f6378ff0 100644 --- a/3B2/3b2_if.h +++ b/3B2/3b2_if.h @@ -31,7 +31,7 @@ #ifndef __3B2_IF_H__ #define __3B2_IF_H__ -#include "sim_defs.h" +#include "3b2_defs.h" typedef struct { uint8 data; @@ -126,4 +126,7 @@ void if_after_dma(); CONST char *if_description(DEVICE *dptr); t_stat if_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr); +extern IF_STATE if_state; +extern t_bool if_irq; + #endif diff --git a/3B2/3b2_io.c b/3B2/3b2_io.c index 46cec99d..259fa31c 100644 --- a/3B2/3b2_io.c +++ b/3B2/3b2_io.c @@ -28,10 +28,25 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_io.h" -CIO_STATE cio[CIO_SLOTS] = {{0}}; +#if defined(REV3) +#include "3b2_rev3_csr.h" +#include "3b2_rev3_mmu.h" +#else +#include "3b2_id.h" +#include "3b2_rev2_csr.h" +#include "3b2_rev2_mmu.h" +#endif + +#include "3b2_cpu.h" +#include "3b2_dmac.h" +#include "3b2_if.h" +#include "3b2_iu.h" +#include "3b2_mem.h" +#include "3b2_stddev.h" + +CIO_STATE cio[CIO_SLOTS] = {{0}}; #if defined(REV3) iolink iotable[] = { diff --git a/3B2/3b2_io.h b/3B2/3b2_io.h index 2ffdea77..67fbb58e 100644 --- a/3B2/3b2_io.h +++ b/3B2/3b2_io.h @@ -28,8 +28,6 @@ from the author. */ - - /* Reference Documentation * ======================= * @@ -111,8 +109,7 @@ #ifndef _3B2_IO_H_ #define _3B2_IO_H_ -#include "sim_defs.h" -#include "sim_tmxr.h" +#include "3b2_defs.h" #define CRC_POLYNOMIAL 0xEDB88320 @@ -248,4 +245,6 @@ void io_write(uint32 pa, uint32 val, size_t size); void dump_entry(uint32 dbits, DEVICE *dev, CONST char *type, uint32 esize, cio_entry *entry, uint8 *app_data); +extern CIO_STATE cio[CIO_SLOTS]; + #endif diff --git a/3B2/3b2_iu.c b/3B2/3b2_iu.c index 1d5b1008..1bea7b84 100644 --- a/3B2/3b2_iu.c +++ b/3B2/3b2_iu.c @@ -28,9 +28,20 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_iu.h" +#include "sim_tmxr.h" + +#if defined(REV3) +#include "3b2_rev3_csr.h" +#else +#include "3b2_rev2_csr.h" +#endif +#include "3b2_cpu.h" +#include "3b2_dmac.h" +#include "3b2_mem.h" +#include "3b2_stddev.h" + /* Static function declarations */ static SIM_INLINE void iu_w_cmd(uint8 portno, uint8 val); diff --git a/3B2/3b2_iu.h b/3B2/3b2_iu.h index 2038ac63..2a718ed0 100644 --- a/3B2/3b2_iu.h +++ b/3B2/3b2_iu.h @@ -31,8 +31,7 @@ #ifndef __3B2_IU_H__ #define __3B2_IU_H__ -#include "sim_defs.h" -#include "sim_tmxr.h" +#include "3b2_defs.h" #define CMD_ERX 0x01 /* Enable receiver */ #define CMD_DRX 0x02 /* Disable receiver */ @@ -207,4 +206,9 @@ void iu_dma_contty(uint8 channel, uint32 service_address); void increment_modep_a(); void increment_modep_b(); +extern IU_PORT iu_console; +extern IU_PORT iu_contty; +extern t_bool iu_increment_a; +extern t_bool iu_increment_b; + #endif diff --git a/3B2/3b2_mem.c b/3B2/3b2_mem.c index 4cd462c1..f3b40b0b 100644 --- a/3B2/3b2_mem.c +++ b/3B2/3b2_mem.c @@ -28,9 +28,19 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_mem.h" +#if defined(REV3) +#include "3b2_rev3_csr.h" +#include "3b2_rev3_mmu.h" +#else +#include "3b2_rev2_csr.h" +#include "3b2_rev2_mmu.h" +#endif + +#include "3b2_cpu.h" +#include "3b2_io.h" + t_bool addr_is_rom(uint32 pa) { return (pa < rom_size); diff --git a/3B2/3b2_mem.h b/3B2/3b2_mem.h index 4487312e..b477bfb8 100644 --- a/3B2/3b2_mem.h +++ b/3B2/3b2_mem.h @@ -31,7 +31,7 @@ #ifndef _3B2_MEM_H_ #define _3B2_MEM_H_ -#include "sim_defs.h" +#include "3b2_defs.h" uint32 pread_w(uint32 pa); void pwrite_w(uint32 pa, uint32 val); diff --git a/3B2/3b2_ni.c b/3B2/3b2_ni.c index 3ee35e10..29576f18 100644 --- a/3B2/3b2_ni.c +++ b/3B2/3b2_ni.c @@ -93,10 +93,11 @@ * */ -#include "3b2_defs.h" #include "3b2_ni.h" -#include +#include "3b2_io.h" +#include "3b2_mem.h" +#include "3b2_stddev.h" /* State container for the card */ NI_STATE ni; diff --git a/3B2/3b2_ni.h b/3B2/3b2_ni.h index c6c773d7..b8c169a9 100644 --- a/3B2/3b2_ni.h +++ b/3B2/3b2_ni.h @@ -31,7 +31,7 @@ #ifndef _3B2_NI_H_ #define _3B2_NI_H_ -#include "sim_defs.h" +#include "3b2_defs.h" #include "sim_ether.h" #define NI_ID 0x0002 diff --git a/3B2/3b2_ports.c b/3B2/3b2_ports.c index 9ace8370..00dab2a1 100644 --- a/3B2/3b2_ports.c +++ b/3B2/3b2_ports.c @@ -42,9 +42,15 @@ * */ -#include "3b2_defs.h" #include "3b2_ports.h" +#include "sim_tmxr.h" + +#include "3b2_cpu.h" +#include "3b2_io.h" +#include "3b2_mem.h" +#include "3b2_stddev.h" + /* Static function declarations */ static t_stat ports_show_queue_common(FILE *st, UNIT *uptr, int32 val, CONST void *desc, t_bool rq); @@ -375,7 +381,7 @@ static void ports_cmd(uint8 cid, cio_entry *rentry, uint8 *rapp_data) tmxr_set_config_line(&ports_ldsc[ln], line_config); } - centry.byte_count = sizeof(PPC_OPTIONS); + centry.byte_count = 20; centry.opcode = PPC_OPTIONS; centry.subdevice = rentry->subdevice; centry.address = rentry->address; diff --git a/3B2/3b2_ports.h b/3B2/3b2_ports.h index 928dce63..fa9302b0 100644 --- a/3B2/3b2_ports.h +++ b/3B2/3b2_ports.h @@ -45,7 +45,7 @@ #ifndef _3B2_PORTS_H_ #define _3B2_PORTS_H_ -#include "sim_defs.h" +#include "3b2_defs.h" #define PORTS_ID 0x0003 #define PORTS_IPL 10 diff --git a/3B2/3b2_rev2_csr.c b/3B2/3b2_rev2_csr.c index 29761118..8778d207 100644 --- a/3B2/3b2_rev2_csr.c +++ b/3B2/3b2_rev2_csr.c @@ -28,9 +28,12 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_rev2_csr.h" +#include "3b2_cpu.h" +#include "3b2_sys.h" +#include "3b2_stddev.h" + uint16 csr_data; BITFIELD csr_bits[] = { diff --git a/3B2/3b2_rev2_csr.h b/3B2/3b2_rev2_csr.h index a76c3c08..cb873724 100644 --- a/3B2/3b2_rev2_csr.h +++ b/3B2/3b2_rev2_csr.h @@ -31,7 +31,7 @@ #ifndef _3B2_REV2_CSR_H_ #define _3B2_REV2_CSR_H_ -#include "sim_defs.h" +#include "3b2_defs.h" /* CSR */ t_stat csr_svc(UNIT *uptr); @@ -41,4 +41,6 @@ t_stat csr_reset(DEVICE *dptr); uint32 csr_read(uint32 pa, size_t size); void csr_write(uint32 pa, uint32 val, size_t size); +extern uint16 csr_data; + #endif /* 3B2_REV2_CSR_H_ */ diff --git a/3B2/3b2_rev2_defs.h b/3B2/3b2_rev2_defs.h index 879f8d3b..4e036807 100644 --- a/3B2/3b2_rev2_defs.h +++ b/3B2/3b2_rev2_defs.h @@ -31,8 +31,6 @@ #ifndef _3B2_REV2_DEFS_H_ #define _3B2_REV2_DEFS_H_ -#include "sim_defs.h" - #define NUM_REGISTERS 16 #define DEFMEMSIZE MSIZ_4M @@ -119,6 +117,4 @@ #define DMA_C 0x48 #define DMA_IF 0x4E -extern uint16 csr_data; - #endif /* _3B2_REV2_DEFS_H_ */ diff --git a/3B2/3b2_rev2_mau.c b/3B2/3b2_rev2_mau.c index 0b7844fe..79cce5cd 100644 --- a/3B2/3b2_rev2_mau.c +++ b/3B2/3b2_rev2_mau.c @@ -81,10 +81,19 @@ --------------------------------------------------------------------- */ +#include "3b2_rev2_mau.h" + #include -#include "3b2_defs.h" -#include "3b2_rev2_mau.h" +/* TODO: Simplify after 3b2_rev3_mau is implemented */ +#if defined(REV3) +#include "3b2_rev3_mmu.h" +#else +#include "3b2_rev2_mmu.h" +#endif + +#include "3b2_cpu.h" +#include "3b2_mem.h" #define MAU_ID 0 /* Coprocessor ID of MAU */ diff --git a/3B2/3b2_rev2_mmu.c b/3B2/3b2_rev2_mmu.c index ca068ffc..f3e9e8ac 100644 --- a/3B2/3b2_rev2_mmu.c +++ b/3B2/3b2_rev2_mmu.c @@ -28,9 +28,11 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_rev2_mmu.h" +#include "3b2_sys.h" +#include "3b2_cpu.h" + UNIT mmu_unit = { UDATA(NULL, 0, 0) }; MMU_STATE mmu_state; diff --git a/3B2/3b2_rev2_mmu.h b/3B2/3b2_rev2_mmu.h index 82237a0b..889dd9a9 100644 --- a/3B2/3b2_rev2_mmu.h +++ b/3B2/3b2_rev2_mmu.h @@ -32,7 +32,6 @@ #define _3B2_REV2_MMU_H_ #include "sim_defs.h" -#include "3b2_rev2_defs.h" /************************************************************************ * @@ -382,4 +381,6 @@ t_stat mmu_decode_va(uint32 va, uint8 r_acc, t_bool fc, uint32 *pa); void mmu_enable(); void mmu_disable(); +extern MMU_STATE mmu_state; + #endif /* _3B2_REV2_MMU_H_ */ diff --git a/3B2/3b2_rev2_sys.c b/3B2/3b2_rev2_sys.c index f2234669..c290d203 100644 --- a/3B2/3b2_rev2_sys.c +++ b/3B2/3b2_rev2_sys.c @@ -30,6 +30,16 @@ #include "3b2_defs.h" +#include "3b2_cpu.h" +#include "3b2_ctc.h" +#include "3b2_id.h" +#include "3b2_if.h" +#include "3b2_iu.h" +#include "3b2_ni.h" +#include "3b2_ports.h" +#include "3b2_rev2_mau.h" +#include "3b2_stddev.h" + char sim_name[] = "AT&T 3B2/400"; DEVICE *sim_devices[] = { diff --git a/3B2/3b2_rev3_csr.c b/3B2/3b2_rev3_csr.c index 62461720..80b74c8c 100644 --- a/3B2/3b2_rev3_csr.c +++ b/3B2/3b2_rev3_csr.c @@ -28,7 +28,11 @@ from the author. */ -#include "3b2_defs.h" +#include "3b2_rev3_csr.h" + +#include "3b2_cpu.h" +#include "3b2_if.h" +#include "3b2_stddev.h" uint32 csr_data; diff --git a/3B2/3b2_rev3_csr.h b/3B2/3b2_rev3_csr.h index d768a669..292efdd9 100644 --- a/3B2/3b2_rev3_csr.h +++ b/3B2/3b2_rev3_csr.h @@ -31,7 +31,7 @@ #ifndef _3B2_400_CSR_H_ #define _3B2_400_CSR_H_ -#include "sim_defs.h" +#include "3b2_defs.h" t_stat csr_svc(UNIT *uptr); t_stat csr_ex(t_value *vptr, t_addr exta, UNIT *uptr, int32 sw); @@ -40,4 +40,6 @@ t_stat csr_reset(DEVICE *dptr); uint32 csr_read(uint32 pa, size_t size); void csr_write(uint32 pa, uint32 val, size_t size); +extern uint32 csr_data; + #endif diff --git a/3B2/3b2_rev3_defs.h b/3B2/3b2_rev3_defs.h index a51fd0b8..fe4d553f 100644 --- a/3B2/3b2_rev3_defs.h +++ b/3B2/3b2_rev3_defs.h @@ -31,8 +31,6 @@ #ifndef _3B2_REV3_DEFS_H_ #define _3B2_REV3_DEFS_H_ -#include "sim_defs.h" - #define NUM_REGISTERS 32 #define DEFMEMSIZE MSIZ_4M @@ -131,8 +129,4 @@ #define CSRABRT (1u << 30) /* Abort Switch Activated */ #define CSRRRST (1u << 31) /* System Reset Request */ -extern DEVICE flt_dev; -extern DEVICE ha_dev; -extern uint32 csr_data; - #endif diff --git a/3B2/3b2_rev3_mmu.c b/3B2/3b2_rev3_mmu.c index 3d70f93d..211f0006 100644 --- a/3B2/3b2_rev3_mmu.c +++ b/3B2/3b2_rev3_mmu.c @@ -28,9 +28,11 @@ from the author. */ -#include "3b2_defs.h" #include "3b2_rev3_mmu.h" -#include + +#include "3b2_cpu.h" +#include "3b2_mem.h" +#include "3b2_rev3_csr.h" UNIT mmu_unit = { UDATA(NULL, 0, 0) }; diff --git a/3B2/3b2_rev3_mmu.h b/3B2/3b2_rev3_mmu.h index 51b8c8c6..a542e504 100644 --- a/3B2/3b2_rev3_mmu.h +++ b/3B2/3b2_rev3_mmu.h @@ -31,7 +31,7 @@ #ifndef _3B2_1000_MMU_H_ #define _3B2_1000_MMU_H_ -#include "sim_defs.h" +#include "3b2_defs.h" #define MMU_SRS 4 /* Section RAM array size (words) */ #define MMU_SDCS 8 /* SD Cache H/L array size */ diff --git a/3B2/3b2_rev3_sys.c b/3B2/3b2_rev3_sys.c index 5b515310..38f51807 100644 --- a/3B2/3b2_rev3_sys.c +++ b/3B2/3b2_rev3_sys.c @@ -29,7 +29,15 @@ */ #include "3b2_defs.h" -#include "3b2_sys.h" + +#include "3b2_cpu.h" +#include "3b2_if.h" +#include "3b2_iu.h" +#include "3b2_ni.h" +#include "3b2_ports.h" +#include "3b2_rev2_mau.h" /* TODO: Replace with Rev 3 MAU when implemented */ +#include "3b2_scsi.h" +#include "3b2_stddev.h" char sim_name[] = "AT&T 3B2/600G"; diff --git a/3B2/3b2_scsi.c b/3B2/3b2_scsi.c index 07b50924..a7177e95 100644 --- a/3B2/3b2_scsi.c +++ b/3B2/3b2_scsi.c @@ -1,4 +1,4 @@ -/* 3b2_scsi.h: AT&T 3B2 SCSI (CM195W) feature card +/* 3b2_scsi.c: AT&T 3B2 SCSI (CM195W) feature card Copyright (c) 2020, Seth J. Morabito @@ -28,11 +28,14 @@ from the author. */ +#include "3b2_scsi.h" + #include "sim_scsi.h" #include "sim_tape.h" -#include "3b2_defs.h" -#include "3b2_scsi.h" +#include "3b2_cpu.h" +#include "3b2_io.h" +#include "3b2_mem.h" #define PUMP_CRC 0x201b3617 diff --git a/3B2/3b2_scsi.h b/3B2/3b2_scsi.h index b600e85f..3854a349 100644 --- a/3B2/3b2_scsi.h +++ b/3B2/3b2_scsi.h @@ -31,7 +31,7 @@ #ifndef _3B2_SCSI_H_ #define _3B2_SCSI_H_ -#include "sim_defs.h" +#include "3b2_defs.h" /* CIO Opcodes */ #define HA_BOOT 0x0a diff --git a/3B2/3b2_stddev.c b/3B2/3b2_stddev.c index b4ceb2ee..d3a54bc7 100644 --- a/3B2/3b2_stddev.c +++ b/3B2/3b2_stddev.c @@ -38,9 +38,16 @@ - tod MM58174A Real-Time-Clock */ -#include "3b2_defs.h" #include "3b2_stddev.h" +#if defined(REV3) +#include "3b2_rev3_csr.h" +#else +#include "3b2_rev2_csr.h" +#endif + +#include "3b2_cpu.h" + DEBTAB sys_deb_tab[] = { { "INIT", INIT_MSG, "Init" }, { "READ", READ_MSG, "Read activity" }, diff --git a/3B2/3b2_stddev.h b/3B2/3b2_stddev.h index 48c10843..12d8dcc8 100644 --- a/3B2/3b2_stddev.h +++ b/3B2/3b2_stddev.h @@ -31,7 +31,7 @@ #ifndef _3B2_REV2_SYSDEV_H_ #define _3B2_REV2_SYSDEV_H_ -#include "sim_defs.h" +#include "3b2_defs.h" /* Timer definitions */ #define TMR_CLK 0 /* The clock responsible for IPL 15 interrupts */ @@ -130,4 +130,6 @@ uint32 flt_read(uint32 pa, size_t size); void flt_write(uint32 pa, uint32 val, size_t size); #endif +extern int32 tmxr_poll; + #endif /* _3B2_REV2_SYSDEV_H_ */ diff --git a/3B2/3b2_sys.c b/3B2/3b2_sys.c index 3f578dba..e826d46c 100644 --- a/3B2/3b2_sys.c +++ b/3B2/3b2_sys.c @@ -28,7 +28,10 @@ from the author. */ -#include "3b2_defs.h" +#include "3b2_sys.h" + +#include "3b2_cpu.h" +#include "3b2_mem.h" REG *sim_PC = &cpu_reg[NUM_PC]; diff --git a/3B2/3b2_sys.h b/3B2/3b2_sys.h index 960fbf7b..6ed6adf5 100644 --- a/3B2/3b2_sys.h +++ b/3B2/3b2_sys.h @@ -31,7 +31,7 @@ #ifndef _3B2_REV2_SYS_H_ #define _3B2_REV2_SYS_H_ -#include "sim_defs.h" +#include "3b2_defs.h" void full_reset(); t_stat sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag); @@ -39,4 +39,8 @@ t_stat parse_sym(CONST char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw); t_stat fprint_sym(FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw); +extern char sim_name[]; +extern REG *sim_PC; +extern int32 sim_emax; + #endif /* _3B2_REV2_SYS_H_ */