From c24a6a28b23f45c55772dc9112242af7ccd6a6df Mon Sep 17 00:00:00 2001 From: Bill Beech Date: Mon, 5 Dec 2016 13:04:01 -0700 Subject: [PATCH] ISYS8024, ISYS8030: Add initial new simulators --- Intel-Systems/isys8024/isbc8024.c | 149 +++++++ .../isys8024_sys.c} | 67 +++- Intel-Systems/isys8024/system_defs.h | 138 +++++++ Intel-Systems/isys8030/isbc80-30.c | 161 -------- Intel-Systems/isys8030/isbc8030.c | 147 +++++++ Intel-Systems/isys8030/isys8030_sys.c | 19 +- Intel-Systems/isys8030/system_defs.h | 64 ++- Visual Studio Projects/Simh.sln | 12 + Visual Studio Projects/isys8024.vcproj | 371 ++++++++++++++++++ Visual Studio Projects/isys8030.vcproj | 371 ++++++++++++++++++ makefile | 4 +- 11 files changed, 1318 insertions(+), 185 deletions(-) create mode 100644 Intel-Systems/isys8024/isbc8024.c rename Intel-Systems/{isys8030/isys8030_cfg.h => isys8024/isys8024_sys.c} (50%) create mode 100644 Intel-Systems/isys8024/system_defs.h delete mode 100644 Intel-Systems/isys8030/isbc80-30.c create mode 100644 Intel-Systems/isys8030/isbc8030.c create mode 100644 Visual Studio Projects/isys8024.vcproj create mode 100644 Visual Studio Projects/isys8030.vcproj diff --git a/Intel-Systems/isys8024/isbc8024.c b/Intel-Systems/isys8024/isbc8024.c new file mode 100644 index 00000000..84a185c2 --- /dev/null +++ b/Intel-Systems/isys8024/isbc8024.c @@ -0,0 +1,149 @@ +/* iSBC80-24.c: Intel iSBC 80/24 Processor simulator + + Copyright (c) 2010, William A. Beech + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of William A. Beech shall not be + used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from William A. Beech. + + MODIFICATIONS: + + 04 Nov 16 - Original file. + + NOTES: + + This software was written by Bill Beech, Nov 2016, to allow emulation of Multibus + Computer Systems. +*/ + +#include "system_defs.h" + +/* function prototypes */ + +uint8 get_mbyte(uint16 addr); +uint16 get_mword(uint16 addr); +void put_mbyte(uint16 addr, uint8 val); +void put_mword(uint16 addr, uint16 val); +t_stat SBC_reset (DEVICE *dptr); + +/* external globals */ + +extern uint8 i8255_C[4]; //port C byte I/O +extern int32 PCX; /* External view of PC */ + +/* external function prototypes */ + +extern uint8 multibus_get_mbyte(uint16 addr); +extern void multibus_put_mbyte(uint16 addr, uint8 val); +extern t_stat i8080_reset (DEVICE *dptr); /* reset the 8080 emulator */ +extern int32 i8251_devnum; +extern t_stat i8251_reset (DEVICE *dptr, uint16 base); +extern int32 i8253_devnum; +extern t_stat i8253_reset (DEVICE *dptr, uint16 base); +extern int32 i8255_devnum; +extern t_stat i8255_reset (DEVICE *dptr, uint16 base); +extern int32 i8259_devnum; +extern t_stat i8259_reset (DEVICE *dptr, uint16 base); +extern uint8 EPROM_get_mbyte(uint16 addr); +extern UNIT EPROM_unit; +extern t_stat EPROM_reset (DEVICE *dptr, uint16 size); +extern uint8 RAM_get_mbyte(uint16 addr); +extern void RAM_put_mbyte(uint16 addr, uint8 val); +extern UNIT RAM_unit; +extern t_stat RAM_reset (DEVICE *dptr, uint16 base, uint16 size); + +/* SBC reset routine */ + +t_stat SBC_reset (DEVICE *dptr) +{ + sim_printf("Initializing iSBC-80/24 SBC\n Onboard Devices:\n"); + i8080_reset (NULL); + i8251_devnum = 0; + i8251_reset (NULL, I8251_BASE); + i8253_devnum = 0; + i8253_reset (NULL, I8253_BASE); + i8255_devnum = 0; + i8255_reset (NULL, I8255_BASE_0); + i8255_reset (NULL, I8255_BASE_1); + i8259_devnum = 0; + i8259_reset (NULL, I8259_BASE); + EPROM_reset (NULL, ROM_SIZE); + RAM_reset (NULL, RAM_BASE, RAM_SIZE); + return SCPE_OK; +} + +/* get a byte from memory - handle RAM, ROM, I/O, and Multibus memory */ + +uint8 get_mbyte(uint16 addr) +{ + /* if local EPROM handle it */ + if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */ + if ((addr >= EPROM_unit.u3) && ((uint16)addr < (EPROM_unit.u3 + EPROM_unit.capac))) { + return EPROM_get_mbyte(addr); + } + } /* if local RAM handle it */ + if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */ + if ((addr >= RAM_unit.u3) && ((uint16)addr < (RAM_unit.u3 + RAM_unit.capac))) { + return RAM_get_mbyte(addr); + } + } /* otherwise, try the multibus */ + return multibus_get_mbyte(addr); +} + +/* get a word from memory */ + +uint16 get_mword(uint16 addr) +{ + uint16 val; + + val = get_mbyte(addr); + val |= (get_mbyte(addr+1) << 8); + return val; +} + +/* put a byte to memory - handle RAM, ROM, I/O, and Multibus memory */ + +void put_mbyte(uint16 addr, uint8 val) +{ + /* if local EPROM handle it */ + if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */ + if ((addr >= EPROM_unit.u3) && ((uint16)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) { + sim_printf("Write to R/O memory address %04X from PC=%04X - ignored\n", addr, PCX); + return; + } + } /* if local RAM handle it */ + if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */ + if ((addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) { + RAM_put_mbyte(addr, val); + return; + } + } /* otherwise, try the multibus */ + multibus_put_mbyte(addr, val); +} + +/* put a word to memory */ + +void put_mword(uint16 addr, uint16 val) +{ + put_mbyte(addr, val & 0xff); + put_mbyte(addr+1, val >> 8); +} + +/* end of iSBC80-24.c */ diff --git a/Intel-Systems/isys8030/isys8030_cfg.h b/Intel-Systems/isys8024/isys8024_sys.c similarity index 50% rename from Intel-Systems/isys8030/isys8030_cfg.h rename to Intel-Systems/isys8024/isys8024_sys.c index 6167f04f..6a6c8333 100644 --- a/Intel-Systems/isys8030/isys8030_cfg.h +++ b/Intel-Systems/isys8024/isys8024_sys.c @@ -1,7 +1,4 @@ -/* system_80_20_cfg.h: Intel System 80/20 simulator definitions - - This file holds the configuration for the System 80/20 - boards I/O and Memory. +/* sys-8010_sys.c: multibus system interface Copyright (c) 2010, William A. Beech @@ -26,16 +23,62 @@ used in advertising or otherwise to promote the sale, use or other dealings in this Software without prior written authorization from William A. Beech. - 16 Dec 12 - Original file + ?? ??? 10 - Original file. + 16 Dec 12 - Modified to use isbc_80_10.cfg file to set base and size. */ -/* set the base I/O address for the iSBC 208 */ -#define SBC208_BASE 0x40 +#include "system_defs.h" -/* configure interrupt request line */ -#define SBC208_INT INT_1 +extern DEVICE i8080_dev; +extern REG i8080_reg[]; +extern DEVICE i8251_dev; +extern DEVICE i8253_dev; +extern DEVICE i8255_dev; +extern DEVICE i8259_dev; +extern DEVICE EPROM_dev; +extern DEVICE RAM_dev; +extern DEVICE multibus_dev; +extern DEVICE isbc201_dev; +extern DEVICE isbc202_dev; +extern DEVICE isbc064_dev; -/* set the base and size for the iSBC 064 */ -#define SBC064_BASE 0x0000 -#define SBC064_SIZE 0x10000 +/* SCP data structures + + sim_name simulator name string + sim_PC pointer to saved PC register descriptor + sim_emax number of words needed for examine + sim_devices array of pointers to simulated devices + sim_stop_messages array of pointers to stop messages +*/ + +char sim_name[] = "Intel System 80/24"; + +REG *sim_PC = &i8080_reg[0]; + +int32 sim_emax = 4; + +DEVICE *sim_devices[] = { + &i8080_dev, + &i8251_dev, + &i8253_dev, + &i8255_dev, + &i8259_dev, + &EPROM_dev, + &RAM_dev, + &multibus_dev, + &isbc064_dev, + &isbc201_dev, + &isbc202_dev, + NULL +}; + +const char *sim_stop_messages[] = { + "Unknown error", + "Unknown I/O Instruction", + "HALT instruction", + "Breakpoint", + "Invalid Opcode", + "Invalid Memory", + "XACK Error" +}; diff --git a/Intel-Systems/isys8024/system_defs.h b/Intel-Systems/isys8024/system_defs.h new file mode 100644 index 00000000..1a6a2354 --- /dev/null +++ b/Intel-Systems/isys8024/system_defs.h @@ -0,0 +1,138 @@ +/* system_defs.h: Intel iSBC simulator definitions + + Copyright (c) 2010, William A. Beech + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of William A. Beech shall not be + used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from William A. Beech. + + ?? ??? 10 - Original file. +*/ + +#include +#include +#include "sim_defs.h" /* simulator defns */ + +#define SET_XACK(VAL) (xack = VAL) + +//chip definitions for the iSBC-80/10 +/* set the base I/O address and device count for the 8251s */ +#define I8251_BASE 0xEC +#define I8251_NUM 1 + +/* set the base I/O address for the 8253/8254 */ +#define I8253_BASE 0xDC +#define I8253_NUM 1 + +/* set the base I/O address and device count for the 8255s */ +#define I8255_BASE_0 0xE4 +#define I8255_BASE_1 0xE8 +#define I8255_NUM 2 + +/* set the base I/O address for the 8259 */ +#define I8259_BASE 0xDA +#define I8259_NUM 1 + +/* set the base and size for the EPROM on the iSBC 80/10 */ +#define ROM_BASE 0x0000 +#define ROM_SIZE 0x1000 +#define ROM_DISABLE 1 + +/* set the base and size for the RAM on the iSBC 80/10 */ +#define RAM_BASE 0xF000 +#define RAM_SIZE 0x1000 +#define RAM_DISABLE 0 + +/* set INTR for CPU on the iSBC 80/10 */ +#define INTR INT_1 + +//board definitions for the multibus +/* set the base I/O address for the iSBC 201 */ +#define SBC201_BASE 0x78 +#define SBC201_INT INT_1 +#define SBC201_NUM 0 + +/* set the base I/O address for the iSBC 202 */ +#define SBC202_BASE 0x78 +#define SBC202_INT INT_1 +#define SBC202_NUM 1 + +/* set the base for the zx-200a disk controller */ +#define ZX200A_BASE_DD 0x78 +#define ZX200A_BASE_SD 0x88 +#define ZX200A_NUM 0 + +/* set the base I/O address for the iSBC 208 */ +#define SBC208_BASE 0x40 +#define SBC208_INT INT_1 +#define SBC208_NUM 0 + +/* set the base and size for the iSBC 064 */ +#define SBC064_BASE 0x0000 +#define SBC064_SIZE 0x10000 +#define SBC064_NUM 1 + +/* multibus interrupt definitions */ + +#define INT_0 0x01 +#define INT_1 0x02 +#define INT_2 0x04 +#define INT_3 0x08 +#define INT_4 0x10 +#define INT_5 0x20 +#define INT_6 0x40 +#define INT_7 0x80 + +/* CPU interrupts definitions */ + +#define INT_R 0x200 +#define I75 0x40 +#define I65 0x20 +#define I55 0x10 + +/* Memory */ + +#define MAXMEMSIZE 0x10000 /* 8080 max memory size */ +#define MEMSIZE (i8080_unit.capac) /* 8080 actual memory size */ +#define ADDRMASK (MAXMEMSIZE - 1) /* 8080 address mask */ +#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) + +/* debug definitions */ + +#define DEBUG_flow 0x0001 +#define DEBUG_read 0x0002 +#define DEBUG_write 0x0004 +#define DEBUG_level1 0x0008 +#define DEBUG_level2 0x0010 +#define DEBUG_reg 0x0020 +#define DEBUG_asm 0x0040 +#define DEBUG_xack 0x0080 +#define DEBUG_all 0xFFFF + +/* Simulator stop codes */ + +#define STOP_RSRV 1 /* must be 1 */ +#define STOP_HALT 2 /* HALT */ +#define STOP_IBKPT 3 /* breakpoint */ +#define STOP_OPCODE 4 /* Invalid Opcode */ +#define STOP_IO 5 /* I/O error */ +#define STOP_MEM 6 /* Memory error */ +#define STOP_XACK 7 /* XACK error */ + diff --git a/Intel-Systems/isys8030/isbc80-30.c b/Intel-Systems/isys8030/isbc80-30.c deleted file mode 100644 index 89a2ca8e..00000000 --- a/Intel-Systems/isys8030/isbc80-30.c +++ /dev/null @@ -1,161 +0,0 @@ -/* iSBC80-30.c: Intel iSBC 80/30 Processor simulator - - Copyright (c) 2010, William A. Beech - - Permission is hereby granted, free of charge, to any person obtaining a - copy of this software and associated documentation files (the "Software"), - to deal in the Software without restriction, including without limitation - the rights to use, copy, modify, merge, publish, distribute, sublicense, - and/or sell copies of the Software, and to permit persons to whom the - Software is furnished to do so, subject to the following conditions: - - The above copyright notice and this permission notice shall be included in - all copies or substantial portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - Except as contained in this notice, the name of William A. Beech shall not be - used in advertising or otherwise to promote the sale, use or other dealings - in this Software without prior written authorization from William A. Beech. - - This software was written by Bill Beech, Dec 2010, to allow emulation of Multibus - Computer Systems. - - ?? ??? 10 - Original file. - 17 May 16 - Modified for the iSBC 80/30 Processor Card. -*/ - -#include "system_defs.h" - -/* set the base I/O address for the 8259 */ -#define I8259_BASE 0xD8 -#define I8259_NUM 1 - -/* set the base I/O address for the 8253 */ -#define I8253_BASE 0xDC -#define I8253_NUM 1 - -/* set the base I/O address for the 8255 */ -#define I8255_BASE_0 0xE4 -#define I8255_BASE_1 0xE8 -#define I8255_NUM 2 - -/* set the base I/O address for the 8251 */ -#define I8251_BASE 0xEC -#define I8251_NUM 1 - -/* set the base and size for the EPROM */ -#define ROM_BASE 0x0000 -#define ROM_SIZE 0x1000 - -/* set the base and size for the RAM */ -#define RAM_BASE 0x4000 -#define RAM_SIZE 0x2000 - -/* set INTR for CPU */ -#define INTR INT_1 - -/* function prototypes */ - -uint16 get_mbyte(uint16 addr); -uint8 get_mword(uint16 addr); -void put_mbyte(uint16 addr, uint8 val); -void put_mword(uint16 addr, uint16 val); -t_stat i80_10_reset (DEVICE *dptr); - -/* external function prototypes */ - -extern t_stat i8080_reset (DEVICE *dptr); /* reset the 8085 emulator */ -extern int32 multibus_get_mbyte(uint16 addr); -extern void multibus_put_mbyte(uint16 addr, uint8 val); -extern int32 EPROM_get_mbyte(uint16 addr); -extern int32 RAM_get_mbyte(uint16 addr); -extern void RAM_put_mbyte(uint16, uint8 val); -extern UNIT i8251_unit; -extern UNIT i8253_unit; -extern UNIT i8255_unit; -extern UNIT i8259_unit; -extern UNIT EPROM_unit; -extern UNIT RAM_unit; -extern t_stat i8259_reset (DEVICE *dptr, uint16 base); -extern t_stat i8253_reset (DEVICE *dptr, uint16 base); -extern t_stat i8255_reset (DEVICE *dptr, uint16 base); -extern t_stat i8251_reset (DEVICE *dptr, uint16 base); -extern t_stat pata_reset (DEVICE *dptr, uint16 base); -extern t_stat EPROM_reset (DEVICE *dptr, uint16 size); -extern t_stat RAM_reset (DEVICE *dptr, uint16 base, uint16 size); - -/* CPU reset routine - put here to cause a reset of the entire iSBC system */ - -t_stat SBC_reset (DEVICE *dptr) -{ - sim_printf("Initializing iSBC-80/30\n"); - i8080_reset(NULL); - i8259_reset(NULL, I8259_BASE); - i8253_reset(NULL, I8253_BASE); - i8255_reset(NULL, I8255_BASE_0); - i8255_reset(NULL, I8255_BASE_1); - i8251_reset(NULL, I8251_BASE); - EPROM_reset(NULL, ROM_SIZE); - RAM_reset(NULL, RAM_BASE, RAM_SIZE); - return SCPE_OK; -} - -/* get a byte from memory - handle RAM, ROM and Multibus memory */ - -uint8 get_mbyte(uint16 addr) -{ - int32 val, org, len; - - /* if local EPROM handle it */ - if ((i8255_unit.u6 & 0x01) && (addr >= EPROM_unit.u3) && (addr < (EPROM_unit.u3 + EPROM_unit.capac))) { - return EPROM_get_mbyte(addr); - } /* if local RAM handle it */ - if ((i8255_unit.u6 & 0x02) && (addr >= RAM_unit.u3) && (addr < (RAM_unit.u3 + RAM_unit.capac))) { - return RAM_get_mbyte(addr); - } /* otherwise, try the multibus */ - return multibus_get_mbyte(addr); -} - -/* get a word from memory */ - -uint16 get_mword(uint16 addr) -{ - int32 val; - - val = get_mbyte(addr); - val |= (get_mbyte(addr+1) << 8); - return val; -} - -/* put a byte to memory - handle RAM, ROM and Multibus memory */ - -void put_mbyte(uint16 addr, uint8 val) -{ - /* if local EPROM handle it */ - if ((i8255_unit.u6 & 0x01) && (addr >= EPROM_unit.u3) && (addr <= (EPROM_unit.u3 + EPROM_unit.capac))) { - sim_printf("Write to R/O memory address %04X - ignored\n", addr); - return; - } /* if local RAM handle it */ - if ((i8255_unit.u6 & 0x02) && (addr >= RAM_unit.u3) && (addr <= (RAM_unit.u3 + RAM_unit.capac))) { - RAM_put_mbyte(addr, val); - return; - } /* otherwise, try the multibus */ - multibus_put_mbyte(addr, val); -} - -/* put a word to memory */ - -void put_mword(uint16 addr, uint16 val) -{ - put_mbyte(addr, val); - put_mbyte(addr+1, val >> 8); -} - -/* end of iSBC80-30.c */ diff --git a/Intel-Systems/isys8030/isbc8030.c b/Intel-Systems/isys8030/isbc8030.c new file mode 100644 index 00000000..22ee36d5 --- /dev/null +++ b/Intel-Systems/isys8030/isbc8030.c @@ -0,0 +1,147 @@ +/* iSBC80-30.c: Intel iSBC 80/30 Processor simulator + + Copyright (c) 2010, William A. Beech + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of William A. Beech shall not be + used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from William A. Beech. + + MODIFICATIONS: + + 04 Nov 16 - Original file. + + NOTES: + + This software was written by Bill Beech, Nov 2016, to allow emulation of Multibus + Computer Systems. +*/ + +#include "system_defs.h" + +/* function prototypes */ + +uint8 get_mbyte(uint16 addr); +uint16 get_mword(uint16 addr); +void put_mbyte(uint16 addr, uint8 val); +void put_mword(uint16 addr, uint16 val); +t_stat SBC_reset (DEVICE *dptr); + +/* external globals */ + +extern uint8 i8255_C[4]; //port C byte I/O + +/* external function prototypes */ + +extern uint8 multibus_get_mbyte(uint16 addr); +extern void multibus_put_mbyte(uint16 addr, uint8 val); +extern t_stat i8080_reset (DEVICE *dptr); /* reset the 8080 emulator */ +extern int32 i8251_devnum; +extern t_stat i8251_reset (DEVICE *dptr, uint16 base); +extern int32 i8253_devnum; +extern t_stat i8253_reset (DEVICE *dptr, uint16 base); +extern int32 i8255_devnum; +extern t_stat i8255_reset (DEVICE *dptr, uint16 base); +extern int32 i8259_devnum; +extern t_stat i8259_reset (DEVICE *dptr, uint16 base); +extern uint8 EPROM_get_mbyte(uint16 addr); +extern UNIT EPROM_unit; +extern t_stat EPROM_reset (DEVICE *dptr, uint16 size); +extern uint8 RAM_get_mbyte(uint16 addr); +extern void RAM_put_mbyte(uint16 addr, uint8 val); +extern UNIT RAM_unit; +extern t_stat RAM_reset (DEVICE *dptr, uint16 base, uint16 size); + +/* SBC reset routine */ + +t_stat SBC_reset (DEVICE *dptr) +{ + sim_printf("Initializing iSBC-80/24:\n"); + i8080_reset (NULL); + i8251_devnum = 0; + i8251_reset (NULL, I8251_BASE); + i8253_devnum = 0; + i8253_reset (NULL, I8253_BASE); + i8255_devnum = 0; + i8255_reset (NULL, I8255_BASE); + i8259_devnum = 0; + i8259_reset (NULL, I8259_BASE); + EPROM_reset (NULL, ROM_SIZE); + RAM_reset (NULL, RAM_BASE, RAM_SIZE); + return SCPE_OK; +} + +/* get a byte from memory - handle RAM, ROM, I/O, and Multibus memory */ + +uint8 get_mbyte(uint16 addr) +{ + /* if local EPROM handle it */ + if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */ + if ((addr >= EPROM_unit.u3) && ((uint16)addr < (EPROM_unit.u3 + EPROM_unit.capac))) { + return EPROM_get_mbyte(addr); + } + } /* if local RAM handle it */ + if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */ + if ((addr >= RAM_unit.u3) && ((uint16)addr < (RAM_unit.u3 + RAM_unit.capac))) { + return RAM_get_mbyte(addr); + } + } /* otherwise, try the multibus */ + return multibus_get_mbyte(addr); +} + +/* get a word from memory */ + +uint16 get_mword(uint16 addr) +{ + uint16 val; + + val = get_mbyte(addr); + val |= (get_mbyte(addr+1) << 8); + return val; +} + +/* put a byte to memory - handle RAM, ROM, I/O, and Multibus memory */ + +void put_mbyte(uint16 addr, uint8 val) +{ + /* if local EPROM handle it */ + if ((ROM_DISABLE && (i8255_C[0] & 0x20)) || (ROM_DISABLE == 0)) { /* EPROM enabled */ + if ((addr >= EPROM_unit.u3) && ((uint16)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) { + sim_printf("Write to R/O memory address %04X - ignored\n", addr); + return; + } + } /* if local RAM handle it */ + if ((RAM_DISABLE && (i8255_C[0] & 0x10)) || (RAM_DISABLE == 0)) { /* RAM enabled */ + if ((addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) { + RAM_put_mbyte(addr, val); + return; + } + } /* otherwise, try the multibus */ + multibus_put_mbyte(addr, val); +} + +/* put a word to memory */ + +void put_mword(uint16 addr, uint16 val) +{ + put_mbyte(addr, val & 0xff); + put_mbyte(addr+1, val >> 8); +} + +/* end of iSBC80-30.c */ diff --git a/Intel-Systems/isys8030/isys8030_sys.c b/Intel-Systems/isys8030/isys8030_sys.c index 8e82c56d..7a8fc535 100644 --- a/Intel-Systems/isys8030/isys8030_sys.c +++ b/Intel-Systems/isys8030/isys8030_sys.c @@ -24,20 +24,21 @@ in this Software without prior written authorization from William A. Beech. ?? ??? 10 - Original file. - 16 Dec 12 - Modified to use isbc_80_10.cfg file to set base and size. */ #include "system_defs.h" extern DEVICE i8080_dev; extern REG i8080_reg[]; -extern DEVICE i8259_dev; extern DEVICE i8251_dev; +extern DEVICE i8253_dev; extern DEVICE i8255_dev; +extern DEVICE i8259_dev; extern DEVICE EPROM_dev; extern DEVICE RAM_dev; extern DEVICE multibus_dev; -extern DEVICE isbc208_dev; +extern DEVICE isbc201_dev; +extern DEVICE isbc202_dev; extern DEVICE isbc064_dev; /* SCP data structures @@ -49,7 +50,7 @@ extern DEVICE isbc064_dev; sim_stop_messages array of pointers to stop messages */ -char sim_name[] = "Intel System 80/20"; +char sim_name[] = "Intel System 80/10"; REG *sim_PC = &i8080_reg[0]; @@ -57,14 +58,16 @@ int32 sim_emax = 4; DEVICE *sim_devices[] = { &i8080_dev, + &i8251_dev, + &i8253_dev, + &i8255_dev, + &i8259_dev, &EPROM_dev, &RAM_dev, - &i8259_dev, - &i8251_dev, - &i8255_dev, &multibus_dev, &isbc064_dev, - &isbc208_dev, + &isbc201_dev, + &isbc202_dev, NULL }; diff --git a/Intel-Systems/isys8030/system_defs.h b/Intel-Systems/isys8030/system_defs.h index 6a9a6b27..56a5acf1 100644 --- a/Intel-Systems/isys8030/system_defs.h +++ b/Intel-Systems/isys8030/system_defs.h @@ -24,14 +24,74 @@ in this Software without prior written authorization from William A. Beech. ?? ??? 10 - Original file. - 16 Dec 12 - Modified to use isbc_80_10.cfg file to set base and size. */ #include #include -#include "isys8020_cfg.h" /* Intel System 80/20 configuration */ #include "sim_defs.h" /* simulator defns */ +#define SET_XACK(VAL) (xack = VAL) + +//chip definitions for the iSBC-80/30 +/* set the base I/O address for the 8253/8254 */ +#define I8041_BASE 0xDC +#define I8041_NUM 1 + +/* set the base I/O address and device count for the 8251s */ +#define I8251_BASE 0xEC +#define I8251_NUM 1 + +/* set the base I/O address for the 8253/8254 */ +#define I8253_BASE 0xDC +#define I8253_NUM 1 + +/* set the base I/O address and device count for the 8255s */ +#define I8255_BASE 0xE8 +#define I8255_NUM 1 + +/* set the base I/O address for the 8259 */ +#define I8259_BASE 0xDA +#define I8259_NUM 1 + +/* set the base and size for the EPROM on the iSBC 80/30 */ +#define ROM_BASE 0x0000 +#define ROM_SIZE 0x1000 +#define ROM_DISABLE 1 + +/* set the base and size for the RAM on the iSBC 80/30 */ +#define RAM_BASE 0xF000 +#define RAM_SIZE 0x1000 +#define RAM_DISABLE 0 + +/* set INTR for CPU on the iSBC 80/30 */ +#define INTR INT_1 + +//board definitions for the multibus +/* set the base I/O address for the iSBC 201 */ +#define SBC201_BASE 0x78 +#define SBC201_INT INT_1 +#define SBC201_NUM 0 + +/* set the base I/O address for the iSBC 202 */ +#define SBC202_BASE 0x78 +#define SBC202_INT INT_1 +#define SBC202_NUM 1 + +/* set the base for the zx-200a disk controller */ +#define ZX200A_BASE_DD 0x78 +#define ZX200A_BASE_SD 0x88 +#define ZX200A_NUM 0 + +/* set the base I/O address for the iSBC 208 */ +#define SBC208_BASE 0x40 +#define SBC208_INT INT_1 +#define SBC208_NUM 0 + +/* set the base and size for the iSBC 064 */ +#define SBC064_BASE 0x0000 +#define SBC064_SIZE 0x10000 +#define SBC064_NUM 1 + /* multibus interrupt definitions */ #define INT_0 0x01 diff --git a/Visual Studio Projects/Simh.sln b/Visual Studio Projects/Simh.sln index 860a156b..253b8e8c 100644 --- a/Visual Studio Projects/Simh.sln +++ b/Visual Studio Projects/Simh.sln @@ -233,6 +233,10 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "CDC1700", "CDC1700.vcproj", {D40F3AF1-EEE7-4432-9807-2AD287B490F8} = {D40F3AF1-EEE7-4432-9807-2AD287B490F8} EndProjectSection EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "isys8030", "isys8030.vcproj", "{4980F98D-7887-4272-B156-8E7C8AAA4F50}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "isys8024", "isys8024.vcproj", "{ACCC3A24-56CD-4543-81F3-5F6A5E24F338}" +EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution Debug|Win32 = Debug|Win32 @@ -427,6 +431,14 @@ Global {2D532F83-02F3-4169-9778-23E52D951FDE}.Debug|Win32.Build.0 = Debug|Win32 {2D532F83-02F3-4169-9778-23E52D951FDE}.Release|Win32.ActiveCfg = Release|Win32 {2D532F83-02F3-4169-9778-23E52D951FDE}.Release|Win32.Build.0 = Release|Win32 + {4980F98D-7887-4272-B156-8E7C8AAA4F50}.Debug|Win32.ActiveCfg = Debug|Win32 + {4980F98D-7887-4272-B156-8E7C8AAA4F50}.Debug|Win32.Build.0 = Debug|Win32 + {4980F98D-7887-4272-B156-8E7C8AAA4F50}.Release|Win32.ActiveCfg = Release|Win32 + {4980F98D-7887-4272-B156-8E7C8AAA4F50}.Release|Win32.Build.0 = Release|Win32 + {ACCC3A24-56CD-4543-81F3-5F6A5E24F338}.Debug|Win32.ActiveCfg = Debug|Win32 + {ACCC3A24-56CD-4543-81F3-5F6A5E24F338}.Debug|Win32.Build.0 = Debug|Win32 + {ACCC3A24-56CD-4543-81F3-5F6A5E24F338}.Release|Win32.ActiveCfg = Release|Win32 + {ACCC3A24-56CD-4543-81F3-5F6A5E24F338}.Release|Win32.Build.0 = Release|Win32 EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE diff --git a/Visual Studio Projects/isys8024.vcproj b/Visual Studio Projects/isys8024.vcproj new file mode 100644 index 00000000..af71847c --- /dev/null +++ b/Visual Studio Projects/isys8024.vcproj @@ -0,0 +1,371 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Visual Studio Projects/isys8030.vcproj b/Visual Studio Projects/isys8030.vcproj new file mode 100644 index 00000000..b7a6d7e5 --- /dev/null +++ b/Visual Studio Projects/isys8030.vcproj @@ -0,0 +1,371 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/makefile b/makefile index 6192649a..9a8d3b35 100644 --- a/makefile +++ b/makefile @@ -1527,8 +1527,8 @@ ALL = pdp1 pdp4 pdp7 pdp8 pdp9 pdp15 pdp11 pdp10 \ vax microvax3900 microvax1 rtvax1000 microvax2 vax730 vax750 vax780 vax8600 \ nova eclipse hp2100 hp3000 i1401 i1620 s3 altair altairz80 gri \ i7094 ibm1130 id16 id32 sds lgp h316 cdc1700 \ - swtp6800mp-a swtp6800mp-a2 tx-0 ssem \ - b5500 imds-225 imbpc ibmpcxt + swtp6800mp-a swtp6800mp-a2 tx-0 ssem isys8010 isys8020 \ + isys8030 b5500 imds-225 imbpc ibmpcxt isys8024 all : ${ALL}