AltairZ80: Changes to JAIR devices
I was having problems with the JAIR device keeping up with received data at 57.6K. This PR makes the following changes to the JAIR devices: - Refactors the service routines into STAT, TX and RX units - Adds a 128-byte input ring buffer - Corrects a null pointer exception - Adds overrun status bit implementation - Removes a tab with spaces
This commit is contained in:
Patrick Linstruth
Paul Koning
parent
1e4a43d8f8
commit
c55b964921
1 changed files with 232 additions and 122 deletions
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@ -72,6 +72,8 @@ static DEBTAB jair_dt[] = {
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static t_stat jair_reset(DEVICE *dptr);
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static t_stat jair_port_reset(DEVICE *dptr);
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static t_stat jair_svc(UNIT *uptr);
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static t_stat jair_rx_svc(UNIT *uptr);
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static t_stat jair_tx_svc(UNIT *uptr);
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static t_stat jair_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
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static t_stat jair_boot(int32 unitno, DEVICE *dptr);
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static t_stat jair_attach(UNIT *uptr, CONST char *cptr);
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@ -83,6 +85,8 @@ static t_stat jair_config_line(DEVICE *dev, TMLN *tmln, int baud);
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static const char* jairs0_description(DEVICE *dptr);
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static const char* jairs1_description(DEVICE *dptr);
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static const char* jairp_description(DEVICE *dptr);
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static int jair_get_modem_status(UNIT *uptr);
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static void jair_get_rxdata(UNIT *uptr);
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static int jair_set_mc(TMLN *tmln, uint8 data);
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static int jair_new_baud(UNIT *uptr);
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static t_stat jair_set_baud(UNIT *uptr, int32 value, const char *cptr, void *desc);
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@ -604,6 +608,7 @@ static uint8 jair_ram[JAIR_ROM_SIZE] = {0};
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** BIT ASSIGNMENT MASKS
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*/
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#define JAIR_DR 0x01 /* SERIAL DATA READY */
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#define JAIR_OE 0x02 /* SERIAL OVERRUN ERROR */
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#define JAIR_THRE 0x20 /* SERIAL TRANSMITTER BUFFER EMPTY */
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#define JAIR_TEMT 0x40 /* SERIAL TRANSMITTER BUFFER EMPTY */
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#define JAIR_DLAB 0x80 /* DIVISOR LATCH ACCESS BIT */
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@ -625,6 +630,9 @@ static uint8 jair_ram[JAIR_ROM_SIZE] = {0};
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#define JAIR_STATE_SBLK 3 /* start block */
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#define JAIR_STATE_WBLK 4 /* write block */
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#define JAIR_STAT_WAIT 10000 /* Status wait interval */
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#define JAIR_IO_WAIT 250 /* IO wait interval */
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/*
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** SD Commands
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*/
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@ -651,6 +659,8 @@ static uint8 jair_ram[JAIR_ROM_SIZE] = {0};
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#define UNIT_JAIR_WPROTECT (1 << UNIT_V_JAIR_WPROTECT)
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#define UNIT_V_JAIR_ROM (UNIT_V_UF + 2) /* WRTENB / WRTPROT */
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#define UNIT_JAIR_ROM (1 << UNIT_V_JAIR_ROM)
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#define UNIT_V_JAIR_CONSOLE (UNIT_V_UF + 3) /* Port checks console for input */
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#define UNIT_JAIR_CONSOLE (1 << UNIT_V_JAIR_CONSOLE)
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/*
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** JAIR Registers and Interface Controls
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@ -729,6 +739,15 @@ DEVICE jair_dev = {
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/* GENERIC PORT */
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/****************/
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#define JAIR_IOBUF_SIZE (128)
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#define JAIR_IOBUF_MASK (JAIR_IOBUF_SIZE-1)
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#define JAIR_PORT_UNITS 3
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#define JAIR_UNIT_STAT 0
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#define JAIR_UNIT_RX 1
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#define JAIR_UNIT_TX 2
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typedef struct {
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PNP_INFO pnp; /* Must be first */
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int32 conn; /* Connected Status */
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@ -749,6 +768,9 @@ typedef struct {
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uint8 dlms; /* Divisor Latch MS */
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TMLN *tmln; /* TMLN pointer */
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TMXR *tmxr; /* TMXR pointer */
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int32 iobuf[JAIR_IOBUF_SIZE];
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uint32 iobufin;
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uint32 iobufout;
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} JAIR_PORT_CTX;
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/**************************/
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@ -783,14 +805,17 @@ static REG jairs0_reg[] = {
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{ HRDATAD (TXD0, jairs0_ctx.txd, 8, "Serial port TX data register"), },
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{ HRDATAD (RDR0, jairs0_ctx.rdr, 1, "Serial port RX data ready"), },
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{ HRDATAD (RXD0, jairs0_ctx.rxd, 8, "Serial port RX register"), },
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{ HRDATAD (BUFIN0, jairs0_ctx.iobufin, 16, "Serial port buffer in ptr"), },
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{ HRDATAD (BUFOUT0, jairs0_ctx.iobufout, 16, "Serial port buffer out ptr"), },
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{ HRDATAD (LSR0, jairs0_ctx.lsr, 8, "Serial port line status register"), },
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{ HRDATAD (MSR0, jairs0_ctx.msr, 8, "Serial port modem status register"), },
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{ NULL }
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};
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static UNIT jairs0_unit[] = {
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{ UDATA (&jair_svc, UNIT_ATTABLE, 0), (int) USECS_PER_SECOND / 1000 }
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static UNIT jairs0_unit[JAIR_PORT_UNITS] = {
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{ UDATA (&jair_svc, UNIT_ATTABLE | UNIT_JAIR_CONSOLE, 0), JAIR_STAT_WAIT },
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{ UDATA (&jair_rx_svc, UNIT_DIS | UNIT_JAIR_CONSOLE, 0), JAIR_IO_WAIT },
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{ UDATA (&jair_tx_svc, UNIT_DIS | UNIT_JAIR_CONSOLE, 0), JAIR_IO_WAIT }
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};
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static MTAB jairs0_mod[] = {
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@ -806,7 +831,7 @@ DEVICE jairs0_dev = {
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jairs0_unit, /* unit */
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jairs0_reg, /* registers */
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jairs0_mod, /* modifiers */
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1, /* # units */
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JAIR_PORT_UNITS, /* # units */
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10, /* address radix */
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31, /* address width */
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1, /* addr increment */
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@ -826,7 +851,7 @@ DEVICE jairs0_dev = {
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NULL, /* logical name */
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NULL, /* help */
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NULL, /* attach help */
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NULL, /* context for help */
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&jairs0_tmxr, /* context for help */
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&jairs0_description /* description */
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};
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@ -862,13 +887,17 @@ static REG jairs1_reg[] = {
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{ HRDATAD (TXD1, jairs1_ctx.txd, 8, "Serial port TX data register"), },
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{ HRDATAD (RDR1, jairs1_ctx.rdr, 1, "Serial port RX data ready"), },
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{ HRDATAD (RXD1, jairs1_ctx.rxd, 8, "Serial port RX register"), },
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{ HRDATAD (BUFIN1, jairs1_ctx.iobufin, 16, "Serial port buffer in ptr"), },
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{ HRDATAD (BUFOUT1, jairs1_ctx.iobufout, 16, "Serial port buffer out ptr"), },
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{ HRDATAD (LSR1, jairs1_ctx.lsr, 8, "Serial port line status register"), },
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{ HRDATAD (MSR1, jairs1_ctx.msr, 8, "Serial port modem status register"), },
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{ NULL }
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};
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static UNIT jairs1_unit[] = {
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{ UDATA (&jair_svc, UNIT_ATTABLE, 0), (int) USECS_PER_SECOND / 1000 }
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static UNIT jairs1_unit[JAIR_PORT_UNITS] = {
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{ UDATA (&jair_svc, UNIT_ATTABLE, 0), JAIR_STAT_WAIT },
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{ UDATA (&jair_rx_svc, UNIT_DIS, 0), JAIR_IO_WAIT },
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{ UDATA (&jair_tx_svc, UNIT_DIS, 0), JAIR_IO_WAIT }
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};
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static MTAB jairs1_mod[] = {
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@ -884,7 +913,7 @@ DEVICE jairs1_dev = {
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jairs1_unit, /* unit */
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jairs1_reg, /* registers */
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jairs1_mod, /* modifiers */
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1, /* # units */
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JAIR_PORT_UNITS, /* # units */
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10, /* address radix */
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31, /* address width */
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1, /* addr increment */
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@ -904,7 +933,7 @@ DEVICE jairs1_dev = {
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NULL, /* logical name */
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NULL, /* help */
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NULL, /* attach help */
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NULL, /* context for help */
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&jairs1_tmxr, /* context for help */
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&jairs1_description /* description */
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};
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@ -943,8 +972,10 @@ static REG jairp_reg[] = {
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{ NULL }
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};
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static UNIT jairp_unit[] = {
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{ UDATA (&jair_svc, UNIT_ATTABLE, 0), (int) USECS_PER_SECOND / 1000 }
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static UNIT jairp_unit[JAIR_PORT_UNITS] = {
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{ UDATA (&jair_svc, UNIT_ATTABLE, 0), JAIR_STAT_WAIT },
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{ UDATA (&jair_rx_svc, UNIT_DIS, 0), JAIR_IO_WAIT },
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{ UDATA (&jair_tx_svc, UNIT_DIS, 0), JAIR_IO_WAIT }
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};
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static MTAB jairp_mod[] = {
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@ -958,7 +989,7 @@ DEVICE jairp_dev = {
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jairp_unit, /* unit */
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jairp_reg, /* registers */
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jairp_mod, /* modifiers */
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1, /* # units */
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JAIR_PORT_UNITS, /* # units */
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10, /* address radix */
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31, /* address width */
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1, /* addr increment */
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@ -978,7 +1009,7 @@ DEVICE jairp_dev = {
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NULL, /* logical name */
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NULL, /* help */
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NULL, /* attach help */
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NULL, /* context for help */
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&jairp_tmxr, /* context for help */
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&jairp_description /* description */
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};
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@ -1027,7 +1058,7 @@ static t_stat jair_reset(DEVICE *dptr)
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set_dev_enbdis(&jairs1_dev, NULL, 1, NULL);
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set_dev_enbdis(&jairp_dev, NULL, 1, NULL);
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first = FALSE;
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first = FALSE;
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}
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}
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@ -1042,20 +1073,9 @@ static t_stat jair_reset(DEVICE *dptr)
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return SCPE_OK;
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}
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/*
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* The BOOT command will enter the ROM at 0x0000
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*/
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static t_stat jair_boot(int32 unitno, DEVICE *dptr)
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{
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sim_printf("%s: Booting using ROM at 0x%04x\n", JAIR_SNAME, jair_ctx.rom_base);
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*((int32 *) sim_PC->loc) = jair_ctx.rom_base;
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return SCPE_OK;
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}
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static t_stat jair_port_reset(DEVICE *dptr) {
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JAIR_PORT_CTX *port;
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char uname[12];
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uint32 u;
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port = (JAIR_PORT_CTX *) dptr->ctxt;
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@ -1080,15 +1100,24 @@ static t_stat jair_port_reset(DEVICE *dptr) {
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/* Enable TMXR modem control passthrough */
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tmxr_set_modem_control_passthru(port->tmxr);
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tmxr_set_port_speed_control(port->tmxr);
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tmxr_set_line_unit(port->tmxr, 0, &dptr->units[JAIR_UNIT_RX]);
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tmxr_set_line_output_unit(port->tmxr, 0, &dptr->units[JAIR_UNIT_TX]);
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sprintf(uname, "%.6sRX", sim_uname(&dptr->units[JAIR_UNIT_RX]));
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sim_set_uname(&dptr->units[JAIR_UNIT_RX], uname);
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sprintf(uname, "%.6sTX", sim_uname(&dptr->units[JAIR_UNIT_TX]));
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sim_set_uname(&dptr->units[JAIR_UNIT_TX], uname);
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port->status = 0x00;
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port->rdr = FALSE;
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port->txp = FALSE;
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port->lsr = JAIR_TEMT | JAIR_THRE;
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port->msr = 0;
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port->iobufin = 0;
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port->iobufout = 0;
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for (u = 0; u < dptr->numunits; u++) {
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sim_activate_after(&dptr->units[u], dptr->units[u].wait); /* activate timer */
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sim_activate_abs(&dptr->units[u], dptr->units[u].wait); /* activate timer */
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}
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}
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@ -1096,7 +1125,19 @@ static t_stat jair_port_reset(DEVICE *dptr) {
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}
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/*
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* JAIR service routine
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* The BOOT command will enter the ROM at 0x0000
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*/
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static t_stat jair_boot(int32 unitno, DEVICE *dptr)
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{
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sim_printf("%s: Booting using ROM at 0x%04x\n", JAIR_SNAME, jair_ctx.rom_base);
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*((int32 *) sim_PC->loc) = jair_ctx.rom_base;
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return SCPE_OK;
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}
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/*
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* JAIR service routines
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*
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* The JAIR simulator has 3 I/O devices
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*
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@ -1107,10 +1148,7 @@ static t_stat jair_port_reset(DEVICE *dptr) {
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static t_stat jair_svc(UNIT *uptr)
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{
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JAIR_PORT_CTX *port;
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int32 c = 0;
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int32 s;
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t_stat r = SCPE_OK;
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uint8 msr;
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port = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
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@ -1120,10 +1158,63 @@ static t_stat jair_svc(UNIT *uptr)
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port->conn = 1; /* set connected */
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sim_printf("%s: new connection.\n", uptr->dptr->name);
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sim_debug(VERBOSE_MSG, &jair_dev, "new connection.\n");
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}
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}
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/* Update modem status register */
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if ((uptr->flags & UNIT_ATT) && port->conn) {
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jair_get_modem_status(uptr);
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}
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sim_activate_abs(uptr, uptr->wait); /* reactivate timer */
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return r;
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}
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static t_stat jair_rx_svc(UNIT *uptr)
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{
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UNIT *rxunit = uptr;
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JAIR_PORT_CTX *port;
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int32 c = 0;
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t_stat r = SCPE_OK;
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port = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
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/* switch to unit 0 */
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uptr = uptr->dptr->units;
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/* Buffer any received data */
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if ((uptr->flags & UNIT_ATT) && port->conn) {
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tmxr_poll_rx(port->tmxr);
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while ((c = tmxr_getc_ln(&port->tmln[0])) & TMXR_VALID) {
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port->iobuf[port->iobufin++] = c;
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port->iobufin &= JAIR_IOBUF_MASK;
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if (port->iobufin == port->iobufout) {
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port->iobufin--;
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port->iobufin &= JAIR_IOBUF_MASK;
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port->lsr |= JAIR_OE; /* Overrun Error */
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}
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}
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}
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sim_activate_abs(rxunit, rxunit->wait); /* reactivate timer */
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return r;
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}
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static t_stat jair_tx_svc(UNIT *uptr)
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{
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UNIT *txunit = uptr;
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JAIR_PORT_CTX *port;
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t_stat r = SCPE_OK;
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port = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
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/* switch to unit 0 */
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uptr = uptr->dptr->units;
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/* TX byte pending? */
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if (port->txp == TRUE) {
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if (uptr->flags & UNIT_ATT) {
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@ -1155,74 +1246,7 @@ static t_stat jair_svc(UNIT *uptr)
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port->lsr |= tmxr_txdone_ln(port->tmln) ? (JAIR_TEMT | JAIR_THRE) : 0;
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}
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/* Check for Data if RX buffer empty */
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if (port->rdr == FALSE) {
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if (uptr->flags & UNIT_ATT) {
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if (uptr->fileref) {
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if (sim_fread(&c, 1, 1, uptr->fileref) == 1) {
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c |= SCPE_KFLAG;
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}
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}
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else if (port->conn) {
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tmxr_poll_rx(port->tmxr);
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c = tmxr_getc_ln(&port->tmln[0]);
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}
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}
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else if (uptr == jairs0_unit) {
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c = sim_poll_kbd();
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}
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if (c & (TMXR_VALID | SCPE_KFLAG)) {
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port->rxd = c & 0xff;
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port->rdr = TRUE;
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port->lsr |= JAIR_DR;
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}
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}
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/* Update Modem Status Register */
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if (uptr->flags & UNIT_ATT && port->conn) {
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tmxr_set_get_modem_bits(port->tmln, 0, 0, &s);
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msr = port->msr;
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port->msr &= ~JAIR_CTS;
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port->msr |= (s & TMXR_MDM_CTS) ? JAIR_CTS : 0;
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/* CTS status changed */
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if ((msr ^ port->msr) & JAIR_CTS) {
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port->msr |= JAIR_DCTS;
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sim_debug(STATUS_MSG, uptr->dptr, "CTS state changed to %s.\n", (port->msr & JAIR_CTS) ? "HIGH" : "LOW");
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}
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port->msr &= ~JAIR_DSR;
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port->msr |= (s & TMXR_MDM_DSR) ? JAIR_DSR : 0;
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/* DSR status changed */
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if ((msr ^ port->msr) & JAIR_DSR) {
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port->msr |= JAIR_DDSR;
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sim_debug(STATUS_MSG, uptr->dptr, "DSR state changed to %s.\n", (port->msr & JAIR_DSR) ? "HIGH" : "LOW");
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}
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port->msr &= ~JAIR_RNG;
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port->msr |= (s & TMXR_MDM_RNG) ? JAIR_RNG : 0;
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/* RI status changed */
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if ((msr ^ port->msr) & JAIR_RNG) {
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port->msr |= (port->msr & JAIR_RNG) ? 0 : JAIR_DRNG; /* trailing edge to low */
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sim_debug(STATUS_MSG, uptr->dptr, "RNG state changed to %s.\n", (port->msr & JAIR_RNG) ? "HIGH" : "LOW");
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}
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port->msr &= ~JAIR_DCD;
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port->msr |= (s & TMXR_MDM_DCD) ? JAIR_DCD : 0;
|
||||
|
||||
/* DCD status changed */
|
||||
if ((msr ^ port->msr) & JAIR_DCD) {
|
||||
port->msr |= JAIR_DDCD;
|
||||
sim_debug(STATUS_MSG, uptr->dptr, "DCD state changed to %s.\n", (port->msr & JAIR_DCD) ? "HIGH" : "LOW");
|
||||
}
|
||||
}
|
||||
|
||||
r = sim_activate_after(uptr, uptr->wait); /* reactivate timer */
|
||||
sim_activate_abs(txunit, txunit->wait); /* reactivate timer */
|
||||
|
||||
return r;
|
||||
}
|
||||
|
|
@ -1305,7 +1329,7 @@ static t_stat jair_attach_mux(UNIT *uptr, CONST char *cptr)
|
|||
|
||||
if ((r = tmxr_attach(xptr->tmxr, uptr, cptr)) == SCPE_OK) {
|
||||
xptr->tmln[0].rcve = 1;
|
||||
sim_printf("%s: attached '%s' to interface.\n", uptr->dptr->name, cptr);
|
||||
sim_debug(VERBOSE_MSG, uptr->dptr, "attached '%s' to interface.\n", cptr);
|
||||
tmxr_set_get_modem_bits(xptr->tmln, TMXR_MDM_DTR | TMXR_MDM_RTS, 0, NULL);
|
||||
}
|
||||
|
||||
|
|
@ -1323,14 +1347,13 @@ static t_stat jair_detach_mux(UNIT *uptr)
|
|||
|
||||
xptr = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
|
||||
|
||||
if ((r = tmxr_detach(xptr->tmxr, uptr)) == SCPE_OK) {
|
||||
sim_printf("%s: detached.\n", uptr->dptr->name);
|
||||
}
|
||||
r = tmxr_detach(xptr->tmxr, uptr);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
static t_stat jair_show_ports(FILE *st, UNIT *uptr, int32 val, CONST void *desc) {
|
||||
static t_stat jair_show_ports(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||||
{
|
||||
JAIR_PORT_CTX *port;
|
||||
|
||||
port = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
|
||||
|
|
@ -1342,17 +1365,97 @@ static t_stat jair_show_ports(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
|||
static t_stat jair_config_line(DEVICE *dev, TMLN *tmln, int baud)
|
||||
{
|
||||
char config[20];
|
||||
const char *fmt;
|
||||
t_stat r = SCPE_IERR;
|
||||
|
||||
sprintf(config, "%d-8N1", baud);
|
||||
|
||||
if (tmln->serport) {
|
||||
fmt = "8N1";
|
||||
|
||||
sprintf(config, "%d-%s", baud, fmt);
|
||||
|
||||
r = tmxr_set_config_line(tmln, config);
|
||||
}
|
||||
|
||||
sim_debug(STATUS_MSG, dev, "port configuration set to '%s'.\n", config);
|
||||
sim_debug(STATUS_MSG, dev, "port configuration set to '%s'.\n", config);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
static void jair_get_rxdata(UNIT *uptr)
|
||||
{
|
||||
JAIR_PORT_CTX *port;
|
||||
int32 c = 0xff;
|
||||
|
||||
port = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
|
||||
|
||||
if (uptr->flags & UNIT_ATT) {
|
||||
if (uptr->fileref) {
|
||||
if (sim_fread(&c, 1, 1, uptr->fileref) == 1) {
|
||||
c |= SCPE_KFLAG;
|
||||
}
|
||||
}
|
||||
else if (port->conn) {
|
||||
if (port->iobufin != port->iobufout) {
|
||||
c = port->iobuf[port->iobufout++];
|
||||
port->iobufout &= JAIR_IOBUF_MASK;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (uptr->flags & UNIT_JAIR_CONSOLE) {
|
||||
c = sim_poll_kbd();
|
||||
}
|
||||
|
||||
if (c & (TMXR_VALID | SCPE_KFLAG)) {
|
||||
port->rxd = c & 0xff;
|
||||
port->rdr = TRUE;
|
||||
port->lsr |= JAIR_DR;
|
||||
}
|
||||
}
|
||||
|
||||
static int jair_get_modem_status(UNIT *uptr)
|
||||
{
|
||||
JAIR_PORT_CTX *port;
|
||||
uint8 msr;
|
||||
int32 s;
|
||||
t_stat r;
|
||||
|
||||
port = (JAIR_PORT_CTX *) uptr->dptr->ctxt;
|
||||
|
||||
r = tmxr_set_get_modem_bits(port->tmln, 0, 0, &s);
|
||||
|
||||
msr = port->msr;
|
||||
|
||||
port->msr &= ~JAIR_CTS;
|
||||
port->msr |= (s & TMXR_MDM_CTS) ? JAIR_CTS : 0;
|
||||
|
||||
/* CTS status changed */
|
||||
if ((msr ^ port->msr) & JAIR_CTS) {
|
||||
port->msr |= JAIR_DCTS;
|
||||
sim_debug(STATUS_MSG, uptr->dptr, "CTS state changed to %s.\n", (port->msr & JAIR_CTS) ? "HIGH" : "LOW");
|
||||
}
|
||||
|
||||
port->msr &= ~JAIR_DSR;
|
||||
port->msr |= (s & TMXR_MDM_DSR) ? JAIR_DSR : 0;
|
||||
|
||||
/* DSR status changed */
|
||||
if ((msr ^ port->msr) & JAIR_DSR) {
|
||||
port->msr |= JAIR_DDSR;
|
||||
sim_debug(STATUS_MSG, uptr->dptr, "DSR state changed to %s.\n", (port->msr & JAIR_DSR) ? "HIGH" : "LOW");
|
||||
}
|
||||
|
||||
port->msr &= ~JAIR_RNG;
|
||||
port->msr |= (s & TMXR_MDM_RNG) ? JAIR_RNG : 0;
|
||||
|
||||
/* RI status changed */
|
||||
if ((msr ^ port->msr) & JAIR_RNG) {
|
||||
port->msr |= (port->msr & JAIR_RNG) ? 0 : JAIR_DRNG; /* trailing edge to low */
|
||||
sim_debug(STATUS_MSG, uptr->dptr, "RNG state changed to %s.\n", (port->msr & JAIR_RNG) ? "HIGH" : "LOW");
|
||||
}
|
||||
|
||||
port->msr &= ~JAIR_DCD;
|
||||
port->msr |= (s & TMXR_MDM_DCD) ? JAIR_DCD : 0;
|
||||
|
||||
/* DCD status changed */
|
||||
if ((msr ^ port->msr) & JAIR_DCD) {
|
||||
port->msr |= JAIR_DDCD;
|
||||
sim_debug(STATUS_MSG, uptr->dptr, "DCD state changed to %s.\n", (port->msr & JAIR_DCD) ? "HIGH" : "LOW");
|
||||
}
|
||||
|
||||
return r;
|
||||
|
|
@ -1439,23 +1542,29 @@ static uint8 jair_io_in(uint32 addr)
|
|||
|
||||
switch(addr & 0xff) {
|
||||
case JAIR_UART0 + JAIR_LSR:
|
||||
if (!(jairs0_ctx.lsr & JAIR_DR)) {
|
||||
jair_get_rxdata(jairs0_unit);
|
||||
}
|
||||
data = jairs0_ctx.lsr;
|
||||
break;
|
||||
|
||||
case JAIR_UART1 + JAIR_LSR:
|
||||
if (!(jairs1_ctx.lsr & JAIR_DR)) {
|
||||
jair_get_rxdata(jairs1_unit);
|
||||
}
|
||||
data = jairs1_ctx.lsr;
|
||||
break;
|
||||
|
||||
case JAIR_UART0 + JAIR_SDATA:
|
||||
data = jairs0_ctx.rxd;
|
||||
jairs0_ctx.rdr = FALSE;
|
||||
jairs0_ctx.lsr &= ~JAIR_DR;
|
||||
jairs0_ctx.lsr &= ~(JAIR_DR | JAIR_OE);
|
||||
break;
|
||||
|
||||
case JAIR_UART1 + JAIR_SDATA:
|
||||
data = jairs1_ctx.rxd;
|
||||
jairs1_ctx.rdr = FALSE;
|
||||
jairs1_ctx.lsr &= ~JAIR_DR;
|
||||
jairs1_ctx.lsr &= ~(JAIR_DR | JAIR_OE);
|
||||
break;
|
||||
|
||||
case JAIR_UART0 + JAIR_MSR:
|
||||
|
|
@ -1509,8 +1618,6 @@ static uint8 jair_io_in(uint32 addr)
|
|||
break;
|
||||
|
||||
default:
|
||||
sim_printf("Invalid IO Read %02x\n", addr);
|
||||
|
||||
sim_debug(ERROR_MSG, &jair_dev, "READ Invalid I/O Address %02x (%02x)\n",
|
||||
addr & 0xFF, addr & 0x01);
|
||||
break;
|
||||
|
|
@ -1657,8 +1764,11 @@ static uint8 jair_io_out(uint32 addr, int32 data)
|
|||
sd_addr |= jair_ctx.sd_cmd[2] * 0x10000;
|
||||
sd_addr |= (uint32) jair_ctx.sd_cmd[3] * 0x100;
|
||||
sd_addr |= (uint32) jair_ctx.sd_cmd[4];
|
||||
|
||||
if (sim_fseek(jair_unit[0].fileref, sd_addr, SEEK_SET) != 0) {
|
||||
if (!(jair_unit[0].flags & UNIT_ATT)) {
|
||||
jair_ctx.sd_resp[0] |= 0x04;
|
||||
jair_ctx.sd_resp_len = 1;
|
||||
}
|
||||
else if (sim_fseek(jair_unit[0].fileref, sd_addr, SEEK_SET) != 0) {
|
||||
jair_ctx.sd_resp[0] |= 0x04;
|
||||
jair_ctx.sd_resp_len = 1;
|
||||
}
|
||||
|
|
@ -1672,7 +1782,6 @@ static uint8 jair_io_out(uint32 addr, int32 data)
|
|||
jair_ctx.sd_resp[3] |= 0xfe;
|
||||
jair_ctx.sd_resp_len = 4 + 512 + 2;
|
||||
}
|
||||
|
||||
jair_ctx.sd_resp_idx = 0;
|
||||
jair_ctx.sd_istate = JAIR_STATE_RESP;
|
||||
jair_ctx.sd_ostate = JAIR_STATE_IDLE;
|
||||
|
|
@ -1716,7 +1825,7 @@ static uint8 jair_io_out(uint32 addr, int32 data)
|
|||
jair_ctx.sd_resp_len = 1;
|
||||
jair_ctx.sd_istate = JAIR_STATE_RESP;
|
||||
jair_ctx.sd_ostate = JAIR_STATE_IDLE;
|
||||
sim_printf("Command not implemented: %d\n", jair_ctx.sd_cmd[0]);
|
||||
sim_debug(ERROR_MSG, &jair_dev, "Command not implemented: %d\n", jair_ctx.sd_cmd[0]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -1740,7 +1849,10 @@ static uint8 jair_io_out(uint32 addr, int32 data)
|
|||
sd_addr |= (uint32) jair_ctx.sd_cmd[3] * 0x100;
|
||||
sd_addr |= (uint32) jair_ctx.sd_cmd[4];
|
||||
|
||||
if (sim_fseek(jair_unit[0].fileref, sd_addr, SEEK_SET) != 0) {
|
||||
if (!(jair_unit[0].flags & UNIT_ATT)) {
|
||||
jair_ctx.sd_resp[0] = 0x0b;
|
||||
}
|
||||
else if (sim_fseek(jair_unit[0].fileref, sd_addr, SEEK_SET) != 0) {
|
||||
jair_ctx.sd_resp[0] = 0x0b;
|
||||
}
|
||||
else if (sim_fwrite(&jair_ctx.sd_cmd[6], 1, 512, jair_unit[0].fileref) != 512) {
|
||||
|
|
@ -1762,8 +1874,6 @@ static uint8 jair_io_out(uint32 addr, int32 data)
|
|||
break;
|
||||
|
||||
default:
|
||||
sim_printf("Invalid IO Write %02x\n", addr);
|
||||
|
||||
sim_debug(ERROR_MSG, &jair_dev, "WRITE Invalid I/O Address %02x (%02x)\n",
|
||||
addr & 0xFF, addr & 0x01);
|
||||
break;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue