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Compiler warning cleanup

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This commit is contained in:
Mark Pizzolato 2012-12-13 15:21:07 -08:00
parent 59afee3128
commit c71e0c39dc
12 changed files with 18 additions and 20 deletions
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6
PDP11/pdp11_cis.c
View file

@ -170,7 +170,7 @@ typedef struct {
uint32 val[DSTRLNT]; uint32 val[DSTRLNT];
} DSTR; } DSTR;
static DSTR Dstr0 = { 0, 0, 0, 0, 0 }; static DSTR Dstr0 = { 0, {0, 0, 0, 0} };
extern int32 isenable, dsenable; extern int32 isenable, dsenable;
extern int32 N, Z, V, C, fpd, ipl; extern int32 N, Z, V, C, fpd, ipl;
@ -327,8 +327,6 @@ static int32 binover[2][16] = {
'0', '0', '0', '0', '0', '0' '0', '0', '0', '0', '0', '0'
}; };
static unsigned char movbuf[65536];
/* CIS emulator */ /* CIS emulator */
t_stat cis11 (int32 IR) t_stat cis11 (int32 IR)
@ -342,7 +340,7 @@ uint32 nc, digit, result;
t_stat st; t_stat st;
static DSTR accum, src1, src2, dst; static DSTR accum, src1, src2, dst;
static DSTR mptable[10]; static DSTR mptable[10];
static DSTR Dstr1 = { 0, 0x10, 0, 0, 0 }; static DSTR Dstr1 = { 0, {0x10, 0, 0, 0} };
old_PC = (PC - 2) & 0177777; /* original PC */ old_PC = (PC - 2) & 0177777; /* original PC */
op = IR & 0177; /* IR <6:0> */ op = IR & 0177; /* IR <6:0> */

6
PDP11/pdp11_cpu.c
View file

@ -256,7 +256,7 @@ typedef struct {
extern FILE *sim_log; extern FILE *sim_log;
uint16 *M = NULL; /* memory */ uint16 *M = NULL; /* memory */
int32 REGFILE[6][2] = { 0 }; /* R0-R5, two sets */ int32 REGFILE[6][2] = { {0} }; /* R0-R5, two sets */
int32 STACKFILE[4] = { 0 }; /* SP, four modes */ int32 STACKFILE[4] = { 0 }; /* SP, four modes */
int32 saved_PC = 0; /* program counter */ int32 saved_PC = 0; /* program counter */
int32 R[8] = { 0 }; /* working registers */ int32 R[8] = { 0 }; /* working registers */
@ -273,7 +273,7 @@ int32 trap_req = 0; /* trap requests */
int32 int_req[IPL_HLVL] = { 0 }; /* interrupt requests */ int32 int_req[IPL_HLVL] = { 0 }; /* interrupt requests */
int32 PIRQ = 0; /* programmed int req */ int32 PIRQ = 0; /* programmed int req */
int32 STKLIM = 0; /* stack limit */ int32 STKLIM = 0; /* stack limit */
fpac_t FR[6] = { 0 }; /* fp accumulators */ fpac_t FR[6] = { {0} }; /* fp accumulators */
int32 FPS = 0; /* fp status */ int32 FPS = 0; /* fp status */
int32 FEC = 0; /* fp exception code */ int32 FEC = 0; /* fp exception code */
int32 FEA = 0; /* fp exception addr */ int32 FEA = 0; /* fp exception addr */
@ -1246,7 +1246,7 @@ while (reason == 0) {
else dst = R[dstspec]; else dst = R[dstspec];
} }
else { else {
i = ((cm == pm) && (cm == MD_USR))? calc_ds (pm): calc_is (pm); i = ((cm == pm) && (cm == MD_USR))? (int32)calc_ds (pm): (int32)calc_is (pm);
dst = ReadW ((GeteaW (dstspec) & 0177777) | i); dst = ReadW ((GeteaW (dstspec) & 0177777) | i);
} }
N = GET_SIGN_W (dst); N = GET_SIGN_W (dst);

2
PDP11/pdp11_cpumod.c
View file

@ -1159,7 +1159,7 @@ if ((mc != 0) && !get_yn ("Really truncate memory [N]?", FALSE))
nM = (uint16 *) calloc (val >> 1, sizeof (uint16)); nM = (uint16 *) calloc (val >> 1, sizeof (uint16));
if (nM == NULL) if (nM == NULL)
return SCPE_MEM; return SCPE_MEM;
clim = (((t_addr) val) < MEMSIZE)? val: MEMSIZE; clim = (((t_addr) val) < MEMSIZE)? (uint32)val: MEMSIZE;
for (i = 0; i < clim; i = i + 2) for (i = 0; i < clim; i = i + 2)
nM[i >> 1] = M[i >> 1]; nM[i >> 1] = M[i >> 1];
free (M); free (M);

2
PDP11/pdp11_dc.c
View file

@ -86,7 +86,7 @@ uint32 dci_ireq = 0;
uint16 dco_csr[DCX_LINES] = { 0 }; /* control/status */ uint16 dco_csr[DCX_LINES] = { 0 }; /* control/status */
uint8 dco_buf[DCX_LINES] = { 0 }; uint8 dco_buf[DCX_LINES] = { 0 };
uint32 dco_ireq = 0; uint32 dco_ireq = 0;
TMLN dcx_ldsc[DCX_LINES] = { 0 }; /* line descriptors */ TMLN dcx_ldsc[DCX_LINES] = { {0} }; /* line descriptors */
TMXR dcx_desc = { DCX_LINES, 0, 0, dcx_ldsc }; /* mux descriptor */ TMXR dcx_desc = { DCX_LINES, 0, 0, dcx_ldsc }; /* mux descriptor */
static const uint8 odd_par[] = { static const uint8 odd_par[] = {

2
PDP11/pdp11_dl.c
View file

@ -87,7 +87,7 @@ uint32 dli_ireq[2] = { 0, 0};
uint16 dlo_csr[DLX_LINES] = { 0 }; /* control/status */ uint16 dlo_csr[DLX_LINES] = { 0 }; /* control/status */
uint8 dlo_buf[DLX_LINES] = { 0 }; uint8 dlo_buf[DLX_LINES] = { 0 };
uint32 dlo_ireq = 0; uint32 dlo_ireq = 0;
TMLN dlx_ldsc[DLX_LINES] = { 0 }; /* line descriptors */ TMLN dlx_ldsc[DLX_LINES] = { {0} }; /* line descriptors */
TMXR dlx_desc = { DLX_LINES, 0, 0, dlx_ldsc }; /* mux descriptor */ TMXR dlx_desc = { DLX_LINES, 0, 0, dlx_ldsc }; /* mux descriptor */
t_stat dlx_rd (int32 *data, int32 PA, int32 access); t_stat dlx_rd (int32 *data, int32 PA, int32 access);

2
PDP11/pdp11_rc.c
View file

@ -437,7 +437,7 @@ static uint32 sectorCRC (const uint16 *data)
static t_stat rc_svc (UNIT *uptr) static t_stat rc_svc (UNIT *uptr)
{ {
uint32 ma, da, t, u_old, u_new, last_da; uint32 ma, da, t, u_old, u_new, last_da = 0;
uint16 dat; uint16 dat;
uint16 *fbuf = uptr->filebuf; uint16 *fbuf = uptr->filebuf;

4
PDP11/pdp11_rf.c
View file

@ -144,7 +144,7 @@ uint32 update_rfcs (uint32 newcs, uint32 newdae);
DIB rf_dib = { DIB rf_dib = {
IOBA_RF, IOLN_RF, &rf_rd, &rf_wr, IOBA_RF, IOLN_RF, &rf_rd, &rf_wr,
1, IVCL (RF), VEC_RF, NULL 1, IVCL (RF), VEC_RF, {NULL}
}; };
@ -461,7 +461,7 @@ static const uint16 boot_rom[] = {
t_stat rf_boot (int32 unitno, DEVICE *dptr) t_stat rf_boot (int32 unitno, DEVICE *dptr)
{ {
int32 i; size_t i;
extern int32 saved_PC; extern int32 saved_PC;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)

2
PDP11/pdp11_rk.c
View file

@ -746,7 +746,7 @@ static const uint16 boot_rom[] = {
t_stat rk_boot (int32 unitno, DEVICE *dptr) t_stat rk_boot (int32 unitno, DEVICE *dptr)
{ {
int32 i; size_t i;
extern int32 saved_PC; extern int32 saved_PC;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)

2
PDP11/pdp11_rp.c
View file

@ -1120,7 +1120,7 @@ static const uint16 boot_rom[] = {
t_stat rp_boot (int32 unitno, DEVICE *dptr) t_stat rp_boot (int32 unitno, DEVICE *dptr)
{ {
int32 i; size_t i;
extern int32 saved_PC; extern int32 saved_PC;
extern uint16 *M; extern uint16 *M;
UNIT *uptr = rp_dev.units + unitno; UNIT *uptr = rp_dev.units + unitno;

4
PDP11/pdp11_tc.c
View file

@ -749,7 +749,7 @@ t_bool dt_setpos (UNIT *uptr)
{ {
uint32 new_time, ut, ulin, udelt; uint32 new_time, ut, ulin, udelt;
int32 mot = DTS_GETMOT (uptr->STATE); int32 mot = DTS_GETMOT (uptr->STATE);
int32 unum, delta; int32 unum, delta = 0;
new_time = sim_grtime (); /* current time */ new_time = sim_grtime (); /* current time */
ut = new_time - uptr->LASTT; /* elapsed time */ ut = new_time - uptr->LASTT; /* elapsed time */
@ -1183,7 +1183,7 @@ static const uint16 boot_rom[] = {
t_stat dt_boot (int32 unitno, DEVICE *dptr) t_stat dt_boot (int32 unitno, DEVICE *dptr)
{ {
int32 i; size_t i;
extern int32 saved_PC; extern int32 saved_PC;
dt_unit[unitno].pos = DT_EZLIN; dt_unit[unitno].pos = DT_EZLIN;

2
PDP11/pdp11_tm.c
View file

@ -711,7 +711,7 @@ static const uint16 boot2_rom[] = {
t_stat tm_boot (int32 unitno, DEVICE *dptr) t_stat tm_boot (int32 unitno, DEVICE *dptr)
{ {
int32 i; size_t i;
extern int32 saved_PC; extern int32 saved_PC;
extern int32 sim_switches; extern int32 sim_switches;

4
PDP11/pdp11_tu.c
View file

@ -793,7 +793,7 @@ if (DEBUG_PRS (tu_dev)) {
fprintf (sim_deb, ">>TU%d DONE: fnc=%s, fc=%06o, fs=%06o, er=%06o, pos=", fprintf (sim_deb, ">>TU%d DONE: fnc=%s, fc=%06o, fs=%06o, er=%06o, pos=",
drv, tu_fname[fnc], tufc, tufs, tuer); drv, tu_fname[fnc], tufc, tufs, tuer);
fprint_val (sim_deb, uptr->pos, 10, T_ADDR_W, PV_LEFT); fprint_val (sim_deb, uptr->pos, 10, T_ADDR_W, PV_LEFT);
fprintf (sim_deb, "\n"); fprintf (sim_deb, ", r=%d\n", r);
} }
return SCPE_OK; return SCPE_OK;
} }
@ -1036,7 +1036,7 @@ static const uint16 boot_rom[] = {
t_stat tu_boot (int32 unitno, DEVICE *dptr) t_stat tu_boot (int32 unitno, DEVICE *dptr)
{ {
int32 i; size_t i;
extern int32 saved_PC; extern int32 saved_PC;
extern uint16 *M; extern uint16 *M;