KA10: Fixed Chaosnet devices to work properly under ITS.
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da6dcef801
commit
cd40b302e6
2 changed files with 39 additions and 31 deletions
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@ -105,9 +105,10 @@ static char peer[256];
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int address;
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int address;
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static uint64 ch10_status;
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static uint64 ch10_status;
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static int rx_count;
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static int rx_count;
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static int rx_pos;
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static int tx_count;
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static int tx_count;
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static uint8 rx_buffer[512+100];
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static uint8 rx_buffer[514+100];
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static uint8 tx_buffer[512+100];
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static uint8 tx_buffer[514+100];
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TMLN ch10_lines[1] = { {0} };
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TMLN ch10_lines[1] = { {0} };
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TMXR ch10_tmxr = { 1, NULL, 0, ch10_lines};
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TMXR ch10_tmxr = { 1, NULL, 0, ch10_lines};
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@ -226,7 +227,7 @@ t_stat ch10_transmit ()
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int i = CHUDP_HEADER + tx_count;
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int i = CHUDP_HEADER + tx_count;
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uint16 chk;
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uint16 chk;
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if (tx_count > (512 - CHUDP_HEADER)) {
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if (tx_count > (514 - CHUDP_HEADER)) {
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sim_debug (DBG_PKT, &ch10_dev, "Pack size failed, %d bytes.\n", (int)tx_count);
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sim_debug (DBG_PKT, &ch10_dev, "Pack size failed, %d bytes.\n", (int)tx_count);
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ch10_status |= PLE;
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ch10_status |= PLE;
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return SCPE_INCOMP;
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return SCPE_INCOMP;
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@ -243,7 +244,7 @@ t_stat ch10_transmit ()
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len = CHUDP_HEADER + (size_t)tx_count;
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len = CHUDP_HEADER + (size_t)tx_count;
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r = tmxr_put_packet_ln (&ch10_lines[0], (const uint8 *)&tx_buffer, len);
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r = tmxr_put_packet_ln (&ch10_lines[0], (const uint8 *)&tx_buffer, len);
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if (r == SCPE_OK) {
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if (r == SCPE_OK) {
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sim_debug (DBG_PKT, &ch10_dev, "Sent UDP packet, %d bytes.\n", (int)len);
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sim_debug (DBG_PKT, &ch10_dev, "Sent UDP packet, %d bytes. %04x checksum\n", (int)len, chk);
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tmxr_poll_tx (&ch10_tmxr);
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tmxr_poll_tx (&ch10_tmxr);
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} else {
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} else {
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sim_debug (DBG_ERR, &ch10_dev, "Sending UDP failed: %d.\n", r);
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sim_debug (DBG_ERR, &ch10_dev, "Sending UDP failed: %d.\n", r);
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@ -275,11 +276,12 @@ void ch10_receive (void)
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return;
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return;
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if ((RXD & ch10_status) == 0) {
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if ((RXD & ch10_status) == 0) {
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count = (count + 1) & 0776;
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count = (count + 1) & 01776;
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memcpy (rx_buffer + (512 - count), p, count);
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rx_count = count;
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rx_count = count;
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memcpy (rx_buffer, p, rx_count);
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rx_pos = 0;
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sim_debug (DBG_TRC, &ch10_dev, "Rx count, %d\n", rx_count);
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sim_debug (DBG_TRC, &ch10_dev, "Rx count, %d\n", rx_count);
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ch10_validate (p + CHUDP_HEADER, count - CHUDP_HEADER);
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ch10_validate (rx_buffer + CHUDP_HEADER, rx_count - CHUDP_HEADER);
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ch10_status |= RXD;
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ch10_status |= RXD;
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ch10_lines[0].rcve = FALSE;
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ch10_lines[0].rcve = FALSE;
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sim_debug (DBG_TRC, &ch10_dev, "Rx off\n");
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sim_debug (DBG_TRC, &ch10_dev, "Rx off\n");
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@ -296,6 +298,7 @@ void ch10_clear (void)
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ch10_status = TXD;
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ch10_status = TXD;
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rx_count = 0;
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rx_count = 0;
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tx_count = 0;
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tx_count = 0;
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rx_pos = 0;
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tx_buffer[0] = 1; /* CHUDP header */
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tx_buffer[0] = 1; /* CHUDP header */
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tx_buffer[1] = 1;
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tx_buffer[1] = 1;
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@ -349,7 +352,7 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
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break;
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break;
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case DATAO:
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case DATAO:
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ch10_status &= ~TXD;
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ch10_status &= ~TXD;
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if (tx_count < 512) {
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if (tx_count < 514) {
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int i = CHUDP_HEADER + tx_count;
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int i = CHUDP_HEADER + tx_count;
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if (ch10_status & SWAP) {
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if (ch10_status & SWAP) {
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tx_buffer[i] = (*data >> 20) & 0xff;
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tx_buffer[i] = (*data >> 20) & 0xff;
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@ -382,22 +385,23 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
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*data = 0;
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*data = 0;
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sim_debug (DBG_ERR, &ch10_dev, "Read empty buffer\n");
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sim_debug (DBG_ERR, &ch10_dev, "Read empty buffer\n");
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} else {
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} else {
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int i = 512-rx_count;
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ch10_status &= ~RXD;
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ch10_status &= ~RXD;
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if (ch10_status & SWAP) {
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if (ch10_status & SWAP) {
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*data = ((uint64)(rx_buffer[i]) & 0xff) << 20;
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*data = ((uint64)(rx_buffer[rx_pos]) & 0xff) << 20;
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*data |= ((uint64)(rx_buffer[i+1]) & 0xff) << 28;
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*data |= ((uint64)(rx_buffer[rx_pos+1]) & 0xff) << 28;
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*data |= ((uint64)(rx_buffer[i+2]) & 0xff) << 4;
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*data |= ((uint64)(rx_buffer[rx_pos+2]) & 0xff) << 4;
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*data |= ((uint64)(rx_buffer[i+3]) & 0xff) << 12;
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*data |= ((uint64)(rx_buffer[rx_pos+3]) & 0xff) << 12;
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} else {
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} else {
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*data = ((uint64)(rx_buffer[i]) & 0xff) << 28;
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*data = ((uint64)(rx_buffer[rx_pos]) & 0xff) << 28;
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*data |= ((uint64)(rx_buffer[i+1]) & 0xff) << 20;
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*data |= ((uint64)(rx_buffer[rx_pos+1]) & 0xff) << 20;
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*data |= ((uint64)(rx_buffer[i+2]) & 0xff) << 12;
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*data |= ((uint64)(rx_buffer[rx_pos+2]) & 0xff) << 12;
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*data |= ((uint64)(rx_buffer[i+3]) & 0xff) << 4;
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*data |= ((uint64)(rx_buffer[rx_pos+3]) & 0xff) << 4;
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}
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}
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rx_count-=4;
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rx_count-=4;
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sim_debug (DBG_DAT, &ch10_dev, "Read buffer word %d:%02x %02x %02x %02x %012llo %012llo\n",
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sim_debug (DBG_DAT, &ch10_dev, "Read buffer word %d:%02x %02x %02x %02x %012llo %012llo\n",
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rx_count, rx_buffer[i], rx_buffer[i+1], rx_buffer[i+2], rx_buffer[i+3], *data, ch10_status);
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rx_count, rx_buffer[rx_pos], rx_buffer[rx_pos+1], rx_buffer[rx_pos+2], rx_buffer[rx_pos+3],
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*data, ch10_status);
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rx_pos+=4;
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}
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}
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}
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}
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@ -97,9 +97,10 @@ static char peer[256];
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static int address;
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static int address;
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static uint16 ch11_csr;
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static uint16 ch11_csr;
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static int rx_count;
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static int rx_count;
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static int rx_pos;
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static int tx_count;
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static int tx_count;
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static uint8 rx_buffer[512+100];
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static uint8 rx_buffer[514+100];
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static uint8 tx_buffer[512+100];
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static uint8 tx_buffer[514+100];
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TMLN ch11_lines[1] = { {0} };
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TMLN ch11_lines[1] = { {0} };
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TMXR ch11_tmxr = { 1, NULL, 0, ch11_lines};
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TMXR ch11_tmxr = { 1, NULL, 0, ch11_lines};
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@ -111,6 +112,7 @@ UNIT ch11_unit[] = {
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REG ch11_reg[] = {
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REG ch11_reg[] = {
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{ ORDATA(CSR, ch11_csr, 16)},
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{ ORDATA(CSR, ch11_csr, 16)},
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{ GRDATAD(RXCNT, rx_count, 16, 16, 0, "Receive word count"), REG_FIT|REG_RO},
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{ GRDATAD(RXCNT, rx_count, 16, 16, 0, "Receive word count"), REG_FIT|REG_RO},
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{ GRDATAD(RXPOS, rx_pos, 16, 16, 0, "Receive Position"), REG_FIT|REG_RO},
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{ GRDATAD(TXCNT, tx_count, 16, 16, 0, "Transmit word count"), REG_FIT|REG_RO},
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{ GRDATAD(TXCNT, tx_count, 16, 16, 0, "Transmit word count"), REG_FIT|REG_RO},
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{ BRDATAD(RXBUF, rx_buffer, 16, 8, sizeof rx_buffer, "Receive packet buffer"), REG_FIT},
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{ BRDATAD(RXBUF, rx_buffer, 16, 8, sizeof rx_buffer, "Receive packet buffer"), REG_FIT},
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{ BRDATAD(TXBUF, tx_buffer, 16, 8, sizeof tx_buffer, "Transmit packet buffer"), REG_FIT},
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{ BRDATAD(TXBUF, tx_buffer, 16, 8, sizeof tx_buffer, "Transmit packet buffer"), REG_FIT},
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@ -179,6 +181,7 @@ ch11_write(DEVICE *dptr, t_addr addr, uint16 data, int32 access)
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sim_debug (DBG_REG, &ch11_dev, "Clear RX\n");
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sim_debug (DBG_REG, &ch11_dev, "Clear RX\n");
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ch11_csr &= ~CSR_RDN;
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ch11_csr &= ~CSR_RDN;
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rx_count = 0;
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rx_count = 0;
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rx_pos = 0;
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ch11_lines[0].rcve = TRUE;
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ch11_lines[0].rcve = TRUE;
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uba_clr_irq(dibp, dibp->uba_vect);
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uba_clr_irq(dibp, dibp->uba_vect);
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}
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}
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@ -219,7 +222,6 @@ int
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ch11_read(DEVICE *dptr, t_addr addr, uint16 *data, int32 access)
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ch11_read(DEVICE *dptr, t_addr addr, uint16 *data, int32 access)
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{
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{
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struct pdp_dib *dibp = (DIB *)dptr->ctxt;
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struct pdp_dib *dibp = (DIB *)dptr->ctxt;
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int i;
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addr &= dibp->uba_mask;
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addr &= dibp->uba_mask;
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*data = 0;
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*data = 0;
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@ -237,19 +239,19 @@ ch11_read(DEVICE *dptr, t_addr addr, uint16 *data, int32 access)
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*data = 0;
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*data = 0;
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sim_debug (DBG_ERR, &ch11_dev, "Read empty buffer\n");
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sim_debug (DBG_ERR, &ch11_dev, "Read empty buffer\n");
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} else {
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} else {
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i = 512-rx_count;
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ch11_csr &= ~CSR_RDN;
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ch11_csr &= ~CSR_RDN;
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uba_clr_irq(dibp, dibp->uba_vect);
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uba_clr_irq(dibp, dibp->uba_vect);
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*data = ((uint64)(rx_buffer[i]) & 0xff) << 8;
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*data = ((uint64)(rx_buffer[rx_pos]) & 0xff) << 8;
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*data |= ((uint64)(rx_buffer[i+1]) & 0xff);
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*data |= ((uint64)(rx_buffer[rx_pos+1]) & 0xff);
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rx_count-=2;
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sim_debug (DBG_DAT, &ch11_dev, "Read buffer word %d:%02x %02x %06o %06o\n",
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sim_debug (DBG_DAT, &ch11_dev, "Read buffer word %d:%02x %02x %06o %06o\n",
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rx_count, rx_buffer[i], rx_buffer[i+1], *data, ch11_csr);
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rx_count, rx_buffer[rx_pos], rx_buffer[rx_pos+1], *data, ch11_csr);
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rx_count-=2;
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rx_pos+=2;
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}
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}
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break;
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break;
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case 006: /* Bit count */
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case 006: /* Bit count */
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*data = ((512 - rx_count) - 1) & 07777;
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*data = ((rx_count * 8) - 1) & 07777;
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break;
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break;
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case 012: /* Start transmission */
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case 012: /* Start transmission */
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sim_debug (DBG_REG, &ch11_dev, "XMIT TX\n");
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sim_debug (DBG_REG, &ch11_dev, "XMIT TX\n");
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@ -340,7 +342,7 @@ ch11_transmit (struct pdp_dib *dibp)
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len = CHUDP_HEADER + (size_t)tx_count;
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len = CHUDP_HEADER + (size_t)tx_count;
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r = tmxr_put_packet_ln (&ch11_lines[0], (const uint8 *)&tx_buffer, len);
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r = tmxr_put_packet_ln (&ch11_lines[0], (const uint8 *)&tx_buffer, len);
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if (r == SCPE_OK) {
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if (r == SCPE_OK) {
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sim_debug (DBG_PKT, &ch11_dev, "Sent UDP packet, %d bytes.\n", (int)len);
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sim_debug (DBG_PKT, &ch11_dev, "Sent UDP packet, %d bytes. %04x checksum.\n", (int)len, chk);
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tmxr_poll_tx (&ch11_tmxr);
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tmxr_poll_tx (&ch11_tmxr);
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} else {
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} else {
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sim_debug (DBG_ERR, &ch11_dev, "Sending UDP failed: %d.\n", r);
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sim_debug (DBG_ERR, &ch11_dev, "Sending UDP failed: %d.\n", r);
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@ -372,9 +374,10 @@ ch11_receive (struct pdp_dib *dibp)
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return;
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return;
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if ((CSR_RDN & ch11_csr) == 0) {
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if ((CSR_RDN & ch11_csr) == 0) {
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count = (count + 1) & 0776;
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count = (count + 1) & 01776;
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memcpy (rx_buffer + (512 - count), p, count);
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memcpy (rx_buffer, p + CHUDP_HEADER, count);
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rx_count = count;
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rx_count = count - CHUDP_HEADER;
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rx_pos = 0;
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sim_debug (DBG_TRC, &ch11_dev, "Rx count, %d\n", rx_count);
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sim_debug (DBG_TRC, &ch11_dev, "Rx count, %d\n", rx_count);
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ch11_validate (p + CHUDP_HEADER, count - CHUDP_HEADER);
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ch11_validate (p + CHUDP_HEADER, count - CHUDP_HEADER);
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ch11_csr |= CSR_RDN;
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ch11_csr |= CSR_RDN;
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@ -397,6 +400,7 @@ ch11_clear (struct pdp_dib *dibp)
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ch11_csr = CSR_TDN;
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ch11_csr = CSR_TDN;
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rx_count = 0;
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rx_count = 0;
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tx_count = 0;
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tx_count = 0;
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rx_pos = 0;
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tx_buffer[0] = 1; /* CHUDP header */
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tx_buffer[0] = 1; /* CHUDP header */
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tx_buffer[1] = 1;
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tx_buffer[1] = 1;
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