From cdb94a9d9f92c8d91ee93bb1c79ca275dea7a19e Mon Sep 17 00:00:00 2001 From: Bill Beech Date: Fri, 15 Jul 2016 13:09:22 -0700 Subject: [PATCH] IBMPCXT: Initial check in of new experimental simulator for the IBM PC XT --- IBMPC-Systems/ibmpcxt/ibmpcxt.c | 202 ++++++++++++++++++++++++++++ IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c | 96 +++++++++++++ IBMPC-Systems/ibmpcxt/system_defs.h | 110 +++++++++++++++ 3 files changed, 408 insertions(+) create mode 100644 IBMPC-Systems/ibmpcxt/ibmpcxt.c create mode 100644 IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c create mode 100644 IBMPC-Systems/ibmpcxt/system_defs.h diff --git a/IBMPC-Systems/ibmpcxt/ibmpcxt.c b/IBMPC-Systems/ibmpcxt/ibmpcxt.c new file mode 100644 index 00000000..40be0b76 --- /dev/null +++ b/IBMPC-Systems/ibmpcxt/ibmpcxt.c @@ -0,0 +1,202 @@ +/* ibmpcxt.c: IBM PC Processor simulator + + Copyright (c) 2016, William A. Beech + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of William A. Beech shall not be + used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from William A. Beech. + + MODIFICATIONS: + + 11 Jul 16 - Original file. + + NOTES: + + This software was written by Bill Beech, Jul 2016, to allow emulation of IBM PC + Computer Systems. +*/ + +#include "system_defs.h" + +int32 nmiflg = 0; //mask NMI off +uint8 dmapagreg0, dmapagreg1, dmapagreg2, dmapagreg3; +extern uint16 port; //port called in dev_table[port] + +/* function prototypes */ + +uint8 get_mbyte(uint32 addr); +uint16 get_mword(uint32 addr); +void put_mbyte(uint32 addr, uint8 val); +void put_mword(uint32 addr, uint16 val); +t_stat SBC_reset (DEVICE *dptr); +uint8 enbnmi(t_bool io, uint8 data); +uint8 dmapag(t_bool io, uint8 data); +uint8 dmapag0(t_bool io, uint8 data); +uint8 dmapag1(t_bool io, uint8 data); +uint8 dmapag2(t_bool io, uint8 data); +uint8 dmapag3(t_bool io, uint8 data); + +/* external function prototypes */ + +extern t_stat i8088_reset (DEVICE *dptr); /* reset the 8088 emulator */ +extern uint8 xtbus_get_mbyte(uint32 addr); +extern void xtbus_put_mbyte(uint32 addr, uint8 val); +extern uint8 EPROM_get_mbyte(uint32 addr); +extern uint8 RAM_get_mbyte(uint32 addr); +extern void RAM_put_mbyte(uint32 addr, uint8 val); +extern UNIT i8255_unit[]; +extern UNIT EPROM_unit; +extern UNIT RAM_unit; +extern t_stat i8237_reset (DEVICE *dptr, uint16 base); +extern t_stat i8253_reset (DEVICE *dptr, uint16 base); +extern t_stat i8255_reset (DEVICE *dptr, uint16 base); +extern t_stat i8259_reset (DEVICE *dptr, uint16 base); +extern t_stat EPROM_reset (DEVICE *dptr, uint32 base, uint32 size); +extern t_stat RAM_reset (DEVICE *dptr, uint32 base, uint32 size); +extern uint16 reg_dev(uint8 (*routine)(t_bool, uint8), uint16); + +/* SBC reset routine */ + +t_stat SBC_reset (DEVICE *dptr) +{ + sim_printf("Initializing IBM PC XT:\n"); + i8088_reset (NULL); + i8237_reset (NULL, I8237_BASE_0); + i8253_reset (NULL, I8253_BASE_0); + i8255_reset (NULL, I8255_BASE_0); + i8259_reset (NULL, I8259_BASE_0); + EPROM_reset (NULL, ROM_BASE, ROM_SIZE); + RAM_reset (NULL, RAM_BASE, RAM_SIZE); + reg_dev(enbnmi, NMI_BASE); + reg_dev(dmapag0, DMAPAG_BASE_0); + reg_dev(dmapag1, DMAPAG_BASE_1); + reg_dev(dmapag2, DMAPAG_BASE_2); + reg_dev(dmapag3, DMAPAG_BASE_3); + return SCPE_OK; +} + +uint8 dmapag0(t_bool io, uint8 data) +{ + if (io == 0) { /* read data port */ + ; + } else { /* write data port */ + dmapagreg0 = data; + //sim_printf("dmapag0: dmapagreg0=%04X\n", data); + } +} + +uint8 dmapag1(t_bool io, uint8 data) +{ + if (io == 0) { /* read data port */ + ; + } else { /* write data port */ + dmapagreg1 = data; + //sim_printf("dmapag1: dmapagreg1=%04X\n", data); + } +} + +uint8 dmapag2(t_bool io, uint8 data) +{ + if (io == 0) { /* read data port */ + ; + } else { /* write data port */ + dmapagreg2 = data; + //sim_printf("dmapag2: dmapagreg2=%04X\n", data); + } +} + +uint8 dmapag3(t_bool io, uint8 data) +{ + //sim_printf("dmapag3: entered\n"); + if (io == 0) { /* read data port */ + ; + } else { /* write data port */ + dmapagreg3 = data; + //sim_printf("dmapag3: dmapagreg3=%04X\n", data); + } +} + +uint8 enbnmi(t_bool io, uint8 data) +{ + if (io == 0) { /* read data port */ + ; + } else { /* write data port */ + if (data & 0x80) { + nmiflg = 1; + //sim_printf("enbnmi: NMI enabled\n"); + } else { + nmiflg = 0; + //sim_printf("enbnmi: NMI disabled\n"); + } + } +} + +/* get a byte from memory - handle RAM, ROM, I/O, and Multibus memory */ + +uint8 get_mbyte(uint32 addr) +{ + /* if local EPROM handle it */ + if ((addr >= EPROM_unit.u3) && ((uint32)addr < (EPROM_unit.u3 + EPROM_unit.capac))) { + return EPROM_get_mbyte(addr); + } + /* if local RAM handle it */ + if ((addr >= RAM_unit.u3) && ((uint16)addr < (RAM_unit.u3 + RAM_unit.capac))) { + return RAM_get_mbyte(addr); + } + /* otherwise, try the multibus */ + return xtbus_get_mbyte(addr); +} + +/* get a word from memory */ + +uint16 get_mword(uint32 addr) +{ + uint16 val; + + val = get_mbyte(addr); + val |= (get_mbyte(addr+1) << 8); + return val; +} + +/* put a byte to memory - handle RAM, ROM, I/O, and Multibus memory */ + +void put_mbyte(uint32 addr, uint8 val) +{ + /* if local EPROM handle it */ + if ((addr >= EPROM_unit.u3) && ((uint32)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) { + sim_printf("Write to R/O memory address %05X - ignored\n", addr); + return; + } /* if local RAM handle it */ + if ((i8255_unit[0].u5 & 0x02) && (addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) { + RAM_put_mbyte(addr, val); + return; + } /* otherwise, try the multibus */ + xtbus_put_mbyte(addr, val); +} + +/* put a word to memory */ + +void put_mword(uint32 addr, uint16 val) +{ + put_mbyte(addr, val & 0xff); + put_mbyte(addr+1, val >> 8); +} + +/* end of ibmpcxt.c */ diff --git a/IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c b/IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c new file mode 100644 index 00000000..11b7b6af --- /dev/null +++ b/IBMPC-Systems/ibmpcxt/ibmpcxt_sys.c @@ -0,0 +1,96 @@ +/* ibmpcxt_sys.c: IBM 5160 simulator + + Copyright (c) 2016, William A. Beech + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of William A. Beech shall not be + used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from William A. Beech. + + 11 Jul 16 - Original file. +*/ + +#include "system_defs.h" + +extern DEVICE i8088_dev; +extern REG i8088_reg[]; +extern DEVICE i8237_dev; +extern DEVICE i8253_dev; +extern DEVICE i8255_dev; +extern DEVICE i8259_dev; +extern DEVICE EPROM_dev; +extern DEVICE RAM_dev; +extern DEVICE xtbus_dev; + +/* bit patterns to manipulate 8-bit ports */ + +#define i82XX_bit_0 0x01 //bit 0 of a port +#define i82XX_bit_1 0x02 //bit 1 of a port +#define i82XX_bit_2 0x04 //bit 2 of a port +#define i82XX_bit_3 0x08 //bit 3 of a port +#define i82XX_bit_4 0x10 //bit 4 of a port +#define i82XX_bit_5 0x20 //bit 5 of a port +#define i82XX_bit_6 0x40 //bit 6 of a port +#define i82XX_bit_7 0x80 //bit 7 of a port + +#define i82XX_nbit_0 ~i8255_bit_0 //bit 0 of a port +#define i82XX_nbit_1 ~i8255_bit_1 //bit 1 of a port +#define i82XX_nbit_2 ~i8255_bit_3 //bit 2 of a port +#define i82XX_nbit_3 ~i8255_bit_3 //bit 3 of a port +#define i82XX_nbit_4 ~i8255_bit_4 //bit 4 of a port +#define i82XX_nbit_5 ~i8255_bit_5 //bit 5 of a port +#define i82XX_nbit_6 ~i8255_bit_6 //bit 6 of a port +#define i82XX_nbit_7 ~i8255_bit_7 //bit 7 of a port + +/* SCP data structures + + sim_name simulator name string + sim_PC pointer to saved PC register descriptor + sim_emax number of words needed for examine + sim_devices array of pointers to simulated devices + sim_stop_messages array of pointers to stop messages +*/ + +char sim_name[] = "IBM PC XT"; + +REG *sim_PC = &i8088_reg[0]; + +int32 sim_emax = 4; + +DEVICE *sim_devices[] = { + &i8088_dev, + &EPROM_dev, + &RAM_dev, + &i8237_dev, + &i8253_dev, + &i8255_dev, + &i8259_dev, + &xtbus_dev, + NULL +}; + +const char *sim_stop_messages[] = { + "Unknown error", + "Unknown I/O Instruction", + "HALT instruction", + "Breakpoint", + "Invalid Opcode", + "Invalid Memory", +}; + diff --git a/IBMPC-Systems/ibmpcxt/system_defs.h b/IBMPC-Systems/ibmpcxt/system_defs.h new file mode 100644 index 00000000..ea7713a6 --- /dev/null +++ b/IBMPC-Systems/ibmpcxt/system_defs.h @@ -0,0 +1,110 @@ +/* system_defs.h: Intel iSBC simulator definitions + + Copyright (c) 2010, William A. Beech + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + Except as contained in this notice, the name of William A. Beech shall not be + used in advertising or otherwise to promote the sale, use or other dealings + in this Software without prior written authorization from William A. Beech. + + 11 Jul 16 - Original file. +*/ + +#include +#include +#include "sim_defs.h" /* simulator defns */ + +/* set the base I/O address and device count for the 8237 */ +#define I8237_BASE_0 0x000 +#define I8237_NUM 1 + +/* set the base I/O address and device count for the 8253 */ +#define I8253_BASE_0 0x040 +#define I8253_NUM 1 + +/* set the base I/O address and device count for the 8255 */ +#define I8255_BASE_0 0x060 +#define I8255_NUM 1 + +/* set the base I/O address and device count for the 8259 */ +#define I8259_BASE_0 0x020 +#define I8259_NUM 1 + +/* set the base I/O address for the NMI mask */ +#define NMI_BASE 0x0A0 + +/* set the base I/O address and device count for the DMA page registers */ +#define DMAPAG_BASE_0 0x080 +#define DMAPAG_BASE_1 0x081 +#define DMAPAG_BASE_2 0x082 +#define DMAPAG_BASE_3 0x083 +#define DMAPAG_NUM 4 + +/* set the base and size for the EPROM on the IBM PC XT*/ +#define ROM_BASE 0xF0000 +#define ROM_SIZE 0x10000 + +/* set the base and size for the RAM on the IBM PC XT */ +#define RAM_BASE 0x00000 +#define RAM_SIZE 0x40000 + +/* set INTR for CPU on the IBM PC XT */ +#define INT_R INT_1 + +/* xtbus interrupt definitions */ + +#define INT_0 0x01 +#define INT_1 0x02 +#define INT_2 0x04 +#define INT_3 0x08 +#define INT_4 0x10 +#define INT_5 0x20 +#define INT_6 0x40 +#define INT_7 0x80 + +/* Memory */ + +#define ADDRMASK16 0xFFFF +#define ADDRMASK20 0xFFFFF +#define MAXMEMSIZE20 0xFFFFF /* 8080 max memory size */ + +#define MEMSIZE (i8088_unit.capac) /* 8088 actual memory size */ +#define ADDRMASK (MAXMEMSIZE - 1) /* 8088 address mask */ +#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE) + +/* debug definitions */ + +#define DEBUG_flow 0x0001 +#define DEBUG_read 0x0002 +#define DEBUG_write 0x0004 +#define DEBUG_level1 0x0008 +#define DEBUG_level2 0x0010 +#define DEBUG_reg 0x0020 +#define DEBUG_asm 0x0040 +#define DEBUG_all 0xFFFF + +/* Simulator stop codes */ + +#define STOP_RSRV 1 /* must be 1 */ +#define STOP_HALT 2 /* HALT */ +#define STOP_IBKPT 3 /* breakpoint */ +#define STOP_OPCODE 4 /* Invalid Opcode */ +#define STOP_IO 5 /* I/O error */ +#define STOP_MEM 6 /* Memory error */ +