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ISYS8010: Corrections to get clean build under VS2008

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This commit is contained in:
Bill Beech 2015-05-04 23:08:52 -07:00 • committed by Mark Pizzolato
parent a6c07052a7
commit ce84886bfa
8 changed files with 44 additions and 36 deletions
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4
Intel-Systems/common/i8080.c
View file

@ -386,7 +386,7 @@ void set_cpuint(int32 int_num)
int32 sim_instr (void) int32 sim_instr (void)
{ {
extern int32 sim_interval; extern int32 sim_interval;
uint32 IR, OP, DAR, reason, hi, lo, i, adr; uint32 IR, OP, DAR, reason, adr;
PC = saved_PC & WORD_R; /* load local PC */ PC = saved_PC & WORD_R; /* load local PC */
reason = 0; reason = 0;
@ -1436,3 +1436,5 @@ t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
val[2] = (r >> 8) & 0xFF; val[2] = (r >> 8) & 0xFF;
return (-2); return (-2);
} }
/* end of i8080.c */

14
Intel-Systems/common/iSBC80-10.c
View file

@ -98,14 +98,16 @@ t_stat SBC_reset (DEVICE *dptr)
int32 get_mbyte(int32 addr) int32 get_mbyte(int32 addr)
{ {
int32 val, org, len;
/* if local EPROM handle it */ /* if local EPROM handle it */
if ((i8255_unit.u5 & 0x01) && (addr >= EPROM_unit.u3) && (addr < (EPROM_unit.u3 + EPROM_unit.capac))) { if (i8255_unit.u5 & 0x01) {
if ((addr >= EPROM_unit.u3) && ((uint16)addr < (EPROM_unit.u3 + EPROM_unit.capac))) {
return EPROM_get_mbyte(addr); return EPROM_get_mbyte(addr);
}
} /* if local RAM handle it */ } /* if local RAM handle it */
if ((i8255_unit.u5 & 0x02) && (addr >= RAM_unit.u3) && (addr < (RAM_unit.u3 + RAM_unit.capac))) { if (i8255_unit.u5 & 0x02) {
if ((addr >= RAM_unit.u3) && ((uint16)addr < (RAM_unit.u3 + RAM_unit.capac))) {
return RAM_get_mbyte(addr); return RAM_get_mbyte(addr);
}
} /* otherwise, try the multibus */ } /* otherwise, try the multibus */
return multibus_get_mbyte(addr); return multibus_get_mbyte(addr);
} }
@ -126,11 +128,11 @@ int32 get_mword(int32 addr)
void put_mbyte(int32 addr, int32 val) void put_mbyte(int32 addr, int32 val)
{ {
/* if local EPROM handle it */ /* if local EPROM handle it */
if ((i8255_unit.u5 & 0x01) && (addr >= EPROM_unit.u3) && (addr <= (EPROM_unit.u3 + EPROM_unit.capac))) { if ((i8255_unit.u5 & 0x01) && (addr >= EPROM_unit.u3) && ((uint16)addr <= (EPROM_unit.u3 + EPROM_unit.capac))) {
sim_printf("Write to R/O memory address %04X - ignored\n", addr); sim_printf("Write to R/O memory address %04X - ignored\n", addr);
return; return;
} /* if local RAM handle it */ } /* if local RAM handle it */
if ((i8255_unit.u5 & 0x02) && (addr >= RAM_unit.u3) && (addr <= (RAM_unit.u3 + RAM_unit.capac))) { if ((i8255_unit.u5 & 0x02) && (addr >= RAM_unit.u3) && ((uint16)addr <= (RAM_unit.u3 + RAM_unit.capac))) {
RAM_put_mbyte(addr, val); RAM_put_mbyte(addr, val);
return; return;
} /* otherwise, try the multibus */ } /* otherwise, try the multibus */

17
Intel-Systems/common/ieprom.c
View file

@ -46,7 +46,7 @@
t_stat EPROM_attach (UNIT *uptr, char *cptr); t_stat EPROM_attach (UNIT *uptr, char *cptr);
t_stat EPROM_reset (DEVICE *dptr, int32 size); t_stat EPROM_reset (DEVICE *dptr, int32 size);
int32 EPROM_get_mbyte(int32 addr); int32 EPROM_get_mbyte(uint32 addr);
extern UNIT i8255_unit; extern UNIT i8255_unit;
extern uint8 xack; /* XACK signal */ extern uint8 xack; /* XACK signal */
@ -102,7 +102,8 @@ DEVICE EPROM_dev = {
t_stat EPROM_attach (UNIT *uptr, char *cptr) t_stat EPROM_attach (UNIT *uptr, char *cptr)
{ {
int j, c; uint16 j;
int c;
FILE *fp; FILE *fp;
t_stat r; t_stat r;
@ -130,7 +131,7 @@ t_stat EPROM_attach (UNIT *uptr, char *cptr)
j = 0; /* load EPROM file */ j = 0; /* load EPROM file */
c = fgetc(fp); c = fgetc(fp);
while (c != EOF) { while (c != EOF) {
*(uint8 *)(EPROM_unit.filebuf + j++) = c & 0xFF; *((uint8 *)EPROM_unit.filebuf + j++) = c & 0xFF;
c = fgetc(fp); c = fgetc(fp);
if (j >= EPROM_unit.capac) { if (j >= EPROM_unit.capac) {
sim_printf("\tImage is too large - Load truncated!!!\n"); sim_printf("\tImage is too large - Load truncated!!!\n");
@ -148,8 +149,6 @@ t_stat EPROM_attach (UNIT *uptr, char *cptr)
t_stat EPROM_reset (DEVICE *dptr, int32 size) t_stat EPROM_reset (DEVICE *dptr, int32 size)
{ {
t_stat r;
// sim_debug (DEBUG_flow, &EPROM_dev, " EPROM_reset: base=0000 size=%04X\n", size); // sim_debug (DEBUG_flow, &EPROM_dev, " EPROM_reset: base=0000 size=%04X\n", size);
if ((EPROM_unit.flags & UNIT_ATT) == 0) { /* if unattached */ if ((EPROM_unit.flags & UNIT_ATT) == 0) { /* if unattached */
EPROM_unit.capac = size; /* set EPROM size to 0 */ EPROM_unit.capac = size; /* set EPROM size to 0 */
@ -167,7 +166,7 @@ t_stat EPROM_reset (DEVICE *dptr, int32 size)
/* get a byte from memory */ /* get a byte from memory */
int32 EPROM_get_mbyte(int32 addr) int32 EPROM_get_mbyte(uint32 addr)
{ {
int32 val; int32 val;
@ -176,14 +175,14 @@ int32 EPROM_get_mbyte(int32 addr)
if ((addr >= 0) && (addr < EPROM_unit.capac)) { if ((addr >= 0) && (addr < EPROM_unit.capac)) {
SET_XACK(1); /* good memory address */ SET_XACK(1); /* good memory address */
sim_debug (DEBUG_xack, &EPROM_dev, "EPROM_get_mbyte: Set XACK for %04X\n", addr); sim_debug (DEBUG_xack, &EPROM_dev, "EPROM_get_mbyte: Set XACK for %04X\n", addr);
val = *(uint8 *)(EPROM_unit.filebuf + addr); val = *((uint8 *)EPROM_unit.filebuf + addr);
sim_debug (DEBUG_read, &EPROM_dev, " val=%04X\n", val); sim_debug (DEBUG_read, &EPROM_dev, " val=%04X\n", val);
return (val & 0xFF); return (val & 0xFF);
} }
sim_debug (DEBUG_read, &EPROM_dev, " EPROM Disabled\n"); sim_debug (DEBUG_read, &EPROM_dev, " Out of range\n");
return 0xFF; return 0xFF;
} }
sim_debug (DEBUG_read, &EPROM_dev, " Out of range\n"); sim_debug (DEBUG_read, &EPROM_dev, " EPROM Disabled\n");
return 0xFF; return 0xFF;
} }

18
Intel-Systems/common/iram8.c
View file

@ -122,19 +122,19 @@ int32 RAM_get_mbyte(int32 addr)
{ {
int32 val; int32 val;
if (i8255_unit.u6 & 0x02) { /* enable RAM */ if (i8255_unit.u5 & 0x02) { /* enable RAM */
sim_debug (DEBUG_read, &RAM_dev, "RAM_get_mbyte: addr=%04X\n", addr); sim_debug (DEBUG_read, &RAM_dev, "RAM_get_mbyte: addr=%04X\n", addr);
if ((addr >= RAM_unit.u3) && (addr < (RAM_unit.u3 + RAM_unit.capac))) { if ((addr >= RAM_unit.u3) && ((uint32) addr < (RAM_unit.u3 + RAM_unit.capac))) {
SET_XACK(1); /* good memory address */ SET_XACK(1); /* good memory address */
sim_debug (DEBUG_xack, &RAM_dev, "RAM_get_mbyte: Set XACK for %04X\n", addr); sim_debug (DEBUG_xack, &RAM_dev, "RAM_get_mbyte: Set XACK for %04X\n", addr);
val = *(uint8 *)(RAM_unit.filebuf + (addr - RAM_unit.u3)); val = *((uint8 *)RAM_unit.filebuf + (addr - RAM_unit.u3));
sim_debug (DEBUG_read, &RAM_dev, " val=%04X\n", val); sim_debug (DEBUG_read, &RAM_dev, " val=%04X\n", val);
return (val & 0xFF); return (val & 0xFF);
} }
sim_debug (DEBUG_read, &RAM_dev, " RAM disabled\n"); sim_debug (DEBUG_read, &RAM_dev, " Out of range\n");
return 0xFF; return 0xFF;
} }
sim_debug (DEBUG_read, &RAM_dev, " Out of range\n"); sim_debug (DEBUG_read, &RAM_dev, " RAM disabled\n");
return 0xFF; return 0xFF;
} }
@ -144,17 +144,17 @@ void RAM_put_mbyte(int32 addr, int32 val)
{ {
if (i8255_unit.u5 & 0x02) { /* enable RAM */ if (i8255_unit.u5 & 0x02) { /* enable RAM */
sim_debug (DEBUG_write, &RAM_dev, "RAM_put_mbyte: addr=%04X, val=%02X\n", addr, val); sim_debug (DEBUG_write, &RAM_dev, "RAM_put_mbyte: addr=%04X, val=%02X\n", addr, val);
if ((addr >= RAM_unit.u3) && (addr < RAM_unit.u3 + RAM_unit.capac)) { if ((addr >= RAM_unit.u3) && ((uint32)addr < RAM_unit.u3 + RAM_unit.capac)) {
SET_XACK(1); /* good memory address */ SET_XACK(1); /* good memory address */
sim_debug (DEBUG_xack, &RAM_dev, "RAM_put_mbyte: Set XACK for %04X\n", addr); sim_debug (DEBUG_xack, &RAM_dev, "RAM_put_mbyte: Set XACK for %04X\n", addr);
*(uint8 *)(RAM_unit.filebuf + (addr - RAM_unit.u3)) = val & 0xFF; *((uint8 *)RAM_unit.filebuf + (addr - RAM_unit.u3)) = val & 0xFF;
sim_debug (DEBUG_write, &RAM_dev, "\n"); sim_debug (DEBUG_write, &RAM_dev, "\n");
return; return;
} }
sim_debug (DEBUG_write, &RAM_dev, " RAM disabled\n"); sim_debug (DEBUG_write, &RAM_dev, " Out of range\n");
return; return;
} }
sim_debug (DEBUG_write, &RAM_dev, " Out of range\n"); sim_debug (DEBUG_write, &RAM_dev, " RAM disabled\n");
} }
/* end of iRAM8.c */ /* end of iRAM8.c */

6
Intel-Systems/common/isbc064.c
View file

@ -106,7 +106,7 @@ t_stat isbc064_reset (DEVICE *dptr)
isbc064_unit.u3 + isbc064_unit.capac - 1); isbc064_unit.u3 + isbc064_unit.capac - 1);
} }
if (isbc064_unit.filebuf == NULL) { if (isbc064_unit.filebuf == NULL) {
isbc064_unit.filebuf = malloc(isbc064_unit.capac); isbc064_unit.filebuf = (uint8 *)malloc(isbc064_unit.capac);
if (isbc064_unit.filebuf == NULL) { if (isbc064_unit.filebuf == NULL) {
sim_debug (DEBUG_flow, &isbc064_dev, "isbc064_reset: Malloc error\n"); sim_debug (DEBUG_flow, &isbc064_dev, "isbc064_reset: Malloc error\n");
return SCPE_MEM; return SCPE_MEM;
@ -131,7 +131,7 @@ int32 isbc064_get_mbyte(int32 addr)
if ((addr >= org) && (addr < (org + len))) { if ((addr >= org) && (addr < (org + len))) {
SET_XACK(1); /* good memory address */ SET_XACK(1); /* good memory address */
sim_debug (DEBUG_xack, &isbc064_dev, "isbc064_get_mbyte: Set XACK for %04X\n", addr); sim_debug (DEBUG_xack, &isbc064_dev, "isbc064_get_mbyte: Set XACK for %04X\n", addr);
val = *(uint8 *)(isbc064_unit.filebuf + (addr - org)); val = *((uint8 *)isbc064_unit.filebuf + (addr - org));
sim_debug (DEBUG_read, &isbc064_dev, " val=%04X\n", val); sim_debug (DEBUG_read, &isbc064_dev, " val=%04X\n", val);
return (val & 0xFF); return (val & 0xFF);
} else { } else {
@ -169,7 +169,7 @@ void isbc064_put_mbyte(int32 addr, int32 val)
if ((addr >= org) && (addr < (org + len))) { if ((addr >= org) && (addr < (org + len))) {
SET_XACK(1); /* good memory address */ SET_XACK(1); /* good memory address */
sim_debug (DEBUG_write, &isbc064_dev, "isbc064_put_mbyte: Set XACK for %04X\n", addr); sim_debug (DEBUG_write, &isbc064_dev, "isbc064_put_mbyte: Set XACK for %04X\n", addr);
*(uint8 *)(isbc064_unit.filebuf + (addr - org)) = val & 0xFF; *((uint8 *)isbc064_unit.filebuf + (addr - org)) = val & 0xFF;
sim_debug (DEBUG_write, &isbc064_dev, "isbc064_put_mbyte: Return\n"); sim_debug (DEBUG_write, &isbc064_dev, "isbc064_put_mbyte: Return\n");
return; return;
} else { } else {

7
Intel-Systems/common/isbc208.c
View file

@ -675,7 +675,8 @@ DEVICE isbc208_dev = {
t_stat isbc208_svc (UNIT *uptr) t_stat isbc208_svc (UNIT *uptr)
{ {
int32 i, imgadr, data; uint32 i;
int32 imgadr, data;
int c; int c;
int32 bpt, bpc; int32 bpt, bpc;
FILE *fp; FILE *fp;
@ -1055,8 +1056,8 @@ int32 isbc208_r11(int32 io, int32 data)
i8272_msr = CB + hed + drv; /* command phase all others done */ i8272_msr = CB + hed + drv; /* command phase all others done */
break; break;
} }
return 0;
} }
return 0;
} }
/* Reset routine */ /* Reset routine */
@ -1200,8 +1201,6 @@ t_stat isbc208_attach (UNIT *uptr, char *cptr)
t_stat isbc208_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc) t_stat isbc208_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
{ {
UNIT *uptr1;
sim_debug (DEBUG_flow, &isbc208_dev, " isbc208_set_mode: Entered with val=%08XH uptr->flags=%08X\n", sim_debug (DEBUG_flow, &isbc208_dev, " isbc208_set_mode: Entered with val=%08XH uptr->flags=%08X\n",
val, uptr->flags); val, uptr->flags);
if (val & UNIT_WPMODE) { /* write protect */ if (val & UNIT_WPMODE) { /* write protect */

2
Intel-Systems/common/multibus.c
View file

@ -134,6 +134,7 @@ t_stat multibus_svc(UNIT *uptr)
break; break;
} }
sim_activate (&multibus_unit, multibus_unit.wait); /* continue poll */ sim_activate (&multibus_unit, multibus_unit.wait); /* continue poll */
return SCPE_OK;
} }
/* Reset routine */ /* Reset routine */
@ -251,6 +252,7 @@ int32 reg_dev(int32 (*routine)(), int32 port)
// sim_printf("Port %02X is assigned\n", port); // sim_printf("Port %02X is assigned\n", port);
dev_table[port].routine = routine; dev_table[port].routine = routine;
} }
return 0;
} }
/* get a byte from memory */ /* get a byte from memory */

4
Visual Studio Projects/isys8010.vcproj
View file

@ -210,6 +210,10 @@
RelativePath="..\Intel-Systems\common\ieprom.c" RelativePath="..\Intel-Systems\common\ieprom.c"
> >
</File> </File>
<File
RelativePath="..\Intel-Systems\common\iram8.c"
>
</File>
<File <File
RelativePath="..\Intel-Systems\common\isbc064.c" RelativePath="..\Intel-Systems\common\isbc064.c"
> >