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SDS: Adjust real-time clock pulse interrupt period

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Clock is running twice as fast as it should -- 120 interrupts per second instead of 60.  Cannot find problem in initialization or calibration or count-down code, so for now, divide rtc_tps by 2 prior to invoking sim_rtcn_calb.  Now 940 Executive reports wall-clock time advancing at proper rate.
This commit is contained in:
Mark Emmer 2014-03-02 22:49:04 -06:00
parent 396e78cb26
commit cf56b11321
1 changed files with 5 additions and 1 deletions
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6
SDS/sds_cpu.c
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@ -1582,13 +1582,17 @@ return SCPE_OK;
a unit service routine and a reset routine. The service routine a unit service routine and a reset routine. The service routine
sets an interrupt that invokes the clock counter. The clock counter sets an interrupt that invokes the clock counter. The clock counter
is a "one instruction interrupt", and only MIN/SKR are valid. is a "one instruction interrupt", and only MIN/SKR are valid.
Temporarily divide rtc_tps by 2 because clock is running twice as
fast as it should. Eventually have to find problem in the clock
calibration or setup code.
*/ */
t_stat rtc_svc (UNIT *uptr) t_stat rtc_svc (UNIT *uptr)
{ {
if (rtc_pie) /* set pulse intr */ if (rtc_pie) /* set pulse intr */
int_req = int_req | INT_RTCP; int_req = int_req | INT_RTCP;
sim_activate (&rtc_unit, sim_rtcn_calb (rtc_tps, TMR_RTC)); /* reactivate */ sim_activate (&rtc_unit, sim_rtcn_calb (rtc_tps/2, TMR_RTC)); /* reactivate */
return SCPE_OK; return SCPE_OK;
} }