From d14243c858f0d469b0adb94157c47d70d42aac81 Mon Sep 17 00:00:00 2001 From: Bob Supnik Date: Sat, 28 Jan 2017 12:15:34 -0800 Subject: [PATCH] PDP8: Renamed switch register variable to SR As discussed in: #385 --- PDP8/pdp8_cpu.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/PDP8/pdp8_cpu.c b/PDP8/pdp8_cpu.c index 463ec4c2..3597cc49 100644 --- a/PDP8/pdp8_cpu.c +++ b/PDP8/pdp8_cpu.c @@ -1,6 +1,6 @@ /* pdp8_cpu.c: PDP-8 CPU simulator - Copyright (c) 1993-2016, Robert M Supnik + Copyright (c) 1993-2017, Robert M Supnik Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), @@ -25,6 +25,7 @@ cpu central processor + 28-Jan-17 RMS Renamed switch register variable to SR, per request 18-Sep-16 RMS Added alternate dispatch table for non-contiguous devices 17-Sep-13 RMS Fixed boot in wrong field problem (Dave Gesswein) 28-Apr-07 RMS Removed clock initialization @@ -225,7 +226,7 @@ int32 gtf = 0; /* EAE gtf flag */ int32 SC = 0; /* EAE shift count */ int32 UB = 0; /* User mode Buffer */ int32 UF = 0; /* User mode Flag */ -int32 OSR = 0; /* Switch Register */ +int32 SR = 0; /* Switch Register */ int32 tsc_ir = 0; /* TSC8-75 IR */ int32 tsc_pc = 0; /* TSC8-75 PC */ int32 tsc_cdf = 0; /* TSC8-75 CDF flag */ @@ -266,7 +267,7 @@ REG cpu_reg[] = { { ORDATAD (AC, saved_LAC, 12, "accumulator") }, { FLDATAD (L, saved_LAC, 12, "link") }, { ORDATAD (MQ, saved_MQ, 12, "multiplier-quotient") }, - { ORDATAD (SR, OSR, 12, "front panel switches") }, + { ORDATAD (SR, SR, 12, "front panel switches") }, { GRDATAD (IF, saved_PC, 8, 3, 12, "instruction field") }, { GRDATAD (DF, saved_DF, 8, 3, 12, "data field") }, { GRDATAD (IB, IB, 8, 3, 12, "instruction field buffter") }, @@ -921,7 +922,7 @@ switch ((IR >> 7) & 037) { /* decode IR<0:4> */ } else { if (IR & 04) /* OSR */ - LAC = LAC | OSR; + LAC = LAC | SR; if (IR & 02) /* HLT */ reason = STOP_HALT; }