From d3426c3d6d2178c765071d80eace7c332fcff138 Mon Sep 17 00:00:00 2001 From: Peter Schorn Date: Sun, 7 Jun 2020 11:49:18 +0200 Subject: [PATCH] AltairZ80: Removed obsolete platform dependency --- AltairZ80/altairz80_cpu.c | 49 +++++---------- AltairZ80/altairz80_cpu_nommu.c | 8 --- AltairZ80/altairz80_defs.h | 13 ---- AltairZ80/altairz80_net.c | 8 +-- AltairZ80/altairz80_sio.c | 12 ++-- AltairZ80/i8272.c | 6 +- AltairZ80/i86_decode.c | 18 ++---- AltairZ80/i86_ops.c | 18 +----- AltairZ80/m68ksim.c | 24 +++----- AltairZ80/mfdc.c | 44 ++++++------- AltairZ80/n8vem.c | 2 +- AltairZ80/s100_64fdc.c | 28 ++++----- AltairZ80/s100_adcs6.c | 4 +- AltairZ80/s100_disk1a.c | 4 +- AltairZ80/s100_disk2.c | 20 +++--- AltairZ80/s100_fif.c | 12 ++-- AltairZ80/s100_jadedd.c | 64 +++++++++---------- AltairZ80/s100_mdriveh.c | 2 +- AltairZ80/s100_mdsa.c | 34 +++++----- AltairZ80/s100_mdsad.c | 32 +++++----- AltairZ80/s100_scp300f.c | 2 +- AltairZ80/s100_selchan.c | 6 +- AltairZ80/s100_tarbell.c | 106 ++++++++++++++++---------------- AltairZ80/vfdhd.c | 34 +++++----- AltairZ80/wd179x.c | 2 +- 25 files changed, 237 insertions(+), 315 deletions(-) diff --git a/AltairZ80/altairz80_cpu.c b/AltairZ80/altairz80_cpu.c index c472f790..d2f4e4a1 100644 --- a/AltairZ80/altairz80_cpu.c +++ b/AltairZ80/altairz80_cpu.c @@ -1845,9 +1845,9 @@ static void PutBYTE(register uint32 Addr, const register uint32 Value) { m.routine(Addr, 1, Value); else if (cpu_unit.flags & UNIT_CPU_VERBOSE) { if (m.isEmpty) - sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); + sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT ".\n", PCX, Addr); else - sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT "." NLP, PCX, Addr); + sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT ".\n", PCX, Addr); } } @@ -1863,9 +1863,9 @@ void PutBYTEExtended(register uint32 Addr, const register uint32 Value) { m.routine(Addr, 1, Value); else if (cpu_unit.flags & UNIT_CPU_VERBOSE) { if (m.isEmpty) - sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); + sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT ".\n", PCX, Addr); else - sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT "." NLP, PCX, Addr); + sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT ".\n", PCX, Addr); } } @@ -1888,7 +1888,7 @@ static uint32 GetBYTE(register uint32 Addr) { return m.routine(Addr, 0, 0); /* memory mapped I/O */ if (m.isEmpty) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); + sim_printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT ".\n", PCX, Addr); return 0xff; } return M[Addr]; /* ROM */ @@ -1906,7 +1906,7 @@ uint32 GetBYTEExtended(register uint32 Addr) { return m.routine(Addr, 0, 0); if (m.isEmpty) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); + sim_printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT ".\n", PCX, Addr); return 0xff; } return M[Addr]; @@ -2062,23 +2062,6 @@ void setClockFrequency(const uint32 Value) { } -#if !UNIX_PLATFORM - -/* Poll for CPU stop when user presses sim_int_char. Must be followed by sim_process_event */ - -#define INITIAL_POLL_COUNTER 1000 - -void pollForCPUStop(void) { - static uint32 pollCounter = INITIAL_POLL_COUNTER; - if (--pollCounter == 0) { - pollCounter = INITIAL_POLL_COUNTER; - sim_poll_kbd(); /* the following sim_process_event will check for stop */ - } -} - -#endif - - static t_stat sim_instr_mmu (void) { extern int32 timerInterrupt; extern int32 timerInterruptHandler; @@ -2129,10 +2112,6 @@ static t_stat sim_instr_mmu (void) { /* main instruction fetch/decode loop */ while (switch_cpu_now == TRUE) { /* loop until halted */ if (sim_interval <= 0) { /* check clock queue */ -#if !UNIX_PLATFORM - /* poll on platforms without reliable signalling but not too often */ - pollForCPUStop(); /* following sim_process_event will check for stop */ -#endif if ((reason = sim_process_event())) break; if (clockHasChanged) { @@ -6550,13 +6529,13 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) { switch(ramtype) { case 1: if (data & 0x40) { - sim_printf("HRAM: Parity %s" NLP, data & 1 ? "ON" : "OFF"); + sim_printf("HRAM: Parity %s\n", data & 1 ? "ON" : "OFF"); } else { - sim_printf("HRAM BANKSEL=%02x" NLP, data); + sim_printf("HRAM BANKSEL=%02x\n", data); } break; case 2: -/* sim_printf("VRAM BANKSEL=%02x" NLP, data);*/ +/* sim_printf("VRAM BANKSEL=%02x\n", data);*/ switch(data & 0xFF) { case 0x01: /* case 0x41: // OASIS uses this for some reason? */ @@ -6585,12 +6564,12 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) { setBankSelect(7); break; default: -/* sim_printf("Invalid bank select 0x%02x for VRAM" NLP, data);*/ +/* sim_printf("Invalid bank select 0x%02x for VRAM\n", data);*/ break; } break; case 3: -/* sim_printf(ADDRESS_FORMAT " CRAM BANKSEL=%02x" NLP, PCX, data); */ +/* sim_printf(ADDRESS_FORMAT " CRAM BANKSEL=%02x\n", PCX, data); */ switch(data & 0x7F) { case 0x01: setBankSelect(0); @@ -6617,7 +6596,7 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) { /* setBankSelect(7); */ /* break; */ default: - sim_printf("Invalid bank select 0x%02x for CRAM" NLP, data); + sim_printf("Invalid bank select 0x%02x for CRAM\n", data); break; } @@ -6683,14 +6662,14 @@ static int32 switchcpu_io(const int32 port, const int32 io, CONST int32 data) { case CHIP_TYPE_8080: case CHIP_TYPE_Z80: if (cpu_unit.flags & UNIT_CPU_VERBOSE) { - sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8086" NLP, PCX, port); + sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8086\n", PCX, port); } new_chiptype = CHIP_TYPE_8086; switch_cpu_now = FALSE; /* hharte */ break; case CHIP_TYPE_8086: if (cpu_unit.flags & UNIT_CPU_VERBOSE) { - sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8085/Z80" NLP, PCX, port); + sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8085/Z80\n", PCX, port); } new_chiptype = CHIP_TYPE_Z80; switch_cpu_now = FALSE; /* hharte */ diff --git a/AltairZ80/altairz80_cpu_nommu.c b/AltairZ80/altairz80_cpu_nommu.c index 95eb25de..aaa04b32 100644 --- a/AltairZ80/altairz80_cpu_nommu.c +++ b/AltairZ80/altairz80_cpu_nommu.c @@ -124,10 +124,6 @@ extern int32 HL1_S; /* alternate HL register */ extern int32 IFF_S; /* Interrupt Flip Flop */ extern int32 IR_S; /* Interrupt (upper) / Refresh (lower) register */ -#if !UNIX_PLATFORM -extern void pollForCPUStop(void); -#endif - /* the following tables precompute some common subexpressions parityTable[i] 0..255 (number of 1's in i is odd) ? 0 : 4 incTable[i] 0..256! (i & 0xa8) | (((i & 0xff) == 0) << 6) | (((i & 0xf) == 0) << 4) @@ -1019,10 +1015,6 @@ t_stat sim_instr_nommu(void) { /* main instruction fetch/decode loop */ while (TRUE) { /* loop until halted */ if (sim_interval <= 0) { /* check clock queue */ -#if !UNIX_PLATFORM - /* poll on platforms without reliable signalling but not too often */ - pollForCPUStop(); /* following sim_process_event will check for stop */ -#endif if ((reason = sim_process_event())) break; } diff --git a/AltairZ80/altairz80_defs.h b/AltairZ80/altairz80_defs.h index 5d50a89d..4f8279d5 100644 --- a/AltairZ80/altairz80_defs.h +++ b/AltairZ80/altairz80_defs.h @@ -83,21 +83,8 @@ typedef enum { #define UNIT_CPU_V_SWITCHER (UNIT_V_UF+6) /* switcher 8086 <--> 8080/Z80 enabled */ #define UNIT_CPU_SWITCHER (1 << UNIT_CPU_V_SWITCHER) -#if defined (__linux) || defined (__linux__) || defined(__NetBSD__) || defined (__OpenBSD__) || defined (__FreeBSD__) || defined (__APPLE__) || defined (__hpux) || defined (__CYGWIN__) -#define UNIX_PLATFORM 1 -#else -#define UNIX_PLATFORM 0 -#endif - #define ADDRESS_FORMAT "[0x%08x]" -/* use NLP for new line printing while the simulation is running */ -#if UNIX_PLATFORM -#define NLP "\r\n" -#else -#define NLP "\n" -#endif - #if (defined (__MWERKS__) && defined (macintosh)) || defined(__DECC) #define __FUNCTION__ __FILE__ #endif diff --git a/AltairZ80/altairz80_net.c b/AltairZ80/altairz80_net.c index c6010e40..2cfd5016 100644 --- a/AltairZ80/altairz80_net.c +++ b/AltairZ80/altairz80_net.c @@ -217,7 +217,7 @@ static t_stat net_svc(UNIT *uptr) { serviceDescriptor[0].ioSocket = sim_connect_sock(net_unit.filename, "localhost", "3000"); if (serviceDescriptor[0].ioSocket == INVALID_SOCKET) return SCPE_IOERR; - sim_printf("\rWaiting for server ... Type g (possibly twice) when ready" NLP); + sim_printf("\rWaiting for server ... Type g (possibly twice) when ready\n"); return SCPE_STOP; } for (i = 0; i <= MAX_CONNECTIONS; i++) @@ -254,7 +254,7 @@ static t_stat net_svc(UNIT *uptr) { if (serviceDescriptor[i].outputPosRead >= BUFFER_LENGTH) serviceDescriptor[i].outputPosRead -= BUFFER_LENGTH; } else - sim_printf("write %i" NLP, r); + sim_printf("write %i\n", r); } } } @@ -284,7 +284,7 @@ int32 netData(const int32 port, const int32 io, const int32 data) { if (serviceDescriptor[i].Z80DataPort == port) { if (io == 0) { /* IN */ if (serviceDescriptor[i].inputSize == 0) { - sim_printf("re-read from %i" NLP, port); + sim_printf("re-read from %i\n", port); result = serviceDescriptor[i].inputBuffer[serviceDescriptor[i].inputPosRead > 0 ? serviceDescriptor[i].inputPosRead - 1 : BUFFER_LENGTH - 1]; } else { @@ -297,7 +297,7 @@ int32 netData(const int32 port, const int32 io, const int32 data) { return result; } else { /* OUT */ if (serviceDescriptor[i].outputSize == BUFFER_LENGTH) { - sim_printf("over-write %i to %i" NLP, data, port); + sim_printf("over-write %i to %i\n", data, port); serviceDescriptor[i].outputBuffer[serviceDescriptor[i].outputPosWrite > 0 ? serviceDescriptor[i].outputPosWrite - 1 : BUFFER_LENGTH - 1] = data; } else { diff --git a/AltairZ80/altairz80_sio.c b/AltairZ80/altairz80_sio.c index ba2c862c..4bdeb45d 100644 --- a/AltairZ80/altairz80_sio.c +++ b/AltairZ80/altairz80_sio.c @@ -1731,7 +1731,7 @@ static int32 simh_out(const int32 port, const int32 data) { case printTimeCmd: /* print time */ if (rtc_avail) - sim_printf("SIMH: " ADDRESS_FORMAT " Current time in milliseconds = %d." NLP, PCX, sim_os_msec()); + sim_printf("SIMH: " ADDRESS_FORMAT " Current time in milliseconds = %d.\n", PCX, sim_os_msec()); else warnNoRealTimeClock(); break; @@ -1741,7 +1741,7 @@ static int32 simh_out(const int32 port, const int32 data) { if (markTimeSP < TIMER_STACK_LIMIT) markTime[markTimeSP++] = sim_os_msec(); else - sim_printf("SIMH: " ADDRESS_FORMAT " Timer stack overflow." NLP, PCX); + sim_printf("SIMH: " ADDRESS_FORMAT " Timer stack overflow.\n", PCX); else warnNoRealTimeClock(); break; @@ -1750,9 +1750,9 @@ static int32 simh_out(const int32 port, const int32 data) { if (rtc_avail) if (markTimeSP > 0) { uint32 delta = sim_os_msec() - markTime[--markTimeSP]; - sim_printf("SIMH: " ADDRESS_FORMAT " Timer stopped. Elapsed time in milliseconds = %d." NLP, PCX, delta); + sim_printf("SIMH: " ADDRESS_FORMAT " Timer stopped. Elapsed time in milliseconds = %d.\n", PCX, delta); } else - sim_printf("SIMH: " ADDRESS_FORMAT " No timer active." NLP, PCX); + sim_printf("SIMH: " ADDRESS_FORMAT " No timer active.\n", PCX); else warnNoRealTimeClock(); break; @@ -1826,9 +1826,9 @@ static int32 simh_out(const int32 port, const int32 data) { if (rtc_avail) if (markTimeSP > 0) { uint32 delta = sim_os_msec() - markTime[markTimeSP - 1]; - sim_printf("SIMH: " ADDRESS_FORMAT " Timer running. Elapsed in milliseconds = %d." NLP, PCX, delta); + sim_printf("SIMH: " ADDRESS_FORMAT " Timer running. Elapsed in milliseconds = %d.\n", PCX, delta); } else - sim_printf("SIMH: " ADDRESS_FORMAT " No timer active." NLP, PCX); + sim_printf("SIMH: " ADDRESS_FORMAT " No timer active.\n", PCX); else warnNoRealTimeClock(); break; diff --git a/AltairZ80/i8272.c b/AltairZ80/i8272.c index f133e4bd..d5e755d7 100644 --- a/AltairZ80/i8272.c +++ b/AltairZ80/i8272.c @@ -373,7 +373,7 @@ t_stat i8272_detach(UNIT *uptr) static int32 i8272dev(const int32 port, const int32 io, const int32 data) { - DBG_PRINT(("I8272: " ADDRESS_FORMAT " %s, Port 0x%02x Data 0x%02x" NLP, + DBG_PRINT(("I8272: " ADDRESS_FORMAT " %s, Port 0x%02x Data 0x%02x\n", PCX, io ? "OUT" : " IN", port, data)); if(io) { I8272_Write(port, data); @@ -777,7 +777,7 @@ uint8 I8272_Write(const uint32 Addr, uint8 cData) if(i8272_info->fdc_phase == EXEC_PHASE) { switch(i8272_info->cmd[0] & 0x1F) { case I8272_READ_TRACK: - sim_printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX); + sim_printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)\n", PCX); i8272_info->fdc_sector = 1; /* Read entire track from sector 1...eot */ /* fall through */ @@ -798,7 +798,7 @@ uint8 I8272_Write(const uint32 Addr, uint8 cData) 128 << i8272_info->fdc_sec_len); if(pDrive->imd == NULL) { - sim_printf(".imd is NULL!" NLP); + sim_printf(".imd is NULL!\n"); } if(disk_read) { /* Read sector */ sectRead(pDrive->imd, diff --git a/AltairZ80/i86_decode.c b/AltairZ80/i86_decode.c index d83e462a..be37e3c6 100644 --- a/AltairZ80/i86_decode.c +++ b/AltairZ80/i86_decode.c @@ -47,10 +47,6 @@ extern int32 PCX_S; /* PC register (8086), 20 bit */ extern uint32 PCX; /* external view of PC */ extern UNIT cpu_unit; -#if !UNIX_PLATFORM -extern void pollForCPUStop(void); -#endif - void i86_intr_raise(PC_ENV *m,uint8 intrnum); void cpu8086reset(void); t_stat sim_instr_8086(void); @@ -209,16 +205,12 @@ t_stat sim_instr_8086(void) { if (CS_S != ((PCX_S & 0xf0000) >> 4)) { cpu8086.R_CS = (PCX_S & 0xf0000) >> 4; if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("CPU: " ADDRESS_FORMAT " Segment register CS set to %04x" NLP, PCX, cpu8086.R_CS); + sim_printf("CPU: " ADDRESS_FORMAT " Segment register CS set to %04x\n", PCX, cpu8086.R_CS); } cpu8086.R_IP = PCX_S & 0xffff; } while (switch_cpu_now == TRUE) { /* loop until halted */ if (sim_interval <= 0) { /* check clock queue */ -#if !UNIX_PLATFORM - /* poll on platforms without reliable signalling but not too often */ - pollForCPUStop(); /* following sim_process_event will check for stop */ -#endif if ( (reason = sim_process_event()) ) break; } @@ -736,7 +728,7 @@ uint8 fetch_data_byte(PC_ENV *m, uint16 offset) value = GetBYTEExtended((((uint32)m->R_SS << 4) + offset) & 0xFFFFF); break; default: - sim_printf("error: should not happen: multiple overrides. " NLP); + sim_printf("error: should not happen: multiple overrides. \n"); value = 0; halt_sys(m); } @@ -816,7 +808,7 @@ uint16 fetch_data_word(PC_ENV *m, uint16 offset) + (uint16)(offset + 1)) & 0xFFFFF) << 8); break; default: - sim_printf("error: should not happen: multiple overrides. " NLP); + sim_printf("error: should not happen: multiple overrides. \n"); value = 0; halt_sys(m); } @@ -880,7 +872,7 @@ void store_data_byte(PC_ENV *m, uint16 offset, uint8 val) segment = m->R_SS; break; default: - sim_printf("error: should not happen: multiple overrides. " NLP); + sim_printf("error: should not happen: multiple overrides. \n"); segment = 0; halt_sys(m); } @@ -942,7 +934,7 @@ void store_data_word(PC_ENV *m, uint16 offset, uint16 val) segment = m->R_SS; break; default: - sim_printf("error: should not happen: multiple overrides." NLP); + sim_printf("error: should not happen: multiple overrides.\n"); segment = 0; halt_sys(m); } diff --git a/AltairZ80/i86_ops.c b/AltairZ80/i86_ops.c index 241d8e79..c7a1f4e2 100644 --- a/AltairZ80/i86_ops.c +++ b/AltairZ80/i86_ops.c @@ -4118,28 +4118,12 @@ static void i86op_opcD3_word_RM_CL(PC_ENV *m) DECODE_CLEAR_SEGOVR(m); } -static void sys_fatal(int error, const char *fmt, ...) -{ - va_list p; - va_start(p, fmt); - fprintf(stderr, "Fatal error: "); - if (error != 0) - { - fprintf(stderr, "<%d>",error); - fprintf(stderr,"%s",strerror(error)); - } - vfprintf(stderr, fmt, p); - va_end(p); - fprintf(stderr, NLP "Exiting..." NLP); - exit(1); -} - /* opcode=0xd4*/ static void i86op_aam(PC_ENV *m) { uint8 a; a = fetch_byte_imm(m); /* this is a stupid encoding. */ if (a != 10) - sys_fatal(0,"error decoding aam" NLP); + sim_printf("CPU: " ADDRESS_FORMAT " Error decoding AAM: Expected 0x0a but got 0x%2x.\n", m->Sp_regs.IP.I16_reg.x_reg, a); /* note the type change here --- returning AL and AH in AX. */ m->R_AX = aam_word(m,m->R_AL); DECODE_CLEAR_SEGOVR(m); diff --git a/AltairZ80/m68ksim.c b/AltairZ80/m68ksim.c index 88ff6f39..6e2c7af8 100644 --- a/AltairZ80/m68ksim.c +++ b/AltairZ80/m68ksim.c @@ -158,10 +158,6 @@ static uint32 m68k_fc; /* Current function code fro extern uint32 m68k_registers[M68K_REG_CPU_TYPE + 1]; extern UNIT cpu_unit; -#if !UNIX_PLATFORM -extern void pollForCPUStop(void); -#endif - #define M68K_BOOT_LENGTH (32 * 1024) /* size of bootstrap */ #define M68K_BOOT_PC 0x000400 /* initial PC for boot */ #define M68K_BOOT_SP 0xfe0000 /* initial SP for boot */ @@ -218,10 +214,6 @@ t_stat sim_instr_m68k(void) { m68k_viewToCPU(); while (TRUE) { if (sim_interval <= 0) { /* check clock queue */ -#if !UNIX_PLATFORM - /* poll on platforms without reliable signalling but not too often */ - pollForCPUStop(); /* following sim_process_event will check for stop */ -#endif if ((reason = sim_process_event())) break; m68k_input_device_update(); @@ -341,7 +333,7 @@ static void MC6850_control_write(uint32 val) { unsigned int m68k_cpu_read_byte_raw(unsigned int address) { if (address > M68K_MAX_RAM) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x.\n", PCX, address); return 0xff; } @@ -359,7 +351,7 @@ unsigned int m68k_cpu_read_byte(unsigned int address) { } if (address > M68K_MAX_RAM) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x.\n", PCX, address); return 0xff; } @@ -375,7 +367,7 @@ unsigned int m68k_cpu_read_word(unsigned int address) { } if (address > M68K_MAX_RAM-1) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to read word from non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to read word from non existing memory 0x%08x.\n", PCX, address); return 0xffff; } @@ -393,7 +385,7 @@ unsigned int m68k_cpu_read_long(unsigned int address) { } if (address > M68K_MAX_RAM-3) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to read long from non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to read long from non existing memory 0x%08x.\n", PCX, address); return 0xffffffff; } @@ -405,7 +397,7 @@ unsigned int m68k_cpu_read_long(unsigned int address) { void m68k_cpu_write_byte_raw(unsigned int address, unsigned int value) { if (address > M68K_MAX_RAM) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x.\n", PCX, value & 0xff, address); return; } @@ -425,7 +417,7 @@ void m68k_cpu_write_byte(unsigned int address, unsigned int value) { } if (address > M68K_MAX_RAM) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x.\n", PCX, value & 0xff, address); return; } @@ -435,7 +427,7 @@ void m68k_cpu_write_byte(unsigned int address, unsigned int value) { void m68k_cpu_write_word(unsigned int address, unsigned int value) { if (address > M68K_MAX_RAM-1) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to write word 0x%04x to non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to write word 0x%04x to non existing memory 0x%08x.\n", PCX, value & 0xffff, address); return; } @@ -485,7 +477,7 @@ void m68k_cpu_write_long(unsigned int address, unsigned int value) { } if (address > M68K_MAX_RAM-3) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) - sim_printf("M68K: 0x%08x Attempt to write long 0x%08x to non existing memory 0x%08x." NLP, + sim_printf("M68K: 0x%08x Attempt to write long 0x%08x to non existing memory 0x%08x.\n", PCX, value, address); return; } diff --git a/AltairZ80/mfdc.c b/AltairZ80/mfdc.c index 9c6d26d9..e3d19c20 100644 --- a/AltairZ80/mfdc.c +++ b/AltairZ80/mfdc.c @@ -357,7 +357,7 @@ static int32 mdskdev(const int32 Addr, const int32 rw, const int32 data) if(rw == 0) { /* Read boot ROM */ return(mfdc_rom[Addr & 0xFF]); } else { - sim_debug(VERBOSE_MSG, &mfdc_dev, "MFDC: " ADDRESS_FORMAT " Attempt to write to boot ROM." NLP, PCX); + sim_debug(VERBOSE_MSG, &mfdc_dev, "MFDC: " ADDRESS_FORMAT " Attempt to write to boot ROM.\n", PCX); return (-1); } break; @@ -396,7 +396,7 @@ static uint8 MFDC_Read(const uint32 Addr) pDrive->sector++; pDrive->sector &= 0x0F; /* Max of 16 sectors */ mfdc_info->wr_latch = 0; /* on new sector, disable the write latch */ - DBG_PRINT(("Head over sector %d" NLP, pDrive->sector)); + DBG_PRINT(("Head over sector %d\n", pDrive->sector)); pDrive->sector_wait_count = 0; } } @@ -449,7 +449,7 @@ static uint8 MFDC_Read(const uint32 Addr) if (!(pDrive->uptr->flags & UNIT_ATT)) { if (pDrive->uptr->flags & UNIT_MFDC_VERBOSE) - sim_printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached." NLP, PCX, + sim_printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached.\n", PCX, mfdc_info->sel_drive); return 0x00; } @@ -458,9 +458,9 @@ static uint8 MFDC_Read(const uint32 Addr) { case IMAGE_TYPE_IMD: if(pDrive->imd == NULL) { - sim_printf(".imd is NULL!" NLP); + sim_printf(".imd is NULL!\n"); } -/* sim_printf("%s: Read: imd=%p" NLP, __FUNCTION__, pDrive->imd); */ +/* sim_printf("%s: Read: imd=%p\n", __FUNCTION__, pDrive->imd); */ sectRead(pDrive->imd, pDrive->track, mfdc_info->head, @@ -472,7 +472,7 @@ static uint8 MFDC_Read(const uint32 Addr) break; case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - sim_printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else if (sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { #ifdef USE_VGI rtn = sim_fread(sdata.raw, 1, MFDC_SECTOR_LEN, (pDrive->uptr)->fileref); @@ -481,20 +481,20 @@ static uint8 MFDC_Read(const uint32 Addr) rtn = sim_fread(sdata.u.data, 1, 256, (pDrive->uptr)->fileref); if (rtn != 256) #endif /* USE_VGI */ - sim_printf("%s: sim_fread error. Result = %d." NLP, __FUNCTION__, rtn); + sim_printf("%s: sim_fread error. Result = %d.\n", __FUNCTION__, rtn); } else { - sim_printf("%s: sim_fseek error." NLP, __FUNCTION__); + sim_printf("%s: sim_fseek error.\n", __FUNCTION__); } break; case IMAGE_TYPE_CPT: - sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - sim_printf("%s: Unknown image Format" NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } -/* sim_printf("%d/%d @%04x Len=%04x" NLP, sdata.u.header[0], sdata.u.header[1], sdata.u.header[9]<<8|sdata.u.header[8], sdata.u.header[11]<<8|sdata.u.header[10]); */ +/* sim_printf("%d/%d @%04x Len=%04x\n", sdata.u.header[0], sdata.u.header[1], sdata.u.header[9]<<8|sdata.u.header[8], sdata.u.header[11]<<8|sdata.u.header[10]); */ adc(0,0); /* clear Carry bit */ checksum = 0; @@ -512,7 +512,7 @@ static uint8 MFDC_Read(const uint32 Addr) */ sdata.u.checksum = checksum & 0xFF; #endif -/* DBG_PRINT(("Checksum=%x" NLP, sdata.u.checksum)); */ +/* DBG_PRINT(("Checksum=%x\n", sdata.u.checksum)); */ mfdc_info->read_in_progress = TRUE; } @@ -524,7 +524,7 @@ static uint8 MFDC_Read(const uint32 Addr) mfdc_info->read_in_progress = FALSE; } -/* DBG_PRINT(("MFDC: " ADDRESS_FORMAT " RD Data Sector %d[%03d]: 0x%02x" NLP, PCX, pDrive->sector, mfdc_info->datacount, cData)); */ +/* DBG_PRINT(("MFDC: " ADDRESS_FORMAT " RD Data Sector %d[%03d]: 0x%02x\n", PCX, pDrive->sector, mfdc_info->datacount, cData)); */ break; } @@ -547,9 +547,9 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData) break; case 2: case 3: -/* DBG_PRINT(("MFDC: " ADDRESS_FORMAT " WR Data" NLP, PCX)); */ +/* DBG_PRINT(("MFDC: " ADDRESS_FORMAT " WR Data\n", PCX)); */ if(mfdc_info->wr_latch == 0) { - sim_printf("MFDC: " ADDRESS_FORMAT " Error, attempt to write data when write latch is not set." NLP, PCX); + sim_printf("MFDC: " ADDRESS_FORMAT " Error, attempt to write data when write latch is not set.\n", PCX); } else { #ifdef USE_VGI sec_offset = (pDrive->track * MFDC_SECTOR_LEN * 16) + \ @@ -563,7 +563,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData) (pDrive->sector * 256); if((data_index >= 0) && (data_index < 256)) { - DBG_PRINT(("writing data [%03d]=%02x" NLP, data_index, cData)); + DBG_PRINT(("writing data [%03d]=%02x\n", data_index, cData)); sdata.u.data[data_index] = cData; @@ -578,7 +578,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData) if (!(pDrive->uptr->flags & UNIT_ATT)) { if (pDrive->uptr->flags & UNIT_MFDC_VERBOSE) - sim_printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached." NLP, PCX, + sim_printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached.\n", PCX, mfdc_info->sel_drive); return 0x00; } @@ -587,7 +587,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData) { case IMAGE_TYPE_IMD: if(pDrive->imd == NULL) { - sim_printf(".imd is NULL!" NLP); + sim_printf(".imd is NULL!\n"); } sectWrite(pDrive->imd, pDrive->track, @@ -600,7 +600,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData) break; case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - sim_printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else if (sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { #ifdef USE_VGI sim_fwrite(sdata.raw, 1, MFDC_SECTOR_LEN, (pDrive->uptr)->fileref); @@ -608,14 +608,14 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData) sim_fwrite(sdata.u.data, 1, 256, (pDrive->uptr)->fileref); #endif /* USE_VGI */ } else { - sim_printf("%s: sim_fseek error." NLP, __FUNCTION__); + sim_printf("%s: sim_fseek error.\n", __FUNCTION__); } break; case IMAGE_TYPE_CPT: - sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - sim_printf("%s: Unknown image Format" NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } } diff --git a/AltairZ80/n8vem.c b/AltairZ80/n8vem.c index f67aee97..73742618 100644 --- a/AltairZ80/n8vem.c +++ b/AltairZ80/n8vem.c @@ -323,7 +323,7 @@ static t_stat n8vem_detach(UNIT *uptr) */ static int32 n8vem_mem(const int32 Addr, const int32 write, const int32 data) { -/* DBG_PRINT(("N8VEM: ROM %s, Addr %04x" NLP, write ? "WR" : "RD", Addr)); */ +/* DBG_PRINT(("N8VEM: ROM %s, Addr %04x\n", write ? "WR" : "RD", Addr)); */ if(write) { if(n8vem_info->mpcl_rom & N8VEM_RAM_SELECT) { diff --git a/AltairZ80/s100_64fdc.c b/AltairZ80/s100_64fdc.c index 39441239..81694121 100644 --- a/AltairZ80/s100_64fdc.c +++ b/AltairZ80/s100_64fdc.c @@ -187,7 +187,7 @@ static uint8 ipend_to_rst_opcode(uint8 ipend) active_intr = cromfdc_info->imask & cromfdc_info->ipend; for(i=1;i != 0;i <<= 1) { -/* sim_printf("%d: %d" NLP, i, active_intr & i); */ +/* sim_printf("%d: %d\n", i, active_intr & i); */ if (active_intr & i) { return(cromfdc_irq_table[j]); } @@ -1487,38 +1487,38 @@ static t_stat cromfdc_reset(DEVICE *dptr) if(cromfdc_hasProperty(UNIT_CROMFDC_ROM)) { sim_debug(VERBOSE_MSG, &cromfdc_dev, "CROMFDC: ROM Enabled.\n"); if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &cromfdcrom, "cromfdcrom", FALSE) != 0) { - sim_printf("%s: error mapping MEM resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); + sim_printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->io_base); return SCPE_ARG; } } else sim_debug(VERBOSE_MSG, &cromfdc_dev, "CROMFDC: ROM Disabled.\n"); /* Connect CROMFDC Interrupt, and Aux Disk Registers */ if(sim_map_resource(0x03, 0x02, RESOURCE_TYPE_IO, &cromfdc_ext, "cromfdc_ext", FALSE) != 0) { - sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); + sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); return SCPE_ARG; } /* Connect CROMFDC Timer Registers */ if(sim_map_resource(0x05, 0x05, RESOURCE_TYPE_IO, &cromfdc_timer, "cromfdc_timer", FALSE) != 0) { - sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); + sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); return SCPE_ARG; } /* Connect CROMFDC Disk Flags and Control Register */ if(sim_map_resource(0x34, 0x01, RESOURCE_TYPE_IO, &cromfdc_control, "cromfdc_control", FALSE) != 0) { - sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); + sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); return SCPE_ARG; } /* Connect CROMFDC Bank Select Register */ if(sim_map_resource(0x40, 0x1, RESOURCE_TYPE_IO, &cromfdc_banksel, "cromfdc_banksel", FALSE) != 0) { - sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); + sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); return SCPE_ARG; } /* Connect CCS 2810 UART Status Register (needed by MOSS 2.2 Monitor */ if(sim_map_resource(0x26, 0x01, RESOURCE_TYPE_IO, &ccs2810_uart_status, "ccs2810_uart_status", FALSE) != 0) { - sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); + sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); return SCPE_ARG; } else { sim_debug(VERBOSE_MSG, &cromfdc_dev, "Mapped CCS2810 UART Status at 0x26\n"); @@ -1534,12 +1534,12 @@ static t_stat cromfdc_reset(DEVICE *dptr) static t_stat cromfdc_boot(int32 unitno, DEVICE *dptr) { if((crofdc_type != 4) && (crofdc_type != 16) && (crofdc_type != 64) && (crofdc_type != 50)) { - sim_printf("Invalid fdc_type: %d, must be 4, 16, or 64 (or 50 for CCS2422.)" NLP, crofdc_type); + sim_printf("Invalid fdc_type: %d, must be 4, 16, or 64 (or 50 for CCS2422.)\n", crofdc_type); return SCPE_ARG; } bootstrap &= 0x01; - DBG_PRINT(("Booting %dFDC Controller, bootstrap=%d" NLP, crofdc_type, bootstrap)); + DBG_PRINT(("Booting %dFDC Controller, bootstrap=%d\n", crofdc_type, bootstrap)); /* Re-enable the ROM in case it was disabled */ cromfdc_info->rom_disabled = FALSE; @@ -1551,7 +1551,7 @@ static t_stat cromfdc_boot(int32 unitno, DEVICE *dptr) static int32 cromfdcrom(const int32 Addr, const int32 write, const int32 data) { -/* DBG_PRINT(("CROMFDC: ROM %s, Addr %04x" NLP, write ? "WR" : "RD", Addr)); */ +/* DBG_PRINT(("CROMFDC: ROM %s, Addr %04x\n", write ? "WR" : "RD", Addr)); */ if(write) { cromfdcram[Addr & CROMFDC_ADDR_MASK] = data; return 0; @@ -1645,7 +1645,7 @@ static int32 cromfdc_control(const int32 port, const int32 io, const int32 data) break; } -/* sim_printf("CCS2422FDC: " ADDRESS_FORMAT " Read STATUS1=0x%02x" NLP, PCX, result); */ +/* sim_printf("CCS2422FDC: " ADDRESS_FORMAT " Read STATUS1=0x%02x\n", PCX, result); */ } sim_debug(STATUS_MSG, &cromfdc_dev, "CROMFDC: " ADDRESS_FORMAT " Read DISK FLAGS, Port 0x%02x Result 0x%02x\n", PCX, port, result); @@ -1675,13 +1675,13 @@ static int32 cromfdc_ext(const int32 port, const int32 io, const int32 data) } #if 0 /* hharte - nothing implemented for these */ if((data & CROMFDC_AUX_EJECT) == 0) { - sim_printf("CROMFDC: Eject" NLP); + sim_printf("CROMFDC: Eject\n"); } if((data & CROMFDC_AUX_SEL_OVERRIDE) == 0) { - sim_printf("CROMFDC: Sel Override" NLP); + sim_printf("CROMFDC: Sel Override\n"); } if((data & CROMFDC_AUX_CTRL_OUT) == 0) { - sim_printf("CROMFDC: Ctrl Out" NLP); + sim_printf("CROMFDC: Ctrl Out\n"); } #endif /* 0 */ if(crofdc_type < 64) { diff --git a/AltairZ80/s100_adcs6.c b/AltairZ80/s100_adcs6.c index 7536a94b..04075e47 100644 --- a/AltairZ80/s100_adcs6.c +++ b/AltairZ80/s100_adcs6.c @@ -453,7 +453,7 @@ static t_stat adcs6_reset(DEVICE *dptr) static t_stat adcs6_boot(int32 unitno, DEVICE *dptr) { - DBG_PRINT(("Booting ADCS6 Controller" NLP)); + DBG_PRINT(("Booting ADCS6 Controller\n")); /* Re-enable the ROM in case it was disabled */ adcs6_info->rom_disabled = FALSE; @@ -484,7 +484,7 @@ static t_stat adcs6_detach(UNIT *uptr) static int32 adcs6rom(const int32 Addr, const int32 write, const int32 data) { -/* DBG_PRINT(("ADCS6: ROM %s, Addr %04x" NLP, write ? "WR" : "RD", Addr)); */ +/* DBG_PRINT(("ADCS6: ROM %s, Addr %04x\n", write ? "WR" : "RD", Addr)); */ if(write) { if(adcs6_info->rom_disabled == FALSE) { sim_debug(ERROR_MSG, &adcs6_dev, "ADCS6: " ADDRESS_FORMAT diff --git a/AltairZ80/s100_disk1a.c b/AltairZ80/s100_disk1a.c index c6eb7e83..e8cbd344 100644 --- a/AltairZ80/s100_disk1a.c +++ b/AltairZ80/s100_disk1a.c @@ -741,7 +741,7 @@ static t_stat disk1a_reset(DEVICE *dptr) static t_stat disk1a_boot(int32 unitno, DEVICE *dptr) { bootstrap &= 0xF; - DBG_PRINT(("Booting DISK1A Controller, bootstrap=%d" NLP, bootstrap)); + DBG_PRINT(("Booting DISK1A Controller, bootstrap=%d\n", bootstrap)); /* Re-enable the ROM in case it was disabled */ disk1a_info->rom_disabled = FALSE; @@ -772,7 +772,7 @@ static t_stat disk1a_detach(UNIT *uptr) static int32 disk1arom(const int32 Addr, const int32 write, const int32 data) { -/* DBG_PRINT(("DISK1A: ROM %s, Addr %04x" NLP, write ? "WR" : "RD", Addr)); */ +/* DBG_PRINT(("DISK1A: ROM %s, Addr %04x\n", write ? "WR" : "RD", Addr)); */ if(write) { disk1aram[Addr & 0x1FF] = data; return 0; diff --git a/AltairZ80/s100_disk2.c b/AltairZ80/s100_disk2.c index dc28dc96..2bbaf387 100644 --- a/AltairZ80/s100_disk2.c +++ b/AltairZ80/s100_disk2.c @@ -442,7 +442,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) " READ_DATA: (C:%d/H:%d/S:%d)\n", PCX, disk2_info->cyl, disk2_info->head, disk2_info->sector); if(disk2_info->head_sel != disk2_info->head) { sim_printf("DISK2: " ADDRESS_FORMAT - " READ_DATA: head_sel != head" NLP, PCX); + " READ_DATA: head_sel != head\n", PCX); } /* See FIXME above... that might be why this does not work properly... */ if(disk2_info->cyl != pDrive->track) { /* problem, should not happen, see above */ @@ -461,12 +461,12 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) if(sdata.u.header[2] == disk2_info->sector) { if(sdata.u.header[0] != disk2_info->cyl) { /*pDrive->track) { */ sim_printf("DISK2: " ADDRESS_FORMAT - " READ_DATA Incorrect header: track" NLP, PCX); + " READ_DATA Incorrect header: track\n", PCX); disk2_info->timeout = 1; } if(sdata.u.header[1] != disk2_info->head) { sim_printf("DISK2: " ADDRESS_FORMAT - " READ_DATA Incorrect header: head" NLP, PCX); + " READ_DATA Incorrect header: head\n", PCX); disk2_info->timeout = 1; } @@ -475,7 +475,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) } if(i == pDrive->nsectors) { sim_printf("DISK2: " ADDRESS_FORMAT - " Sector not found" NLP, PCX); + " Sector not found\n", PCX); disk2_info->timeout = 1; } } @@ -489,7 +489,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) sim_debug(WR_DATA_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT " WRITE_DATA: (C:%d/H:%d/S:%d)\n", PCX, disk2_info->cyl, disk2_info->head, disk2_info->sector); if(disk2_info->head_sel != disk2_info->head) { - sim_printf("DISK2: " ADDRESS_FORMAT " WRITE_DATA: head_sel != head" NLP, PCX); + sim_printf("DISK2: " ADDRESS_FORMAT " WRITE_DATA: head_sel != head\n", PCX); } if(disk2_info->cyl != pDrive->track) { /* problem, should not happen, see above */ sim_debug(ERROR_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT @@ -509,12 +509,12 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) if(sdata.u.header[2] == disk2_info->sector) { if(sdata.u.header[0] != disk2_info->cyl) { sim_printf("DISK2: " ADDRESS_FORMAT - " WRITE_DATA Incorrect header: track" NLP, PCX); + " WRITE_DATA Incorrect header: track\n", PCX); disk2_info->timeout = 1; } if(sdata.u.header[1] != disk2_info->head) { sim_printf("DISK2: " ADDRESS_FORMAT - " WRITE_DATA Incorrect header: head" NLP, PCX); + " WRITE_DATA Incorrect header: head\n", PCX); disk2_info->timeout = 1; } @@ -533,7 +533,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) " WRITE_DATA: sim_fread error.\n", PCX); } if(i == pDrive->nsectors) { - sim_printf("DISK2: " ADDRESS_FORMAT " Sector not found" NLP, PCX); + sim_printf("DISK2: " ADDRESS_FORMAT " Sector not found\n", PCX); disk2_info->timeout = 1; } } @@ -582,7 +582,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) break; default: - sim_printf("DISK2: " ADDRESS_FORMAT " Unknown CMD=%d" NLP, PCX, disk2_info->ctl_op); + sim_printf("DISK2: " ADDRESS_FORMAT " Unknown CMD=%d\n", PCX, disk2_info->ctl_op); break; } @@ -609,7 +609,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData) break; default: sim_printf("DISK2: " ADDRESS_FORMAT - " Error, invalid drive select=0x%x" NLP, PCX, cData >> 4); + " Error, invalid drive select=0x%x\n", PCX, cData >> 4); break; } diff --git a/AltairZ80/s100_fif.c b/AltairZ80/s100_fif.c index 81a67c44..8578889f 100644 --- a/AltairZ80/s100_fif.c +++ b/AltairZ80/s100_fif.c @@ -221,7 +221,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val) if (current_disk >= NUM_OF_DSK) { if (hasVerbose() && (warnDSK11 < warnLevelDSK)) { warnDSK11++; -/*03*/ sim_printf("FIF%i: " ADDRESS_FORMAT " Attempt disk io on illegal disk %d - ignored." NLP, current_disk, PCX, current_disk); +/*03*/ sim_printf("FIF%i: " ADDRESS_FORMAT " Attempt disk io on illegal disk %d - ignored.\n", current_disk, PCX, current_disk); } return 0; /* no drive selected - can do nothing */ } @@ -229,7 +229,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val) if ((current_disk_flags & UNIT_ATT) == 0) { /* nothing attached? */ if ((current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK)) { warnAttached[current_disk]++; -/*02*/sim_printf("FIF%i: " ADDRESS_FORMAT " Attempt to select unattached FIF%d - ignored." NLP, current_disk, PCX, current_disk); +/*02*/sim_printf("FIF%i: " ADDRESS_FORMAT " Attempt to select unattached FIF%d - ignored.\n", current_disk, PCX, current_disk); } current_disk = NUM_OF_DSK; return 2; @@ -254,7 +254,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val) if ((current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK)) { warnAttached[current_disk]++; - sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fseek error." NLP, current_disk, PCX); + sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fseek error.\n", current_disk, PCX); } } break; @@ -266,7 +266,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val) if ((rtn != SEC_SZ) && (current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK)) { warnAttached[current_disk]++; - sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fread error." NLP, current_disk, PCX); + sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fread error.\n", current_disk, PCX); } addr = dsc->addr_l + (dsc->addr_h << 8); /* no assumption on endianness */ for (kt = 0; kt < SEC_SZ; kt++) { @@ -276,7 +276,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val) if ((current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK)) { warnAttached[current_disk]++; - sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fseek error." NLP, current_disk, PCX); + sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fseek error.\n", current_disk, PCX); } } break; @@ -293,7 +293,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val) if ((current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK)) { warnAttached[current_disk]++; - sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fseek error." NLP, current_disk, PCX); + sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fseek error.\n", current_disk, PCX); } } break; diff --git a/AltairZ80/s100_jadedd.c b/AltairZ80/s100_jadedd.c index 6aafb0b6..1d203524 100644 --- a/AltairZ80/s100_jadedd.c +++ b/AltairZ80/s100_jadedd.c @@ -540,17 +540,17 @@ t_stat jade_reset(DEVICE *dptr) } else { if(pInfo->pe) { if(sim_map_resource(pInfo->prom_base, pInfo->prom_size, RESOURCE_TYPE_MEMORY, &jadeprom, "jadeprom", FALSE) != 0) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": Error mapping MEM resource at 0x%04x" NLP, pInfo->prom_base); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": Error mapping MEM resource at 0x%04x\n", pInfo->prom_base); return SCPE_ARG; } } if(sim_map_resource(pInfo->mem_base, pInfo->mem_size, RESOURCE_TYPE_MEMORY, &jademem, "jademem", FALSE) != 0) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": Error mapping MEM resource at 0x%04x" NLP, pInfo->mem_base); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": Error mapping MEM resource at 0x%04x\n", pInfo->mem_base); return SCPE_ARG; } /* Connect I/O Ports at base address */ if(sim_map_resource(pInfo->io_base, pInfo->io_size, RESOURCE_TYPE_IO, &jadedev, "jadedev", FALSE) != 0) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": Error mapping I/O resource at 0x%02x" NLP, pInfo->io_base); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": Error mapping I/O resource at 0x%02x\n", pInfo->io_base); return SCPE_ARG; } } @@ -564,7 +564,7 @@ t_stat jade_reset(DEVICE *dptr) } } - sim_debug(STATUS_MSG, &jade_dev, JADE_SNAME ": reset controller." NLP); + sim_debug(STATUS_MSG, &jade_dev, JADE_SNAME ": reset controller.\n"); return SCPE_OK; } @@ -579,7 +579,7 @@ t_stat jade_attach(UNIT *uptr, CONST char *cptr) r = attach_unit(uptr, cptr); /* attach unit */ if(r != SCPE_OK) { /* error? */ - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": ATTACH error=%d" NLP, r); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME ": ATTACH error=%d\n", r); return r; } @@ -590,7 +590,7 @@ t_stat jade_attach(UNIT *uptr, CONST char *cptr) uptr->capac = JADE_CAPACITY; } - DBG_PRINT(("JADE: ATTACH uptr->capac=%d" NLP, uptr->capac)); + DBG_PRINT(("JADE: ATTACH uptr->capac=%d\n", uptr->capac)); for (i = 0; i < JADE_MAX_DRIVES; i++) { if(jade_dev.units[i].fileref == uptr->fileref) { @@ -608,7 +608,7 @@ t_stat jade_attach(UNIT *uptr, CONST char *cptr) if(uptr->capac > 0) { char *rtn = fgets(header, 4, uptr->fileref); if((rtn != NULL) && (strncmp(header, "CPT", 3) == 0)) { - sim_printf(JADE_SNAME ": CPT images not yet supported" NLP); + sim_printf(JADE_SNAME ": CPT images not yet supported\n"); uptr->u3 = IMAGE_TYPE_CPT; jade_detach(uptr); return SCPE_OPENERR; @@ -618,7 +618,7 @@ t_stat jade_attach(UNIT *uptr, CONST char *cptr) } if (uptr->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME "%d: attached to '%s', type=%s, len=%d" NLP, i, cptr, + sim_printf(JADE_SNAME "%d: attached to '%s', type=%s, len=%d\n", i, cptr, uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->capac); } @@ -643,7 +643,7 @@ t_stat jade_detach(UNIT *uptr) return SCPE_ARG; } - DBG_PRINT(("Detach JADE%d" NLP, i)); + DBG_PRINT(("Detach JADE%d\n", i)); r = detach_unit(uptr); /* detach unit */ @@ -654,7 +654,7 @@ t_stat jade_detach(UNIT *uptr) jade_dev.units[i].fileref = NULL; if (uptr->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME "%d: detached." NLP, i); + sim_printf(JADE_SNAME "%d: detached.\n", i); } return SCPE_OK; @@ -677,7 +677,7 @@ static t_stat jade_set_iobase(UNIT *uptr, int32 val, CONST char *cptr, void *des return r; if ((newba > 0x43) || (newba < 0x40)) { - sim_printf(JADE_SNAME ": Valid options are 40,41,42,43" NLP); + sim_printf(JADE_SNAME ": Valid options are 40,41,42,43\n"); return SCPE_ARG; } @@ -701,7 +701,7 @@ static t_stat jade_set_membase(UNIT *uptr, int32 val, CONST char *cptr, void *de return r; if ((newba > 0xFC00) || (newba < 0xE000) || (newba % jade_info->mem_size)) { - sim_printf(JADE_SNAME ": Valid options are E000,E400,E800,EC00,F000,F400,F800,FC00" NLP); + sim_printf(JADE_SNAME ": Valid options are E000,E400,E800,EC00,F000,F400,F800,FC00\n"); return SCPE_ARG; } @@ -742,7 +742,7 @@ static t_stat jade_set_prom(UNIT *uptr, int32 value, CONST char *cptr, void *des sim_map_resource(pInfo->prom_base, pInfo->prom_size, RESOURCE_TYPE_MEMORY, &jadeprom, "jadeprom", !value); if (uptr->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME ": PROM %s" NLP, (value) ? "enabled" : "disabled"); + sim_printf(JADE_SNAME ": PROM %s\n", (value) ? "enabled" : "disabled"); } return SCPE_OK; @@ -754,7 +754,7 @@ static t_stat jade_boot(int32 unitno, DEVICE *dptr) JADE_INFO *pInfo = (JADE_INFO *)dptr->ctxt; if (pInfo->uptr[0]->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME ": Booting Controller at 0x%04x" NLP, pInfo->prom_base); + sim_printf(JADE_SNAME ": Booting Controller at 0x%04x\n", pInfo->prom_base); } *((int32 *) sim_PC->loc) = pInfo->prom_base; @@ -770,20 +770,20 @@ static t_stat jade_svc(UNIT *uptr) static void showsector(uint8 drive, uint8 isRead, uint8 *buf) { int32 i; - sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, JADE_SNAME "%d: %s sector:" NLP "\t", drive, (isRead) ? "Read" : "Write"); + sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, JADE_SNAME "%d: %s sector:\n\t", drive, (isRead) ? "Read" : "Write"); for (i=0; i < JADE_SECTOR_SIZE; i++) { sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, "%02X ", *(buf+i)); if (((i+1) & 0xf) == 0) { - sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, NLP "\t"); + sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, "\n\t"); } } - sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, NLP); + sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &jade_dev, "\n"); } static void showcb() { DBG_PRINT((JADE_SNAME - " cmd=0x%02X drv=%d trk=%02d sec=%02d mod=0x%02X sts=0x%02X lad=%04X lng=%04X" NLP, + " cmd=0x%02X drv=%d trk=%02d sec=%02d mod=0x%02X sts=0x%02X lad=%04X lng=%04X\n", cb[CB_CMD], cb[CB_DRV], cb[CB_TRK], cb[CB_SEC], cb[CB_MOD], cb[CB_STS], cb[CB_LAD] + (cb[CB_LAD+1] << 8), cb[CB_LNG] + (cb[CB_LNG+1] << 8))); } @@ -867,35 +867,35 @@ static uint8 JADE_In(uint32 Addr) cData = JADE_STAT_HALT; /* Assume processor is in HALT* state */ cData |= (jade_info->mem_base >> 9) & JADE_STAT_MEM_MSK; - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": IN %02x Data %02x" NLP, Addr & 0xFF, cData & 0xFF); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": IN %02x Data %02x\n", Addr & 0xFF, cData & 0xFF); return (cData); } static uint8 JADE_Out(uint32 Addr, int32 Data) { - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": OUT %02x Data %02x" NLP, Addr & 0xFF, Data & 0xFF); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": OUT %02x Data %02x\n", Addr & 0xFF, Data & 0xFF); switch (Data) { case CMD_SOT: /* Bank 0 out of system */ - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": Z80 system memory out" NLP); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": Z80 system memory out\n"); jade_info->mem_sys = FALSE; break; case CMD_SIN|CMD_MD0: /* Request memory bank 0 */ - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": Z80 system memory in" NLP); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": Z80 system memory in\n"); jade_info->mem_sys = TRUE; - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": selected memory bank 0" NLP); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": selected memory bank 0\n"); jade_info->mem_bank = 0; break; case CMD_MD1: /* Select memory bank 1 */ - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": selected memory bank 1" NLP); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": selected memory bank 1\n"); jade_info->mem_bank = 1; break; case CMD_INT: /* Interrupt Z80 */ - sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": Z80 interrupt" NLP); + sim_debug(CMD_MSG, &jade_dev, JADE_SNAME ": Z80 interrupt\n"); cb[CB_STS] = DCM_Execute(); /* Save status in command block */ break; @@ -1080,14 +1080,14 @@ static uint8 DCM_Logon(uint8 drive) jade_info->dt[drive].spt = sbuf[ID_SPT]; jade_info->dt[drive].flg = sbuf[ID_FLG]; if (jade_info->uptr[drive]->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME "%d: JADE ID Found: '%.32s' SPT=%0d FLG=0x%02X" NLP, drive, sbuf, jade_info->dt[drive].spt, jade_info->dt[drive].flg); + sim_printf(JADE_SNAME "%d: JADE ID Found: '%.32s' SPT=%0d FLG=0x%02X\n", drive, sbuf, jade_info->dt[drive].spt, jade_info->dt[drive].flg); } } else { jade_info->dt[drive].spt = JADE_SPT_SD; jade_info->dt[drive].flg = ID_FLD; if (jade_info->uptr[drive]->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME "%d: JADE ID Not Found: SPT=%0d FLG=0x%02X" NLP, drive, jade_info->dt[drive].spt, jade_info->dt[drive].flg); + sim_printf(JADE_SNAME "%d: JADE ID Not Found: SPT=%0d FLG=0x%02X\n", drive, jade_info->dt[drive].spt, jade_info->dt[drive].flg); } } @@ -1116,7 +1116,7 @@ static uint8 DCM_ReadSector(uint8 drive, uint8 track, uint8 sector, uint8 *buffe */ if (jade_info->uptr[drive]->fileref == NULL) { if (jade_info->uptr[drive]->flags & UNIT_JADE_VERBOSE) { - sim_printf(JADE_SNAME "%d: Drive Not Ready" NLP, drive); + sim_printf(JADE_SNAME "%d: Drive Not Ready\n", drive); } return CS_DNR; } @@ -1124,12 +1124,12 @@ static uint8 DCM_ReadSector(uint8 drive, uint8 track, uint8 sector, uint8 *buffe offset = calculate_jade_sec_offset(track, sector, jade_info->dt[drive].flg); if (sim_fseek(jade_info->uptr[drive]->fileref, offset, SEEK_SET) != 0) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: RDSEC sim_fseek error." NLP, drive); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: RDSEC sim_fseek error.\n", drive); return CS_RNF; } if (sim_fread(buffer, 1, JADE_SECTOR_SIZE, jade_info->uptr[drive]->fileref) != JADE_SECTOR_SIZE) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: RDSEC sim_fread error." NLP, drive); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: RDSEC sim_fread error.\n", drive); return CS_CRC; } @@ -1171,12 +1171,12 @@ static uint8 DCM_WriteSector(uint8 drive, uint8 track, uint8 sector, uint8 *buff offset = calculate_jade_sec_offset(track, sector, jade_info->dt[drive].flg); if (sim_fseek(jade_info->uptr[drive]->fileref, offset, SEEK_SET) != 0) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: WRSEC sim_fseek error." NLP, drive); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: WRSEC sim_fseek error.\n", drive); return CS_RNF; } if (sim_fwrite(buffer, 1, JADE_SECTOR_SIZE, jade_info->uptr[drive]->fileref) != JADE_SECTOR_SIZE) { - sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: WRSEC sim_fwrite error." NLP, drive); + sim_debug(ERROR_MSG, &jade_dev, JADE_SNAME "%d: WRSEC sim_fwrite error.\n", drive); return CS_CRC; } diff --git a/AltairZ80/s100_mdriveh.c b/AltairZ80/s100_mdriveh.c index fc60308b..1edb4705 100644 --- a/AltairZ80/s100_mdriveh.c +++ b/AltairZ80/s100_mdriveh.c @@ -187,7 +187,7 @@ static t_stat mdriveh_reset(DEVICE *dptr) static int32 mdrivehdev(const int32 port, const int32 io, const int32 data) { - DBG_PRINT(("MDRIVEH: " ADDRESS_FORMAT " IO %s, Port %02x" NLP, PCX, io ? "WR" : "RD", port)); + DBG_PRINT(("MDRIVEH: " ADDRESS_FORMAT " IO %s, Port %02x\n", PCX, io ? "WR" : "RD", port)); if(io) { MDRIVEH_Write(port, data); return 0; diff --git a/AltairZ80/s100_mdsa.c b/AltairZ80/s100_mdsa.c index dddf7a64..036b439e 100644 --- a/AltairZ80/s100_mdsa.c +++ b/AltairZ80/s100_mdsa.c @@ -17,7 +17,7 @@ #include "sim_imd.h" #ifdef DBG_MSG -#define DBG_PRINT(args) printf args +#define DBG_PRINT(args) sim_printf args #else #define DBG_PRINT(args) #endif @@ -306,7 +306,7 @@ static t_stat mdsa_boot(int32 unitno, DEVICE *dptr) PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt; - DBG_PRINT(("Booting MDSA Controller at 0x%04x" NLP, pnp->mem_base)); + DBG_PRINT(("Booting MDSA Controller at 0x%04x\n", pnp->mem_base)); *((int32 *) sim_PC->loc) = pnp->mem_base; return SCPE_OK; @@ -317,7 +317,7 @@ static int32 mdsadev(const int32 Addr, const int32 rw, const int32 data) if(rw == 0) { /* Read */ return(MDSA_Read(Addr)); } else { /* Write */ - DBG_PRINT(("MDSA: write attempt at 0x%04x ignored." NLP, Addr)); + DBG_PRINT(("MDSA: write attempt at 0x%04x ignored.\n", Addr)); return (-1); } } @@ -345,13 +345,13 @@ static uint8 mdsa_rom[] = { static void showdata(int32 isRead) { int32 i; - printf("MDSA: " ADDRESS_FORMAT " %s Sector =" NLP "\t", PCX, isRead ? "Read" : "Write"); + sim_printf("MDSA: " ADDRESS_FORMAT " %s Sector =\n\t", PCX, isRead ? "Read" : "Write"); for(i=0; i < MDSA_SECTOR_LEN; i++) { - printf("%02X ", sdata.u.data[i]); + sim_printf("%02X ", sdata.u.data[i]); if(((i+1) & 0xf) == 0) - printf(NLP "\t"); + sim_printf("\n\t"); } - printf(NLP); + sim_printf("\n"); } static int checksum; @@ -385,7 +385,7 @@ static uint8 MDSA_Read(const uint32 Addr) sec_offset = calculate_mdsa_sec_offset(pDrive->track, pDrive->sector); } - DBG_PRINT(("MDSA: " ADDRESS_FORMAT " WRITE-DATA[offset:%06x+%03x]=%02x" NLP, + DBG_PRINT(("MDSA: " ADDRESS_FORMAT " WRITE-DATA[offset:%06x+%03x]=%02x\n", PCX, sec_offset, mdsa_info->datacount, Addr & 0xFF)); mdsa_info->datacount++; if(mdsa_info->datacount < MDSA_RAW_LEN) @@ -405,20 +405,20 @@ static uint8 MDSA_Read(const uint32 Addr) { case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else { if (sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { sim_fwrite(sdata.u.data, 1, MDSA_SECTOR_LEN, (pDrive->uptr)->fileref); } else { - printf("%s: sim_fseek error" NLP, __FUNCTION__); + sim_printf("%s: sim_fseek error\n", __FUNCTION__); } } break; case IMAGE_TYPE_CPT: - printf("%s: CPT Format not supported" NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - printf("%s: Unknown image Format" NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } } @@ -451,7 +451,7 @@ static uint8 MDSA_Read(const uint32 Addr) switch((pDrive->uptr)->u3) { case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else { if (sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { @@ -469,13 +469,11 @@ static uint8 MDSA_Read(const uint32 Addr) break; case IMAGE_TYPE_CPT: - printf("%s: CPT Format not supported" - NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - printf("%s: Unknown image Format" - NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } if(mdsa_dev.dctrl & RD_DATA_DETAIL_MSG) @@ -491,7 +489,7 @@ static uint8 MDSA_Read(const uint32 Addr) checksum = ((checksum << 1) | ((checksum & 0x80) != 0)) & 0xff; DBG_PRINT(("MDSA: " ADDRESS_FORMAT - " READ-DATA[offset:%06x+%03x]=%02x" NLP, + " READ-DATA[offset:%06x+%03x]=%02x\n", PCX, sec_offset, mdsa_info->datacount, cData)); } else { /* checksum */ diff --git a/AltairZ80/s100_mdsad.c b/AltairZ80/s100_mdsad.c index cb9b111d..263c125f 100644 --- a/AltairZ80/s100_mdsad.c +++ b/AltairZ80/s100_mdsad.c @@ -372,7 +372,7 @@ static t_stat mdsad_boot(int32 unitno, DEVICE *dptr) PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt; - DBG_PRINT(("Booting MDSAD Controller at 0x%04x, unit %d" NLP, + DBG_PRINT(("Booting MDSAD Controller at 0x%04x, unit %d\n", pnp->mem_base+1+(unitno&3), unitno & 3)); /* Unit 3 can't be booted yet. This involves modifying the A register. */ @@ -385,7 +385,7 @@ static int32 mdsaddev(const int32 Addr, const int32 rw, const int32 data) if(rw == 0) { /* Read */ return(MDSAD_Read(Addr)); } else { /* Write */ - DBG_PRINT(("MDSAD: write attempt at 0x%04x ignored." NLP, Addr)); + DBG_PRINT(("MDSAD: write attempt at 0x%04x ignored.\n", Addr)); return (-1); } } @@ -419,13 +419,13 @@ static uint8 mdsad_rom[] = { static void showdata(int32 isRead) { int32 i; - sim_printf("MDSAD: " ADDRESS_FORMAT " %s Sector =" NLP "\t", PCX, isRead ? "Read" : "Write"); + sim_printf("MDSAD: " ADDRESS_FORMAT " %s Sector =\n\t", PCX, isRead ? "Read" : "Write"); for(i=0; i < MDSAD_SECTOR_LEN; i++) { sim_printf("%02X ", sdata.u.data[i]); if(((i+1) & 0xf) == 0) - sim_printf(NLP "\t"); + sim_printf("\n\t"); } - sim_printf(NLP); + sim_printf("\n"); } static int checksum; @@ -472,7 +472,7 @@ static uint8 MDSAD_Read(const uint32 Addr) } DBG_PRINT(("MDSAD: " ADDRESS_FORMAT - " WRITE-DATA[offset:%06x+%03x]=%02x" NLP, + " WRITE-DATA[offset:%06x+%03x]=%02x\n", PCX, sec_offset, mdsad_info->datacount, Addr & 0xFF)); mdsad_info->datacount++; if(mdsad_info->datacount < MDSAD_RAW_LEN) @@ -493,21 +493,21 @@ static uint8 MDSAD_Read(const uint32 Addr) { case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - sim_printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else { if (sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { sim_fwrite(sdata.u.data, 1, MDSAD_SECTOR_LEN, (pDrive->uptr)->fileref); } else { - sim_printf("%s: sim_fseek error" NLP, __FUNCTION__); + sim_printf("%s: sim_fseek error\n", __FUNCTION__); } } break; case IMAGE_TYPE_CPT: - sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - sim_printf("%s: Unknown image Format" NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } } @@ -730,7 +730,7 @@ static uint8 MDSAD_Read(const uint32 Addr) { case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - sim_printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else { if (sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { @@ -747,12 +747,10 @@ static uint8 MDSAD_Read(const uint32 Addr) } break; case IMAGE_TYPE_CPT: - sim_printf("%s: CPT Format not supported" - NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - sim_printf("%s: Unknown image Format" - NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } if(mdsad_dev.dctrl & RD_DATA_DETAIL_MSG) @@ -768,7 +766,7 @@ static uint8 MDSAD_Read(const uint32 Addr) checksum = ((checksum << 1) | ((checksum & 0x80) != 0)) & 0xff; DBG_PRINT(("MDSAD: " ADDRESS_FORMAT - " READ-DATA[offset:%06x+%03x]=%02x" NLP, + " READ-DATA[offset:%06x+%03x]=%02x\n", PCX, sec_offset, mdsad_info->datacount, cData)); } else { /* checksum */ cData = checksum; @@ -782,7 +780,7 @@ static uint8 MDSAD_Read(const uint32 Addr) } default: DBG_PRINT(("MDSAD: " ADDRESS_FORMAT - " Invalid DM=%x" NLP, PCX, Addr & 0xF)); + " Invalid DM=%x\n", PCX, Addr & 0xF)); break; } diff --git a/AltairZ80/s100_scp300f.c b/AltairZ80/s100_scp300f.c index bb21af24..3c4ff316 100644 --- a/AltairZ80/s100_scp300f.c +++ b/AltairZ80/s100_scp300f.c @@ -301,7 +301,7 @@ static uint8 scp300f_rom[SCP300F_ROM_SIZE] = { static int32 scp300f_mem(const int32 Addr, const int32 write, const int32 data) { -/* DBG_PRINT(("SCP300F: ROM %s, Addr %04x" NLP, write ? "WR" : "RD", Addr)); */ +/* DBG_PRINT(("SCP300F: ROM %s, Addr %04x\n", write ? "WR" : "RD", Addr)); */ if(write) { if(scp300f_info->rom_enabled) { diff --git a/AltairZ80/s100_selchan.c b/AltairZ80/s100_selchan.c index 26b6f3f7..c81b0eec 100644 --- a/AltairZ80/s100_selchan.c +++ b/AltairZ80/s100_selchan.c @@ -144,7 +144,7 @@ static t_stat selchan_reset(DEVICE *dptr) static int32 selchandev(const int32 port, const int32 io, const int32 data) { - DBG_PRINT(("SELCHAN: IO %s, Port %02x" NLP, io ? "WR" : "RD", port)); + DBG_PRINT(("SELCHAN: IO %s, Port %02x\n", io ? "WR" : "RD", port)); if(io) { selchan_info->selchan <<= 8; selchan_info->selchan &= 0xFFFFFF00; @@ -172,14 +172,14 @@ int32 selchan_dma(uint8 *buf, uint32 len) uint32 i; if(selchan_info->reg_cnt != 4) { - sim_printf("SELCHAN: " ADDRESS_FORMAT " Programming error: selector channel disabled." NLP, + sim_printf("SELCHAN: " ADDRESS_FORMAT " Programming error: selector channel disabled.\n", PCX); return (-1); } if(selchan_info->dma_mode & SELCHAN_MODE_IO) { - sim_printf("SELCHAN: " ADDRESS_FORMAT " I/O Not supported" NLP, PCX); + sim_printf("SELCHAN: " ADDRESS_FORMAT " I/O Not supported\n", PCX); return (-1); } else { sim_debug(DMA_MSG, &selchan_dev, "SELCHAN: " ADDRESS_FORMAT " DMA %s Transfer, len=%d\n", PCX, (selchan_info->dma_mode & SELCHAN_MODE_WRITE) ? "WR" : "RD", len); diff --git a/AltairZ80/s100_tarbell.c b/AltairZ80/s100_tarbell.c index e2dd0311..ded952b3 100644 --- a/AltairZ80/s100_tarbell.c +++ b/AltairZ80/s100_tarbell.c @@ -320,12 +320,12 @@ t_stat tarbell_reset(DEVICE *dptr) sim_map_resource(pInfo->pnp.io_base, pInfo->pnp.io_size, RESOURCE_TYPE_IO, &tarbelldev, "tarbelldev", TRUE); } else { if(sim_map_resource(pInfo->pnp.mem_base, pInfo->pnp.mem_size, RESOURCE_TYPE_MEMORY, &tarbellprom, "tarbellprom", FALSE) != 0) { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": Error mapping MEM resource at 0x%04x" NLP, pInfo->pnp.mem_base); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": Error mapping MEM resource at 0x%04x\n", pInfo->pnp.mem_base); return SCPE_ARG; } /* Connect I/O Ports at base address */ if(sim_map_resource(pInfo->pnp.io_base, pInfo->pnp.io_size, RESOURCE_TYPE_IO, &tarbelldev, "tarbelldev", FALSE) != 0) { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": Error mapping I/O resource at 0x%02x" NLP, pInfo->pnp.io_base); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": Error mapping I/O resource at 0x%02x\n", pInfo->pnp.io_base); return SCPE_ARG; } } @@ -371,7 +371,7 @@ t_stat tarbell_reset(DEVICE *dptr) pInfo->headTimeout = TARBELL_ROTATION_MS * 2 * 3; /* compensate for 1ms SIO sleep */ } - sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": reset controller." NLP); + sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": reset controller.\n"); return SCPE_OK; } @@ -398,7 +398,7 @@ t_stat tarbell_attach(UNIT *uptr, CONST char *cptr) r = attach_unit(uptr, cptr); /* attach unit */ if(r != SCPE_OK) { /* error? */ - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": ATTACH error=%d" NLP, r); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": ATTACH error=%d\n", r); return r; } @@ -409,7 +409,7 @@ t_stat tarbell_attach(UNIT *uptr, CONST char *cptr) uptr->capac = TARBELL_CAPACITY; } - DBG_PRINT(("TARBELL: ATTACH uptr->capac=%d" NLP, uptr->capac)); + DBG_PRINT(("TARBELL: ATTACH uptr->capac=%d\n", uptr->capac)); for (i = 0; i < TARBELL_MAX_DRIVES; i++) { if(tarbell_dev.units[i].fileref == uptr->fileref) { @@ -427,7 +427,7 @@ t_stat tarbell_attach(UNIT *uptr, CONST char *cptr) if(uptr->capac > 0) { char *rtn = fgets(header, 4, uptr->fileref); if((rtn != NULL) && (strncmp(header, "CPT", 3) == 0)) { - sim_printf("CPT images not yet supported" NLP); + sim_printf("CPT images not yet supported\n"); uptr->u3 = IMAGE_TYPE_CPT; tarbell_detach(uptr); return SCPE_OPENERR; @@ -437,7 +437,7 @@ t_stat tarbell_attach(UNIT *uptr, CONST char *cptr) } if (uptr->flags & UNIT_TARBELL_VERBOSE) { - sim_printf(TARBELL_SNAME "%d, attached to '%s', type=%s, len=%d" NLP, i, cptr, + sim_printf(TARBELL_SNAME "%d, attached to '%s', type=%s, len=%d\n", i, cptr, uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->capac); } @@ -478,7 +478,7 @@ t_stat tarbell_detach(UNIT *uptr) tarbell_dev.units[i].fileref = NULL; if (uptr->flags & UNIT_TARBELL_VERBOSE) { - sim_printf(TARBELL_SNAME "%d detached." NLP, i); + sim_printf(TARBELL_SNAME "%d detached.\n", i); } /* @@ -501,7 +501,7 @@ static t_stat tarbell_boot(int32 unitno, DEVICE *dptr) PNP_INFO *pnp = (PNP_INFO *)dptr->ctxt; - sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Booting Controller at 0x%04x" NLP, pnp->mem_base); + sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Booting Controller at 0x%04x\n", pnp->mem_base); *((int32 *) sim_PC->loc) = pnp->mem_base; @@ -519,19 +519,19 @@ static int32 tarbelldev(int32 Addr, int32 rw, int32 data) static void showdata(int32 isRead) { int32 i; - sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, TARBELL_SNAME ": %s sector:" NLP "\t", isRead ? "Read" : "Write"); + sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, TARBELL_SNAME ": %s sector:\n\t", isRead ? "Read" : "Write"); for (i=0; i < TARBELL_SECTOR_LEN; i++) { sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, "%02X ", sdata[i]); if (((i+1) & 0xf) == 0) { - sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, NLP "\t"); + sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, "\n\t"); } } - sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, NLP); + sim_debug(RD_DATA_DETAIL_MSG|WR_DATA_DETAIL_MSG, &tarbell_dev, "\n"); } static void showregs(FD1771_REG *pFD1771) { - DBG_PRINT(("TARBELL: DRV=%d PE=%d AA=%d RA=%d WA=%d DC=%03d CMD=%02Xh DATA=%02Xh TRK=%03d SEC=%03d STAT=%02X" NLP, + DBG_PRINT(("TARBELL: DRV=%d PE=%d AA=%d RA=%d WA=%d DC=%03d CMD=%02Xh DATA=%02Xh TRK=%03d SEC=%03d STAT=%02X\n", tarbell_info->currentDrive, tarbell_info->promEnabled, pFD1771->addrActive, pFD1771->readActive, pFD1771->writeActive, pFD1771->dataCount, pFD1771->command, pFD1771->data, pFD1771->track, pFD1771->sector, pFD1771->status)); } @@ -543,7 +543,7 @@ static uint32 calculate_tarbell_sec_offset(uint8 track, uint8 sector) offset = ((track * (TARBELL_SECTOR_LEN * TARBELL_SECTORS_PER_TRACK)) + ((sector-1) * TARBELL_SECTOR_LEN)); - DBG_PRINT(("TARBELL: CALC track=%d sector=%d offset=%04X" NLP, track, sector, offset)); + DBG_PRINT(("TARBELL: CALC track=%d sector=%d offset=%04X\n", track, sector, offset)); return (offset); } @@ -561,13 +561,13 @@ static void TARBELL_HeadLoad(UNIT *uptr, FD1771_REG *pFD1771, uint8 load) sim_activate_after_abs(uptr, tarbell_info->headTimeout); /* activate timer */ if (pFD1771->headLoaded == FALSE) { - sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Drive %d head Loaded." NLP, tarbell_info->currentDrive); + sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Drive %d head Loaded.\n", tarbell_info->currentDrive); } } if (load == FALSE && pFD1771->headLoaded == TRUE) { sim_cancel(uptr); /* cancel timer */ - sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Drive %d head Unloaded." NLP, tarbell_info->currentDrive); + sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Drive %d head Unloaded.\n", tarbell_info->currentDrive); } pFD1771->headLoaded = load; @@ -638,7 +638,7 @@ static uint8 TARBELL_Read(uint32 Addr) /* Store byte in DATA register */ pFD1771->data = sdata[pFD1771->dataCount++]; - DBG_PRINT(("TARBELL: READ ADDR data=%03d" NLP, pFD1771->data)); + DBG_PRINT(("TARBELL: READ ADDR data=%03d\n", pFD1771->data)); /* If we reached the end of the address data, terminate command and set INTRQ */ if (pFD1771->dataCount > TARBELL_ADDR_CRC2) { @@ -667,7 +667,7 @@ static uint8 TARBELL_Read(uint32 Addr) break; default: - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READ Invalid I/O Address %02x (%02x)" NLP, Addr & 0xFF, Addr & 0x07); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READ Invalid I/O Address %02x (%02x)\n", Addr & 0xFF, Addr & 0x07); cData = 0xff; break; } @@ -683,7 +683,7 @@ static uint8 TARBELL_Write(uint32 Addr, int32 Data) UNIT *uptr; FD1771_REG *pFD1771; - sim_debug(CMD_MSG, &tarbell_dev, TARBELL_SNAME ": OUT %02x Data %02x" NLP, Addr & 0xFF, Data & 0xFF); + sim_debug(CMD_MSG, &tarbell_dev, TARBELL_SNAME ": OUT %02x Data %02x\n", Addr & 0xFF, Data & 0xFF); cData = 0; driveNum = tarbell_info->currentDrive; @@ -744,7 +744,7 @@ static uint8 TARBELL_Write(uint32 Addr, int32 Data) if (rtn != TARBELL_SECTOR_LEN) { pFD1771->status |= FD1771_STAT_WRITEFAULT; - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": WRITE ERROR could not write track %03d sector %03d" NLP, pFD1771->track, pFD1771->sector); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": WRITE ERROR could not write track %03d sector %03d\n", pFD1771->track, pFD1771->sector); } if(pFD1771->sector < TARBELL_SECTORS_PER_TRACK) { @@ -753,7 +753,7 @@ static uint8 TARBELL_Write(uint32 Addr, int32 Data) pFD1771->dataCount = 0; pFD1771->status &= ~FD1771_STAT_BUSY; /* Clear BUSY Bit */ - DBG_PRINT(("TARBELL: WRITE TRACK track=%03d sector=%03d trkcount=%d datacount=%d data=%02X status=%02X" NLP, pFD1771->track, pFD1771->sector, pFD1771->trkCount, pFD1771->dataCount, pFD1771->data, pFD1771->status)); + DBG_PRINT(("TARBELL: WRITE TRACK track=%03d sector=%03d trkcount=%d datacount=%d data=%02X status=%02X\n", pFD1771->track, pFD1771->sector, pFD1771->trkCount, pFD1771->dataCount, pFD1771->data, pFD1771->status)); showregs(pFD1771); } @@ -765,18 +765,18 @@ static uint8 TARBELL_Write(uint32 Addr, int32 Data) else { pFD1771->status = 0x00; /* Clear Status Bits */ pFD1771->intrq = TRUE; /* Simulate reaching index hole */ - sim_debug(WR_DATA_MSG, &tarbell_dev, TARBELL_SNAME ": WRITE TRACK COMPLETE track=%03d sector=%03d trkcount=%d datacount=%d data=%02X status=%02X" NLP, pFD1771->track, pFD1771->sector, pFD1771->trkCount, pFD1771->dataCount, pFD1771->data, pFD1771->status); + sim_debug(WR_DATA_MSG, &tarbell_dev, TARBELL_SNAME ": WRITE TRACK COMPLETE track=%03d sector=%03d trkcount=%d datacount=%d data=%02X status=%02X\n", pFD1771->track, pFD1771->sector, pFD1771->trkCount, pFD1771->dataCount, pFD1771->data, pFD1771->status); } TARBELL_HeadLoad(uptr, pFD1771, TRUE); } - DBG_PRINT(("TARBELL: WRITE DATA REG %02X" NLP, Data)); + DBG_PRINT(("TARBELL: WRITE DATA REG %02X\n", Data)); break; case TARBELL_REG_TRACK: pFD1771->track = Data; - DBG_PRINT(("TARBELL: TRACK REG=%d" NLP, pFD1771->track)); + DBG_PRINT(("TARBELL: TRACK REG=%d\n", pFD1771->track)); break; case TARBELL_REG_SECTOR: @@ -786,7 +786,7 @@ static uint8 TARBELL_Write(uint32 Addr, int32 Data) pFD1771->sector = Data; - DBG_PRINT(("TARBELL: SECTOR REG=%d" NLP, pFD1771->sector)); + DBG_PRINT(("TARBELL: SECTOR REG=%d\n", pFD1771->sector)); break; @@ -794,20 +794,20 @@ static uint8 TARBELL_Write(uint32 Addr, int32 Data) cData = ~(Data >> 4) & 0x03; if (cData < TARBELL_MAX_DRIVES) { tarbell_info->currentDrive = cData; - sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Current drive now %d" NLP, tarbell_info->currentDrive); + sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Current drive now %d\n", tarbell_info->currentDrive); } else { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": Invalid Drive Number drive=%02x (%02x)" NLP, Data, cData); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": Invalid Drive Number drive=%02x (%02x)\n", Data, cData); } break; default: - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": WRITE Invalid I/O Address %02x (%02x)" NLP, Addr & 0xFF, Addr & 0x07); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": WRITE Invalid I/O Address %02x (%02x)\n", Addr & 0xFF, Addr & 0x07); cData = 0xff; break; } - DBG_PRINT(("TARBELL: COMPLETE currentDrive=%d sector=%02x data=%02x" NLP, tarbell_info->currentDrive, pFD1771->sector, pFD1771->data)); + DBG_PRINT(("TARBELL: COMPLETE currentDrive=%d sector=%02x data=%02x\n", tarbell_info->currentDrive, pFD1771->sector, pFD1771->data)); return(cData); } @@ -818,16 +818,16 @@ static uint32 TARBELL_ReadSector(UNIT *uptr, uint8 track, uint8 sector, uint8 *b uint32 rtn = 0; if (uptr->fileref == NULL) { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC uptr.fileref is NULL!" NLP); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC uptr.fileref is NULL!\n"); return 0; } sec_offset = calculate_tarbell_sec_offset(track, sector); - sim_debug(RD_DATA_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC track %03d sector %03d at offset %04X" NLP, track, sector, sec_offset); + sim_debug(RD_DATA_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC track %03d sector %03d at offset %04X\n", track, sector, sec_offset); if (sim_fseek(uptr->fileref, sec_offset, SEEK_SET) != 0) { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC sim_fseek error." NLP); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC sim_fseek error.\n"); return 0; } @@ -843,16 +843,16 @@ static uint32 TARBELL_WriteSector(UNIT *uptr, uint8 track, uint8 sector, uint8 * uint32 rtn = 0; if (uptr->fileref == NULL) { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC uptr.fileref is NULL!" NLP); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": READSEC uptr.fileref is NULL!\n"); return 0; } sec_offset = calculate_tarbell_sec_offset(track, sector); - sim_debug(WR_DATA_MSG, &tarbell_dev, TARBELL_SNAME ": WRITESEC track %03d sector %03d at offset %04X" NLP, track, sector, sec_offset); + sim_debug(WR_DATA_MSG, &tarbell_dev, TARBELL_SNAME ": WRITESEC track %03d sector %03d at offset %04X\n", track, sector, sec_offset); if (sim_fseek(uptr->fileref, sec_offset, SEEK_SET) != 0) { - sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": WRITESEC sim_fseek error." NLP); + sim_debug(ERROR_MSG, &tarbell_dev, TARBELL_SNAME ": WRITESEC sim_fseek error.\n"); return 0; } @@ -905,7 +905,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) case TARBELL_CMD_RESTORE: pFD1771->track = 0; - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": RESTORE track=%03d" NLP, pFD1771->track); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": RESTORE track=%03d\n", pFD1771->track); TARBELL_HeadLoad(uptr, pFD1771, (Data & TARBELL_FLAG_H) ? TRUE : FALSE); @@ -918,7 +918,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) case TARBELL_CMD_SEEK: newTrack = pFD1771->data; - DBG_PRINT(("TARBELL: TRACK DATA=%d (SEEK)" NLP, newTrack)); + DBG_PRINT(("TARBELL: TRACK DATA=%d (SEEK)\n", newTrack)); pFD1771->status &= ~FD1771_STAT_SEEKERROR; @@ -927,11 +927,11 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) TARBELL_HeadLoad(uptr, pFD1771, (Data & TARBELL_FLAG_H) ? TRUE : FALSE); - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": SEEK track=%03d" NLP, pFD1771->track); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": SEEK track=%03d\n", pFD1771->track); } else { pFD1771->status |= FD1771_STAT_SEEKERROR; - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": SEEK ERR track=%03d" NLP, newTrack); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": SEEK ERR track=%03d\n", newTrack); } pFD1771->status &= ~FD1771_STAT_BUSY; @@ -949,11 +949,11 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) if (Data & TARBELL_FLAG_U) { pFD1771->track = newTrack; } - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEP track=%03d" NLP, pFD1771->track); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEP track=%03d\n", pFD1771->track); } else { pFD1771->status |= FD1771_STAT_SEEKERROR; - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEP ERR track=%03d" NLP, newTrack); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEP ERR track=%03d\n", newTrack); } TARBELL_HeadLoad(uptr, pFD1771, (Data & TARBELL_FLAG_H) ? TRUE : FALSE); @@ -974,11 +974,11 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) TARBELL_HeadLoad(uptr, pFD1771, (Data & TARBELL_FLAG_H) ? TRUE : FALSE); - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPIN track=%03d" NLP, pFD1771->track); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPIN track=%03d\n", pFD1771->track); } else { pFD1771->status |= FD1771_STAT_SEEKERROR; - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPIN ERR track=%03d" NLP, pFD1771->track+1); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPIN ERR track=%03d\n", pFD1771->track+1); } pFD1771->stepDir = 1; @@ -998,11 +998,11 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) TARBELL_HeadLoad(uptr, pFD1771, (Data & TARBELL_FLAG_H) ? TRUE : FALSE); - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPOUT track=%03d" NLP, pFD1771->track); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPOUT track=%03d\n", pFD1771->track); } else { pFD1771->status |= FD1771_STAT_SEEKERROR; - sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPOUT ERR track=%03d" NLP, pFD1771->track-1); + sim_debug(SEEK_MSG, &tarbell_dev, TARBELL_SNAME ": STEPOUT ERR track=%03d\n", pFD1771->track-1); } pFD1771->stepDir = -1; @@ -1015,7 +1015,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) if ((uptr == NULL) || (uptr->fileref == NULL)) { sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": " ADDRESS_FORMAT - " Drive: %d not attached - read ignored." NLP, + " Drive: %d not attached - read ignored.\n", PCX, tarbell_info->currentDrive); pFD1771->status &= ~FD1771_STAT_BUSY; @@ -1031,7 +1031,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) showdata(TRUE); } else { - DBG_PRINT(("TARBELL: " ADDRESS_FORMAT " READ: sim_fread error." NLP, PCX)); + DBG_PRINT(("TARBELL: " ADDRESS_FORMAT " READ: sim_fread error.\n", PCX)); pFD1771->status |= FD1771_STAT_NOTFOUND; pFD1771->intrq = TRUE; @@ -1045,14 +1045,14 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) */ if ((uptr == NULL) || (uptr->fileref == NULL)) { sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": " ADDRESS_FORMAT - " Drive: %d not attached - write ignored." NLP, + " Drive: %d not attached - write ignored.\n", PCX, tarbell_info->currentDrive); pFD1771->status &= ~FD1771_STAT_BUSY; } if ((uptr->flags & UNIT_TARBELL_WPROTECT) || tarbell_info->writeProtect) { - DBG_PRINT((TARBELL_SNAME ": Disk write protected. uptr->flags=%04x writeProtect=%04x" NLP, uptr->flags & UNIT_TARBELL_WPROTECT, tarbell_info->writeProtect)); + DBG_PRINT((TARBELL_SNAME ": Disk write protected. uptr->flags=%04x writeProtect=%04x\n", uptr->flags & UNIT_TARBELL_WPROTECT, tarbell_info->writeProtect)); pFD1771->intrq = TRUE; } else { @@ -1086,7 +1086,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) case TARBELL_CMD_WRITE_TRACK: if ((uptr->flags & UNIT_TARBELL_WPROTECT) || tarbell_info->writeProtect) { - DBG_PRINT((TARBELL_SNAME ": Disk write protected. uptr->flags=%04x writeProtect=%04x" NLP, uptr->flags & UNIT_TARBELL_WPROTECT, tarbell_info->writeProtect)); + DBG_PRINT((TARBELL_SNAME ": Disk write protected. uptr->flags=%04x writeProtect=%04x\n", uptr->flags & UNIT_TARBELL_WPROTECT, tarbell_info->writeProtect)); pFD1771->intrq = TRUE; } else { @@ -1117,7 +1117,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) default: cData=0xFF; - sim_debug(ERROR_MSG, &tarbell_dev, "TARBELL: UNRECOGNIZED CMD %02X" NLP, pFD1771->command); + sim_debug(ERROR_MSG, &tarbell_dev, "TARBELL: UNRECOGNIZED CMD %02X\n", pFD1771->command); pFD1771->intrq = TRUE; break; } @@ -1189,7 +1189,7 @@ static uint8 TARBELL_Command(UNIT *uptr, FD1771_REG *pFD1771, int32 Data) break; } - sim_debug(CMD_MSG, &tarbell_dev, TARBELL_SNAME ": CMD drive=%d cmd=%02X track=%03d sector=%03d status=%02X" NLP, + sim_debug(CMD_MSG, &tarbell_dev, TARBELL_SNAME ": CMD drive=%d cmd=%02X track=%03d sector=%03d status=%02X\n", tarbell_info->currentDrive, pFD1771->command, pFD1771->track, pFD1771->sector, pFD1771->status); return(cData); @@ -1217,7 +1217,7 @@ static int32 tarbellprom(int32 Addr, int32 rw, int32 Data) } else { if (Addr >= 0x0025 && tarbell_info->promEnabled == TRUE) { tarbell_info->promEnabled = FALSE; - sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Boot PROM disabled." NLP); + sim_debug(STATUS_MSG, &tarbell_dev, TARBELL_SNAME ": Boot PROM disabled.\n"); } if (tarbell_info->promEnabled == TRUE && Addr < TARBELL_PROM_SIZE) { diff --git a/AltairZ80/vfdhd.c b/AltairZ80/vfdhd.c index 4679620c..e8fbf2e5 100644 --- a/AltairZ80/vfdhd.c +++ b/AltairZ80/vfdhd.c @@ -364,7 +364,7 @@ static uint8 adc(uint8 sum, uint8 a1) static int32 vfdhddev(const int32 port, const int32 io, const int32 data) { - DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " IO %s, Port %02x" NLP, PCX, io ? "WR" : "RD", port)); + DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " IO %s, Port %02x\n", PCX, io ? "WR" : "RD", port)); if(io) { VFDHD_Write(port, data); return 0; @@ -414,7 +414,7 @@ static uint8 VFDHD_Read(const uint32 Addr) sim_debug(STATUS_MSG, &vfdhd_dev, "VFDHD: " ADDRESS_FORMAT " RD S1 = 0x%02x\n", PCX, cData); break; case FDHD_DATA: -/* DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " RD Data" NLP, PCX)); */ +/* DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " RD Data\n", PCX)); */ if(vfdhd_info->datacount+40 >= VFDHD_RAW_LEN) { sim_debug(ERROR_MSG, &vfdhd_dev, "VFDHD: " ADDRESS_FORMAT " Illegal data count %d.\n", PCX, vfdhd_info->datacount); vfdhd_info->datacount = 0; @@ -423,7 +423,7 @@ static uint8 VFDHD_Read(const uint32 Addr) vfdhd_info->datacount++; -/* DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " RD Data Sector %d[%03d]: 0x%02x" NLP, PCX, pDrive->sector, vfdhd_info->datacount, cData)); */ +/* DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " RD Data Sector %d[%03d]: 0x%02x\n", PCX, pDrive->sector, vfdhd_info->datacount, cData)); */ break; case FDHD_RESET_START: /* Reset */ sim_debug(CMD_MSG, &vfdhd_dev, "VFDHD: " ADDRESS_FORMAT " Reset\n", PCX); @@ -472,7 +472,7 @@ static uint8 VFDHD_Write(const uint32 Addr, uint8 cData) sim_debug(SEEK_MSG, &vfdhd_dev, "VFDHD: " ADDRESS_FORMAT " Home Disk %d\n", PCX, vfdhd_info->sel_drive); pDrive->track = 0; } - DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR C1=%02x: sector=%d, read=%d, ecc_en=%d, precomp=%d" NLP, + DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR C1=%02x: sector=%d, read=%d, ecc_en=%d, precomp=%d\n", PCX, cData, vfdhd_info->sector, @@ -481,7 +481,7 @@ static uint8 VFDHD_Write(const uint32 Addr, uint8 cData) vfdhd_info->precomp)); break; case FDHD_DATA: /* Data Port */ - DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR Data" NLP, PCX)); + DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR Data\n", PCX)); #ifdef USE_VGI if(vfdhd_info->sel_drive > 0) { /* Floppy */ if(vfdhd_info->datacount >= VFDHD_RAW_LEN) { @@ -557,9 +557,9 @@ static void VFDHD_Command(void) { case IMAGE_TYPE_IMD: if(pDrive->imd == NULL) { - sim_printf(".imd is NULL!" NLP); + sim_printf(".imd is NULL!\n"); } - sim_printf("%s: Read: imd=%p" NLP, __FUNCTION__, pDrive->imd); + sim_printf("%s: Read: imd=%p\n", __FUNCTION__, pDrive->imd); sectRead(pDrive->imd, pDrive->track, vfdhd_info->head, @@ -582,7 +582,7 @@ static void VFDHD_Command(void) break; case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - sim_printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else if(sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET) == 0) { rtn = sim_fread(&sdata.u.sync, 1, 274, /*VFDHD_SECTOR_LEN,*/ (pDrive->uptr)->fileref); if (rtn != 274) { @@ -595,16 +595,16 @@ static void VFDHD_Command(void) for(vfdhd_info->datacount = 0; sdata.raw[vfdhd_info->datacount] == 0x00; vfdhd_info->datacount++) { } - DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " READ: Sync found at offset %d" NLP, PCX, vfdhd_info->datacount)); + DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " READ: Sync found at offset %d\n", PCX, vfdhd_info->datacount)); } else { sim_debug(ERROR_MSG, &vfdhd_dev, "VFDHD: " ADDRESS_FORMAT " READ: sim_fseek error.\n", PCX); } break; case IMAGE_TYPE_CPT: - sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - sim_printf("%s: Unknown image Format" NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } @@ -626,7 +626,7 @@ static void VFDHD_Command(void) { case IMAGE_TYPE_IMD: if(pDrive->imd == NULL) { - sim_printf(".imd is NULL!" NLP); + sim_printf(".imd is NULL!\n"); } sectWrite(pDrive->imd, pDrive->track, @@ -639,9 +639,9 @@ static void VFDHD_Command(void) break; case IMAGE_TYPE_DSK: if(pDrive->uptr->fileref == NULL) { - sim_printf(".fileref is NULL!" NLP); + sim_printf(".fileref is NULL!\n"); } else { - DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR drive=%d, track=%d, head=%d, sector=%d" NLP, + DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR drive=%d, track=%d, head=%d, sector=%d\n", PCX, vfdhd_info->sel_drive, pDrive->track, @@ -654,15 +654,15 @@ static void VFDHD_Command(void) sim_fwrite(sdata.u.data, 1, 256, (pDrive->uptr)->fileref); #endif /* USE_VGI */ } else { - sim_printf("%s: sim_fseek error" NLP, __FUNCTION__); + sim_printf("%s: sim_fseek error\n", __FUNCTION__); } } break; case IMAGE_TYPE_CPT: - sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__); + sim_printf("%s: CPT Format not supported\n", __FUNCTION__); break; default: - sim_printf("%s: Unknown image Format" NLP, __FUNCTION__); + sim_printf("%s: Unknown image Format\n", __FUNCTION__); break; } } diff --git a/AltairZ80/wd179x.c b/AltairZ80/wd179x.c index 10c044c4..d016e688 100644 --- a/AltairZ80/wd179x.c +++ b/AltairZ80/wd179x.c @@ -414,7 +414,7 @@ t_stat wd179x_detach(UNIT *uptr) static int32 wd179xdev(const int32 port, const int32 io, const int32 data) { - DBG_PRINT(("WD179X: " ADDRESS_FORMAT " %s, Port 0x%02x Data 0x%02x" NLP, + DBG_PRINT(("WD179X: " ADDRESS_FORMAT " %s, Port 0x%02x Data 0x%02x\n", PCX, io ? "OUT" : " IN", port, data)); if(io) { WD179X_Write(port, data);