KA10: Fixed BLTUB/BLTBU instructions.
This commit is contained in:
parent
dc7754206f
commit
d435ae3028
2 changed files with 9 additions and 9 deletions
|
@ -246,12 +246,12 @@ uba_read_npr_byte(t_addr addr, uint16 ctl, uint8 *data)
|
||||||
return 0;
|
return 0;
|
||||||
addr = (map & PAGE_MASK) | (addr >> 2) & 0777;
|
addr = (map & PAGE_MASK) | (addr >> 2) & 0777;
|
||||||
wd = M[addr];
|
wd = M[addr];
|
||||||
sim_debug(DEBUG_DATA, &kmc_dev, "RD NPR B %08o %08o %012llo ", oaddr, addr, wd);
|
sim_debug(DEBUG_DATA, &cpu_dev, "RD NPR B %08o %08o %012llo ", oaddr, addr, wd);
|
||||||
if ((oaddr & 02) == 0)
|
if ((oaddr & 02) == 0)
|
||||||
wd >>= 18;
|
wd >>= 18;
|
||||||
if ((oaddr & 01))
|
if ((oaddr & 01))
|
||||||
wd >>= 8;
|
wd >>= 8;
|
||||||
sim_debug(DEBUG_DATA, &kmc_dev, "%03llo\n", wd & 0377);
|
sim_debug(DEBUG_DATA, &cpu_dev, "%03llo\n", wd & 0377);
|
||||||
*data = (uint8)(wd & 0377);
|
*data = (uint8)(wd & 0377);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
@ -273,7 +273,7 @@ uba_write_npr_byte(t_addr addr, uint16 ctl, uint8 data)
|
||||||
msk = 0377;
|
msk = 0377;
|
||||||
buf = (uint64)(data & msk);
|
buf = (uint64)(data & msk);
|
||||||
wd = M[addr];
|
wd = M[addr];
|
||||||
sim_debug(DEBUG_DATA, &kmc_dev, "WR NPR B %08o %08o %012llo ", oaddr, addr, wd);
|
sim_debug(DEBUG_DATA, &cpu_dev, "WR NPR B %08o %08o %012llo ", oaddr, addr, wd);
|
||||||
if ((oaddr & 02) == 0) {
|
if ((oaddr & 02) == 0) {
|
||||||
buf <<= 18;
|
buf <<= 18;
|
||||||
msk <<= 18;
|
msk <<= 18;
|
||||||
|
@ -285,7 +285,7 @@ uba_write_npr_byte(t_addr addr, uint16 ctl, uint8 data)
|
||||||
wd &= ~msk;
|
wd &= ~msk;
|
||||||
wd |= buf;
|
wd |= buf;
|
||||||
M[addr] = wd;
|
M[addr] = wd;
|
||||||
sim_debug(DEBUG_DATA, &kmc_dev, "%012llo\n", wd);
|
sim_debug(DEBUG_DATA, &cpu_dev, "%012llo\n", wd);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -10735,7 +10735,7 @@ skip_op:
|
||||||
/* 7000 */
|
/* 7000 */
|
||||||
case 000: /* APRID */
|
case 000: /* APRID */
|
||||||
/* APRID */
|
/* APRID */
|
||||||
MB = SMASK | BIT4 | BIT5 | (270LL << 18); /* MC level 270 */
|
MB = SMASK | BIT3 | BIT4 | BIT5 | (270LL << 18); /* MC level 270 */
|
||||||
/* Bit 0 Inhibit CST Update available */
|
/* Bit 0 Inhibit CST Update available */
|
||||||
/* Bit 1 No CST at all */
|
/* Bit 1 No CST at all */
|
||||||
/* Bit 2 Exotic microcode */
|
/* Bit 2 Exotic microcode */
|
||||||
|
@ -11399,13 +11399,13 @@ its_wr:
|
||||||
if (IR & 1) {
|
if (IR & 1) {
|
||||||
MB = ((MB << 10) & BMASK1) |
|
MB = ((MB << 10) & BMASK1) |
|
||||||
((MB >> 6) & BMASK2) |
|
((MB >> 6) & BMASK2) |
|
||||||
((MB << 12) & BMASK4) |
|
((MB << 12) & BMASK3) |
|
||||||
((MB >> 4) & BMASK3);
|
((MB >> 4) & BMASK4);
|
||||||
} else {
|
} else {
|
||||||
MB = ((MB & BMASK1) >> 10) |
|
MB = ((MB & BMASK1) >> 10) |
|
||||||
((MB & BMASK2) << 6) |
|
((MB & BMASK2) << 6) |
|
||||||
((MB & BMASK4) >> 12) |
|
((MB & BMASK3) >> 12) |
|
||||||
((MB & BMASK3) << 4);
|
((MB & BMASK4) << 4);
|
||||||
}
|
}
|
||||||
AB = (AR & RMASK);
|
AB = (AR & RMASK);
|
||||||
BYF5 = 0;
|
BYF5 = 0;
|
||||||
|
|
Loading…
Add table
Reference in a new issue