BESM6: Clarified terminology, TAB char fix.
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ef9d1adce1
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7 changed files with 74 additions and 74 deletions
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@ -344,9 +344,9 @@ t_stat cpu_deposit (t_value val, t_addr addr, UNIT *uptr, int32 sw)
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/* Deposited values for the switch register address range
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* always go to switch registers.
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*/
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pult [0][addr] = SET_CONVOL (val, CONVOL_INSN);
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pult [0][addr] = SET_PARITY (val, PARITY_INSN);
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} else
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memory [addr] = SET_CONVOL (val, CONVOL_INSN);
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memory [addr] = SET_PARITY (val, PARITY_INSN);
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return SCPE_OK;
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}
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@ -518,13 +518,13 @@ static void cmd_002 ()
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else
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RUU &= ~RUU_AVOST_DISABLE;
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if (Aex & 2)
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RUU |= RUU_CONVOL_RIGHT;
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RUU |= RUU_PARITY_RIGHT;
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else
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RUU &= ~RUU_CONVOL_RIGHT;
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RUU &= ~RUU_PARITY_RIGHT;
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if (Aex & 4)
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RUU |= RUU_CONVOL_LEFT;
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RUU |= RUU_PARITY_LEFT;
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else
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RUU &= ~RUU_CONVOL_LEFT;
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RUU &= ~RUU_PARITY_LEFT;
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break;
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case 0200: case 0201: case 0202: case 0203:
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case 0204: case 0205: case 0206: case 0207:
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@ -826,7 +826,7 @@ void check_initial_setup ()
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(d->tm_year % 10) << 20 |
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((d->tm_year / 10) % 10) << 16 |
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(memory[YEAR] & 7);
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memory[YEAR] = SET_CONVOL (date, CONVOL_NUMBER);
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memory[YEAR] = SET_PARITY (date, PARITY_NUMBER);
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/* приказ ВРЕ: ТР6 = 016, ТР5 = 9-14 р.-часы, 1-8 р.-минуты */
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pult[0][6] = 016;
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pult[0][4] = 0;
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@ -106,12 +106,12 @@ enum {
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* 11 - числовая свертка
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* В памяти биты свертки имитируют четность полуслов.
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*/
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#define CONVOL_INSN 1
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#define CONVOL_NUMBER 2
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#define SET_CONVOL(x, c) (((x) & BITS48) | (((c) & 3LL) << 48))
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#define IS_INSN(x) (((x) >> 48) == CONVOL_INSN)
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#define IS_NUMBER(x) (((x) >> 48) == CONVOL_INSN || \
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((x) >> 48) == CONVOL_NUMBER)
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#define PARITY_INSN 1
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#define PARITY_NUMBER 2
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#define SET_PARITY(x, c) (((x) & BITS48) | (((c) & 3LL) << 48))
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#define IS_INSN(x) (((x) >> 48) == PARITY_INSN)
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#define IS_NUMBER(x) (((x) >> 48) == PARITY_INSN || \
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((x) >> 48) == PARITY_NUMBER)
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/*
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* An attempt to approximate instruction execution times.
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@ -170,8 +170,8 @@ extern jmp_buf cpu_halt;
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/*
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* Искусственный регистр режимов УУ, в реальной машине отсутствует.
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*/
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#define RUU_CONVOL_RIGHT 000001 /* ПКП - признак контроля правой половины */
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#define RUU_CONVOL_LEFT 000002 /* ПКЛ - признак контроля левой половины */
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#define RUU_PARITY_RIGHT 000001 /* ПКП - признак контроля правой половины */
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#define RUU_PARITY_LEFT 000002 /* ПКЛ - признак контроля левой половины */
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#define RUU_EXTRACODE 000004 /* РежЭ - режим экстракода */
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#define RUU_INTERRUPT 000010 /* РежПр - режим прерывания */
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#define RUU_MOD_RK 000020 /* ПрИК - модификация регистром М[16] */
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@ -195,17 +195,17 @@ t_stat disk_attach (UNIT *u, char *cptr)
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if (!sim_quiet && !(sim_switches & SWMASK ('Q')))
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sim_printf ("%s: formatting disk volume %d\n", sim_uname (u), diskno);
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control[1] = SET_CONVOL(0, CONVOL_NUMBER);
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control[2] = SET_CONVOL(0, CONVOL_NUMBER);
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control[3] = SET_CONVOL(0, CONVOL_NUMBER);
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control[1] = SET_PARITY(0, PARITY_NUMBER);
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control[2] = SET_PARITY(0, PARITY_NUMBER);
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control[3] = SET_PARITY(0, PARITY_NUMBER);
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control[1] |= 01370707LL << 24; /* Magic mark */
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control[1] |= diskno << 12;
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for (blkno = 0; blkno < DISK_TOTBLK; ++blkno) {
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control[0] = SET_CONVOL((t_value)(2*blkno) << 36, CONVOL_NUMBER);
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control[0] = SET_PARITY((t_value)(2*blkno) << 36, PARITY_NUMBER);
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sim_fwrite(control, sizeof(t_value), 4, u->fileref);
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control[0] = SET_CONVOL((t_value)(2*blkno+1) << 36, CONVOL_NUMBER);
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control[0] = SET_PARITY((t_value)(2*blkno+1) << 36, PARITY_NUMBER);
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sim_fwrite(control, sizeof(t_value), 4, u->fileref);
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for (word = 0; word < 02000; ++word) {
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sim_fwrite(control+2, sizeof(t_value), 1, u->fileref);
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@ -446,7 +446,7 @@ void disk_read_header (UNIT *u)
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/* Кодируем гребенку. */
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for (i=0; i<4; i++)
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sysdata[i] = SET_CONVOL (collect (sysdata[i]), CONVOL_NUMBER);
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sysdata[i] = SET_PARITY (collect (sysdata[i]), PARITY_NUMBER);
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}
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/*
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@ -259,7 +259,7 @@ void drum_read_sector (UNIT *u)
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static void clear_memory (t_value *p, int nwords)
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{
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while (nwords-- > 0)
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*p++ = SET_CONVOL (0, CONVOL_NUMBER);
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*p++ = SET_PARITY (0, PARITY_NUMBER);
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}
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/*
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@ -73,13 +73,13 @@ t_value pult[11][8] = {
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{ 0 },
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/* Hardwired program 1, a simple CU test */
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{ 0376,
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SET_CONVOL(01240000007100002LL, CONVOL_INSN), /* 1: vtm (2), vjm 2(1) */
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SET_CONVOL(00657777712577777LL, CONVOL_INSN), /* 2: utm -1(1), utm -1(2) */
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SET_CONVOL(00444000317400007LL, CONVOL_INSN), /* 3: mtj 3(1), vzm 7(3) */
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SET_CONVOL(01045000317500007LL, CONVOL_INSN), /* 4: j+m 3(2), v1m 7(3)*/
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SET_CONVOL(00650000107700002LL, CONVOL_INSN), /* 5: utm 1(1), vlm 2(1) */
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SET_CONVOL(01257777713400001LL, CONVOL_INSN), /* 6: utm -1(2), vzm 1(2) */
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SET_CONVOL(00330000003000001LL, CONVOL_INSN) /* 7: stop, uj 1 */
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SET_PARITY(01240000007100002LL, PARITY_INSN), /* 1: vtm (2), vjm 2(1) */
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SET_PARITY(00657777712577777LL, PARITY_INSN), /* 2: utm -1(1), utm -1(2) */
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SET_PARITY(00444000317400007LL, PARITY_INSN), /* 3: mtj 3(1), vzm 7(3) */
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SET_PARITY(01045000317500007LL, PARITY_INSN), /* 4: j+m 3(2), v1m 7(3)*/
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SET_PARITY(00650000107700002LL, PARITY_INSN), /* 5: utm 1(1), vlm 2(1) */
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SET_PARITY(01257777713400001LL, PARITY_INSN), /* 6: utm -1(2), vzm 1(2) */
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SET_PARITY(00330000003000001LL, PARITY_INSN) /* 7: stop, uj 1 */
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},
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/* Hardwired program 2, RAM write test. The "arx" insn (cyclic add)
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* in word 3 could be changed to "atx" insn (load) to use a constant
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@ -87,52 +87,52 @@ t_value pult[11][8] = {
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* The bit pattern to use is taken from switch register 7.
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*/
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{ 0176,
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SET_CONVOL(00770000306400012LL, CONVOL_INSN), /* 1: vlm 3(1), vtm 12(1) */
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SET_CONVOL(00010000000000010LL, CONVOL_INSN), /* 2: xta 0, atx 10 */
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SET_CONVOL(00010001000130007LL, CONVOL_INSN), /* 3: xta 10, arx 7 */
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SET_CONVOL(00500777700000010LL, CONVOL_INSN), /* 4: atx -1(1), atx 10 */
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SET_CONVOL(00512777702600001LL, CONVOL_INSN), /* 5: aex -1(1), uza 1 */
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SET_CONVOL(00737777703000001LL, CONVOL_INSN) /* 6: stop -1(1), uj 1 */
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SET_PARITY(00770000306400012LL, PARITY_INSN), /* 1: vlm 3(1), vtm 12(1) */
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SET_PARITY(00010000000000010LL, PARITY_INSN), /* 2: xta 0, atx 10 */
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SET_PARITY(00010001000130007LL, PARITY_INSN), /* 3: xta 10, arx 7 */
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SET_PARITY(00500777700000010LL, PARITY_INSN), /* 4: atx -1(1), atx 10 */
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SET_PARITY(00512777702600001LL, PARITY_INSN), /* 5: aex -1(1), uza 1 */
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SET_PARITY(00737777703000001LL, PARITY_INSN) /* 6: stop -1(1), uj 1 */
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},
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/* Hardwired program 3, RAM read test to use after program 2, arx/atx applies */
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{ 0176,
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SET_CONVOL(00770000306400012LL, CONVOL_INSN), /* 1: vlm 3(1), vtm 12(1) */
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SET_CONVOL(00010000000000010LL, CONVOL_INSN), /* 2: xta 0, atx 10 */
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SET_CONVOL(00010001000130007LL, CONVOL_INSN), /* 3: xta 10, arx 7 */
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SET_CONVOL(00000000000000010LL, CONVOL_INSN), /* 4: atx 0, atx 10 */
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SET_CONVOL(00512777702600001LL, CONVOL_INSN), /* 5: aex -1(1), uza 1 */
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SET_CONVOL(00737777703000001LL, CONVOL_INSN) /* 6: stop -1(1), uj 1 */
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SET_PARITY(00770000306400012LL, PARITY_INSN), /* 1: vlm 3(1), vtm 12(1) */
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SET_PARITY(00010000000000010LL, PARITY_INSN), /* 2: xta 0, atx 10 */
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SET_PARITY(00010001000130007LL, PARITY_INSN), /* 3: xta 10, arx 7 */
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SET_PARITY(00000000000000010LL, PARITY_INSN), /* 4: atx 0, atx 10 */
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SET_PARITY(00512777702600001LL, PARITY_INSN), /* 5: aex -1(1), uza 1 */
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SET_PARITY(00737777703000001LL, PARITY_INSN) /* 6: stop -1(1), uj 1 */
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},
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/* Hardwired program 4, RAM write-read test to use after program 2, arx/atx applies */
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{ 0176,
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SET_CONVOL(00640001200100011LL, CONVOL_INSN), /* 1: vtm 12(1), xta 11 */
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SET_CONVOL(00000001005127777LL, CONVOL_INSN), /* 2: atx 10, aex -1(1) */
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SET_CONVOL(00260000407377777LL, CONVOL_INSN), /* 3: uza 4, stop -1(1) */
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SET_CONVOL(00010001000130007LL, CONVOL_INSN), /* 4: xta 10, arx 7 */
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SET_CONVOL(00500777707700002LL, CONVOL_INSN), /* 5: atx -1(1), vlm 2(1) */
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SET_CONVOL(00300000100000000LL, CONVOL_INSN) /* 6: uj 1 */
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SET_PARITY(00640001200100011LL, PARITY_INSN), /* 1: vtm 12(1), xta 11 */
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SET_PARITY(00000001005127777LL, PARITY_INSN), /* 2: atx 10, aex -1(1) */
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SET_PARITY(00260000407377777LL, PARITY_INSN), /* 3: uza 4, stop -1(1) */
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SET_PARITY(00010001000130007LL, PARITY_INSN), /* 4: xta 10, arx 7 */
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SET_PARITY(00500777707700002LL, PARITY_INSN), /* 5: atx -1(1), vlm 2(1) */
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SET_PARITY(00300000100000000LL, PARITY_INSN) /* 6: uj 1 */
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},
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/* Hardwired program 5, ALU test; switch reg 7 should contain a
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normalized f. p. value, e.g. 1.0 = 4050 0000 0000 0000 */
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{ 0176,
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SET_CONVOL(00004000700000011LL, CONVOL_INSN), /* 1: a+x 7, atx 11 */
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SET_CONVOL(00025001100000010LL, CONVOL_INSN), /* 2: e-x 11, atx 10 */
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SET_CONVOL(00017001000160010LL, CONVOL_INSN), /* 3: a*x 10, a/x 10 */
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SET_CONVOL(00005001000340145LL, CONVOL_INSN), /* 4: a-x 10, e+n 145 */
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SET_CONVOL(00270000603300000LL, CONVOL_INSN), /* 5: u1a 6, stop */
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SET_CONVOL(00010001103000001LL, CONVOL_INSN) /* 6: xta 11, uj 1*/
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SET_PARITY(00004000700000011LL, PARITY_INSN), /* 1: a+x 7, atx 11 */
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SET_PARITY(00025001100000010LL, PARITY_INSN), /* 2: e-x 11, atx 10 */
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SET_PARITY(00017001000160010LL, PARITY_INSN), /* 3: a*x 10, a/x 10 */
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SET_PARITY(00005001000340145LL, PARITY_INSN), /* 4: a-x 10, e+n 145 */
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SET_PARITY(00270000603300000LL, PARITY_INSN), /* 5: u1a 6, stop */
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SET_PARITY(00010001103000001LL, PARITY_INSN) /* 6: xta 11, uj 1*/
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},
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/* Hardwired program 6, reading from punch tape (originally) or a disk (rework);
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* various bit groups not hardwired, marked [] (TODO). Disk operation is encoded.
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*/
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{ 0376,
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SET_CONVOL(00640000300100006LL, CONVOL_INSN), /* 1: vtm [3](1), xta 6 */
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SET_CONVOL(00433002004330020LL, CONVOL_INSN), /* 2: ext 20(1), ext 20(1) */
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SET_CONVOL(00036015204330020LL, CONVOL_INSN), /* 3: asn 152, ext 20(1) */
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SET_CONVOL(00010000704330000LL, CONVOL_INSN), /* 4: xta 7, ext (1) */
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SET_CONVOL(00036014404330020LL, CONVOL_INSN), /* 5: asn 144, ext 20(1) */
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SET_CONVOL(00330000000002401LL, CONVOL_INSN), /* 6: stop, =24[01] */
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SET_CONVOL(04000000001400000LL, CONVOL_NUMBER) /* 7: bits 37-47 not hardwired */
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SET_PARITY(00640000300100006LL, PARITY_INSN), /* 1: vtm [3](1), xta 6 */
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SET_PARITY(00433002004330020LL, PARITY_INSN), /* 2: ext 20(1), ext 20(1) */
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SET_PARITY(00036015204330020LL, PARITY_INSN), /* 3: asn 152, ext 20(1) */
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SET_PARITY(00010000704330000LL, PARITY_INSN), /* 4: xta 7, ext (1) */
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SET_PARITY(00036014404330020LL, PARITY_INSN), /* 5: asn 144, ext 20(1) */
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SET_PARITY(00330000000002401LL, PARITY_INSN), /* 6: stop, =24[01] */
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SET_PARITY(04000000001400000LL, PARITY_NUMBER) /* 7: bits 37-47 not hardwired */
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},
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/* Hardwired program 7, RAM peek/poke, bits 1-15 of word 1 not hardwired (TODO) */
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{ 0176,
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@ -142,12 +142,12 @@ t_value pult[11][8] = {
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},
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/* Hardwired program 9, drum I/O */
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{ 0176,
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SET_CONVOL(00647774100100007LL, CONVOL_INSN), /* 1: vtm -31(1), xta 7 */
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SET_CONVOL(00033000212460000LL, CONVOL_INSN), /* 2: ext 2, vtm 60000(2) */
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SET_CONVOL(00040000013700003LL, CONVOL_INSN), /* 3: ati, vlm 3(2) */
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SET_CONVOL(00013000607700002LL, CONVOL_INSN), /* 4: arx 6, vlm 2(1) */
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SET_CONVOL(00330000103000005LL, CONVOL_INSN), /* 5: stop 1, uj 5 */
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SET_CONVOL(00000000000010001LL, CONVOL_NUMBER) /* 6: =10001 */
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SET_PARITY(00647774100100007LL, PARITY_INSN), /* 1: vtm -31(1), xta 7 */
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SET_PARITY(00033000212460000LL, PARITY_INSN), /* 2: ext 2, vtm 60000(2) */
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SET_PARITY(00040000013700003LL, PARITY_INSN), /* 3: ati, vlm 3(2) */
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SET_PARITY(00013000607700002LL, PARITY_INSN), /* 4: arx 6, vlm 2(1) */
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SET_PARITY(00330000103000005LL, PARITY_INSN), /* 5: stop 1, uj 5 */
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SET_PARITY(00000000000010001LL, PARITY_NUMBER) /* 6: =10001 */
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},
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/* Hardwired program 10, magtape read */
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{ 0176,
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@ -425,7 +425,7 @@ void mmu_store (int addr, t_value val)
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if (addr > 0100000 && addr < 0100010)
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return;
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BRZ[faked] = SET_CONVOL (val, RUU ^ CONVOL_INSN);
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BRZ[faked] = SET_PARITY (val, RUU ^ PARITY_INSN);
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BAZ[faked] = addr;
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mmu_flush (faked);
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return;
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@ -440,7 +440,7 @@ void mmu_store (int addr, t_value val)
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matching = mmu_match(addr, OLDEST);
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BRZ[matching] = SET_CONVOL (val, RUU ^ CONVOL_INSN);
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BRZ[matching] = SET_PARITY (val, RUU ^ PARITY_INSN);
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BAZ[matching] = addr;
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set_wins (matching);
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@ -738,7 +738,7 @@ void mmu_setprotection (int idx, t_value val)
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void mmu_setcache (int idx, t_value val)
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{
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BRZ[idx] = SET_CONVOL (val, RUU ^ CONVOL_INSN);
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BRZ[idx] = SET_PARITY (val, RUU ^ PARITY_INSN);
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}
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t_value mmu_getcache (int idx)
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@ -656,16 +656,16 @@ t_stat besm6_load (FILE *input)
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break;
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case '=': /* word */
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if (addr < 010)
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pult [0][addr] = SET_CONVOL (word, CONVOL_NUMBER);
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pult [0][addr] = SET_PARITY (word, PARITY_NUMBER);
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else
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memory [addr] = SET_CONVOL (word, CONVOL_NUMBER);
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memory [addr] = SET_PARITY (word, PARITY_NUMBER);
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++addr;
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break;
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case '*': /* instruction */
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if (addr < 010)
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pult [0][addr] = SET_CONVOL (word, CONVOL_INSN);
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pult [0][addr] = SET_PARITY (word, PARITY_INSN);
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else
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memory [addr] = SET_CONVOL (word, CONVOL_INSN);
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memory [addr] = SET_PARITY (word, PARITY_INSN);
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++addr;
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break;
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case '@': /* start address */
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