From d5acbc6f7a6934444068b3668958b0ff0024378f Mon Sep 17 00:00:00 2001
From: Mark Emmer <markemmer@SNOBOL4.com>
Date: Sun, 2 Mar 2014 22:22:20 -0600
Subject: [PATCH] SDS: Fix clock pulse interrupt bug

The single-instruction Clock Pulse interrupt (75 octal) may be a MIN or SKR instruction. The function rtc_inst increments (MIN) or decrements (SKR) the operand and tests for zero and generates a Clock Sync interrupt (74 octal) if so. However, the SDS 940 reference manual is incorrect; in the SKR case, the test should be if the result is negative.
---
 SDS/sds_cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/SDS/sds_cpu.c b/SDS/sds_cpu.c
index 78fe8ede..70dc2429 100644
--- a/SDS/sds_cpu.c
+++ b/SDS/sds_cpu.c
@@ -1589,7 +1589,7 @@ if ((r = Read (va, &dat)))                              /* get operand */
 dat = AddM24 (dat, val);                                /* mem +/- 1 */
 if ((r = Write (va, dat)))                              /* rewrite */
     return r;
-if (dat == 0)                                           /* set clk sync int */
+if ((op == MIN && dat == 0) || (dat & SIGN))            /* set clk sync int */
     int_req = int_req | INT_RTCS;
 return SCPE_OK;
 }