parent
17a7ee04fc
commit
d7e116f81a
1 changed files with 59 additions and 20 deletions
79
scp.c
79
scp.c
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@ -543,6 +543,7 @@ t_stat dep_addr (int32 flag, const char *cptr, t_addr addr, DEVICE *dptr,
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void fprint_fields (FILE *stream, t_value before, t_value after, BITFIELD* bitdefs);
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t_stat step_svc (UNIT *ptr);
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t_stat expect_svc (UNIT *ptr);
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t_stat flush_svc (UNIT *ptr);
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t_stat shift_args (char *do_arg[], size_t arg_count);
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t_stat set_on (int32 flag, CONST char *cptr);
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t_stat set_verify (int32 flag, CONST char *cptr);
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@ -557,6 +558,7 @@ t_stat sim_set_asynch (int32 flag, CONST char *cptr);
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static const char *_get_dbg_verb (uint32 dbits, DEVICE* dptr, UNIT *uptr);
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static t_stat sim_library_unit_tests (void);
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static t_stat _sim_debug_flush (void);
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static void sim_flush_buffered_files (void);
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/* Global data */
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@ -661,6 +663,7 @@ static const char *sim_int_expect_description (DEVICE *dptr)
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return "Expect facility";
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}
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#define FLUSH_INTERVAL 30*1000000 /* Flush I/O buffers every 30 seconds */
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static UNIT sim_expect_unit = { UDATA (&expect_svc, 0, 0) };
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DEVICE sim_expect_dev = {
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"INT-EXPECT", &sim_expect_unit, NULL, NULL,
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@ -670,6 +673,20 @@ DEVICE sim_expect_dev = {
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NULL, NULL, NULL, NULL, NULL, NULL,
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sim_int_expect_description};
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static const char *sim_int_flush_description (DEVICE *dptr)
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{
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return "Flush facility";
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}
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static UNIT sim_flush_unit = { UDATA (&flush_svc, UNIT_IDLE, 0) };
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DEVICE sim_flush_dev = {
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"INT-FLUSH", &sim_flush_unit, NULL, NULL,
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1, 0, 0, 0, 0, 0,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, DEV_NOSAVE, 0,
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NULL, NULL, NULL, NULL, NULL, NULL,
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sim_int_flush_description};
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#if defined USE_INT64
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static const char *sim_si64 = "64b data";
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#else
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@ -2529,6 +2546,7 @@ if (sim_timer_init ()) {
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sim_register_internal_device (&sim_scp_dev);
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sim_register_internal_device (&sim_expect_dev);
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sim_register_internal_device (&sim_step_dev);
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sim_register_internal_device (&sim_flush_dev);
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if ((stat = sim_ttinit ()) != SCPE_OK) {
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fprintf (stderr, "Fatal terminal initialization error\n%s\n",
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@ -7680,6 +7698,44 @@ if (warned)
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return r;
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}
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static
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void sim_flush_buffered_files (void)
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{
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uint32 i, j;
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DEVICE *dptr;
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UNIT *uptr;
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if (sim_log) /* flush console log */
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fflush (sim_log);
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if (sim_deb) /* flush debug log */
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_sim_debug_flush ();
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for (i = 1; (dptr = sim_devices[i]) != NULL; i++) { /* flush attached files */
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for (j = 0; j < dptr->numunits; j++) { /* if not buffered in mem */
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uptr = dptr->units + j;
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if (uptr->flags & UNIT_ATT) { /* attached, */
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if (uptr->io_flush) /* unit specific flush routine */
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uptr->io_flush (uptr); /* call it */
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else {
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if (!(uptr->flags & UNIT_BUF) && /* not buffered, */
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(uptr->fileref) && /* real file, */
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!(uptr->dynflags & UNIT_NO_FIO) && /* is FILE *, */
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!(uptr->flags & UNIT_RO)) /* not read only? */
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fflush (uptr->fileref);
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}
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}
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}
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}
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}
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t_stat
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flush_svc (UNIT *uptr)
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{
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sim_activate_after (uptr, FLUSH_INTERVAL);
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sim_flush_buffered_files ();
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return SCPE_OK;
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}
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/* Run, go, boot, cont, step, next commands
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ru[n] [new PC] reset and start simulation
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@ -7870,6 +7926,7 @@ if (sim_step) { /* set step timer */
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else
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sim_activate (&sim_step_unit, sim_step); /* instruction based step */
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}
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sim_activate_after (&sim_flush_unit, FLUSH_INTERVAL); /* Enable periodic buffer flushing */
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stop_cpu = FALSE;
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sim_is_running = TRUE; /* flag running */
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fflush(stdout); /* flush stdout */
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@ -7933,26 +7990,8 @@ sim_brk_clrall (BRK_TYP_DYN_STEPOVER); /* cancel any step/over
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signal (SIGHUP, SIG_DFL); /* cancel WRU */
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#endif
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signal (SIGTERM, SIG_DFL); /* cancel WRU */
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if (sim_log) /* flush console log */
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fflush (sim_log);
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if (sim_deb) /* flush debug log */
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_sim_debug_flush ();
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for (i = 1; (dptr = sim_devices[i]) != NULL; i++) { /* flush attached files */
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for (j = 0; j < dptr->numunits; j++) { /* if not buffered in mem */
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uptr = dptr->units + j;
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if (uptr->flags & UNIT_ATT) { /* attached, */
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if (uptr->io_flush) /* unit specific flush routine */
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uptr->io_flush (uptr); /* call it */
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else {
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if (!(uptr->flags & UNIT_BUF) && /* not buffered, */
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(uptr->fileref) && /* real file, */
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!(uptr->dynflags & UNIT_NO_FIO) && /* is FILE *, */
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!(uptr->flags & UNIT_RO)) /* not read only? */
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fflush (uptr->fileref);
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}
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}
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}
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}
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sim_flush_buffered_files();
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sim_cancel (&sim_flush_unit); /* cancel flush timer */
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sim_cancel (&sim_step_unit); /* cancel step timer */
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sim_throt_cancel (); /* cancel throttle */
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AIO_UPDATE_QUEUE;
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