diff --git a/I7094/i7094_cd.c b/I7094/i7094_cd.c
index d0ad6870..9b286653 100644
--- a/I7094/i7094_cd.c
+++ b/I7094/i7094_cd.c
@@ -291,11 +291,11 @@ return SCPE_OK;
#define BOOT_SIZE (sizeof (boot_rom) / sizeof (t_uint64))
static const t_uint64 boot_rom[] = {
- 00762000001000 + U_CDR, /* RDSA CDR */
- 00544000000000 + BOOT_START + 4, /* LCHA *+3 */
- 00544000000000, /* LCHA 0 */
- 00021000000001, /* TTR 1 */
- 05000030000000, /* IOCT 3,,0 */
+ INT64_C(00762000001000) + U_CDR, /* RDSA CDR */
+ INT64_C(00544000000000) + BOOT_START + 4, /* LCHA *+3 */
+ INT64_C(00544000000000), /* LCHA 0 */
+ INT64_C(00021000000001), /* TTR 1 */
+ INT64_C(05000030000000), /* IOCT 3,,0 */
};
t_stat cdr_boot (int32 unitno, DEVICE *dptr)
diff --git a/I7094/i7094_com.c b/I7094/i7094_com.c
index b85ca9f4..94d0c3df 100644
--- a/I7094/i7094_com.c
+++ b/I7094/i7094_com.c
@@ -114,8 +114,8 @@
/* Communications output */
-#define COMO_LIN12B 0200000000000 /* line is 12b */
-#define COMO_LINCTL 0100000000000 /* control msg */
+#define COMO_LIN12B INT64_C(0200000000000) /* line is 12b */
+#define COMO_LINCTL INT64_C(0100000000000) /* control msg */
#define COMO_GETLN(x) (((uint32) ((x) >> 24)) & 0777)
#define COMO_CTLRST 00000 /* control reset */
#define COMO_BITRPT 03777 /* bit repeat */
@@ -125,20 +125,20 @@
/* Status word (60b) */
-#define COMS_PCHK 004000000000000000000 /* prog check */
-#define COMS_DCHK 002000000000000000000 /* data check */
-#define COMS_EXCC 001000000000000000000 /* exc cond */
-#define COMS_MLNT 000040000000000000000 /* message length check */
-#define COMS_CHNH 000020000000000000000 /* channel hold */
-#define COMS_CHNQ 000010000000000000000 /* channel queue full */
-#define COMS_ITMO 000000100000000000000 /* interface timeout */
-#define COMS_DATR 000000004000000000000 /* data message ready */
-#define COMS_INBF 000000002000000000000 /* input buffer free */
-#define COMS_SVCR 000000001000000000000 /* service message ready */
-#define COMS_PALL 000000000000000000000
-#define COMS_DALL 000000000000000000000
-#define COMS_EALL 000000000000000000000
-#define COMS_DYN 000000007000000000000
+#define COMS_PCHK INT64_C(004000000000000000000) /* prog check */
+#define COMS_DCHK INT64_C(002000000000000000000) /* data check */
+#define COMS_EXCC INT64_C(001000000000000000000) /* exc cond */
+#define COMS_MLNT INT64_C(000040000000000000000) /* message length check */
+#define COMS_CHNH INT64_C(000020000000000000000) /* channel hold */
+#define COMS_CHNQ INT64_C(000010000000000000000) /* channel queue full */
+#define COMS_ITMO INT64_C(000000100000000000000) /* interface timeout */
+#define COMS_DATR INT64_C(000000004000000000000) /* data message ready */
+#define COMS_INBF INT64_C(000000002000000000000) /* input buffer free */
+#define COMS_SVCR INT64_C(000000001000000000000) /* service message ready */
+#define COMS_PALL INT64_C(000000000000000000000)
+#define COMS_DALL INT64_C(000000000000000000000)
+#define COMS_EALL INT64_C(000000000000000000000)
+#define COMS_DYN INT64_C(000000007000000000000)
/* Report variables */
@@ -558,7 +558,7 @@ switch (com_sta) { /* case on state */
case CHSL_WRS|CHSL_2ND: /* write first word */
dat = com_getob (com_ch); /* get word? */
- if (dat == 0777777777777) { /* turn on? */
+ if (dat == INT64_C(0777777777777)) { /* turn on? */
com_enab = 1; /* enable 7750 */
com_msgn = 0; /* init message # */
com_end (com_ch, 0, CHSL_WRS|CHSL_4TH); /* end, last state */
diff --git a/I7094/i7094_cpu.c b/I7094/i7094_cpu.c
index 54d51429..64c406db 100644
--- a/I7094/i7094_cpu.c
+++ b/I7094/i7094_cpu.c
@@ -975,7 +975,7 @@ while (reason == SCPE_OK) { /* loop until error */
if (!Read (ea, &SR))
break;
AC = (AC & AC_S) | ((AC >> 6) & 0017777777777) |
- (SR & 0770000000000);
+ (SR & INT64_C(0770000000000));
sc--;
}
if ((sc == 0) && (IR & INST_T_CXR1))
@@ -2405,7 +2405,7 @@ t_value sim_eval;
sim_eval = ir;
if (pc & HIST_PC) { /* instruction? */
fputs ("CPU ", st);
- fprintf (st, "%05o ", pc & AMASK);
+ fprintf (st, "%05o ", (int)(pc & AMASK));
if (rpt == 0)
fprintf (st, " ");
else if (rpt < 1000000)
@@ -2433,9 +2433,9 @@ if (pc & HIST_PC) { /* instruction? */
} /* end if instruction */
else if ((ch = HIST_CH (pc))) { /* channel? */
fprintf (st, "CH%c ", 'A' + ch - 1);
- fprintf (st, "%05o ", pc & AMASK);
+ fprintf (st, "%05o ", (int)(pc & AMASK));
fputs (" ", st);
- fprintf (st, "%05o ", ea & AMASK);
+ fprintf (st, "%05o ", (int)(ea & AMASK));
if (fprint_sym (st, pc & AMASK, &sim_eval, &cpu_unit,
(ch_dev[ch - 1].flags & DEV_7909)? SWMASK ('N'): SWMASK ('I')) > 0) {
fputs ("(undefined) ", st);
diff --git a/I7094/i7094_defs.h b/I7094/i7094_defs.h
index 2590b0d3..356a8d60 100644
--- a/I7094/i7094_defs.h
+++ b/I7094/i7094_defs.h
@@ -124,25 +124,25 @@ typedef struct {
/* Integer */
-#define DMASK 0777777777777 /* data mask */
-#define SIGN 0400000000000 /* sign */
-#define MMASK 0377777777777 /* magnitude mask */
-#define LMASK 0777777000000 /* left mask */
-#define RMASK 0000000777777 /* right mask */
-#define PMASK 0700000000000 /* prefix */
-#define XMASK 0077777000000 /* decrement */
-#define TMASK 0000000700000 /* tag */
-#define AMASK 0000000077777 /* address */
-#define SCMASK 0000000000377 /* shift count mask */
-#define B1 0200000000000 /* bit 1 */
-#define B9 0000400000000 /* bit 9 */
+#define DMASK INT64_C(0777777777777) /* data mask */
+#define SIGN INT64_C(0400000000000) /* sign */
+#define MMASK INT64_C(0377777777777) /* magnitude mask */
+#define LMASK INT64_C(0777777000000) /* left mask */
+#define RMASK INT64_C(0000000777777) /* right mask */
+#define PMASK INT64_C(0700000000000) /* prefix */
+#define XMASK INT64_C(0077777000000) /* decrement */
+#define TMASK INT64_C(0000000700000) /* tag */
+#define AMASK INT64_C(0000000077777) /* address */
+#define SCMASK INT64_C(0000000000377) /* shift count mask */
+#define B1 INT64_C(0200000000000) /* bit 1 */
+#define B9 INT64_C(0000400000000) /* bit 9 */
/* Accumulator is actually 38b wide */
-#define AC_S 02000000000000 /* sign */
-#define AC_Q 01000000000000 /* Q */
-#define AC_P 00400000000000 /* P */
-#define AC_MMASK 01777777777777 /* Q+P+magnitude */
+#define AC_S INT64_C(02000000000000) /* sign */
+#define AC_Q INT64_C(01000000000000) /* Q */
+#define AC_P INT64_C(00400000000000) /* P */
+#define AC_MMASK INT64_C(01777777777777) /* Q+P+magnitude */
/* Floating point */
@@ -159,8 +159,8 @@ typedef struct {
/* Instruction format */
-#define INST_T_DEC 0300000000000 /* if nz, takes decr */
-#define INST_T_CXR1 0000000100000 /* if nz, update XR1 */
+#define INST_T_DEC INT64_C(0300000000000) /* if nz, takes decr */
+#define INST_T_CXR1 INT64_C(0000000100000) /* if nz, update XR1 */
#define INST_V_OPD 33 /* decrement opcode */
#define INST_M_OPD 07
#define INST_V_DEC 18 /* decrement */
@@ -419,8 +419,8 @@ typedef struct {
#define CHF_V_LCC 30 /* loop ctrl counter */
#define CHF_M_LCC 077
-#define CHF_CLR_7909 07775000177 /* 7909 clear flags */
-#define CHF_SDC_7909 07777600000 /* 7909 SDC flags */
+#define CHF_CLR_7909 INT64_C(07775000177) /* 7909 clear flags */
+#define CHF_SDC_7909 INT64_C(07777600000) /* 7909 SDC flags */
/* Channel characteristics (in dev.flags) */
diff --git a/I7094/i7094_dsk.c b/I7094/i7094_dsk.c
index 70107ca9..22d3dcb4 100644
--- a/I7094/i7094_dsk.c
+++ b/I7094/i7094_dsk.c
@@ -143,12 +143,12 @@
/* Track/record structure */
#define THA2 0 /* home address 2 */
-#define HA2_MASK 0777700000000 /* two chars checked */
+#define HA2_MASK INT64_C(0777700000000) /* two chars checked */
#define T1STREC 1 /* start of records */
#define RLNT 0 /* record length */
#define RADDR 1 /* record address */
#define RDATA 2 /* start of data */
-#define REC_MASK 0171717177777 /* 4 digits, 2 chars */
+#define REC_MASK INT64_C(0171717177777) /* 4 digits, 2 chars */
/* Command word (60b) - 10 BCD digits */
@@ -167,27 +167,27 @@
/* Status word (60b) */
-#define DSKS_PCHK 004000000000000000000 /* prog check */
-#define DSKS_DCHK 002000000000000000000 /* data check */
-#define DSKS_EXCC 001000000000000000000 /* exc cond */
-#define DSKS_INVS 000200000000000000000 /* invalid seq */
-#define DSKS_INVC 000040000000000000000 /* invalid opcode */
-#define DSKS_FMTC 000020000000000000000 /* format check */
-#define DSKS_NRCF 000010000000000000000 /* no record found */
-#define DSKS_INVA 000002000000000000000 /* invalid address */
-#define DSKS_RSPC 000000400000000000000 /* response check */
-#define DSKS_CMPC 000000200000000000000 /* compare check */
-#define DSKS_PARC 000000100000000000000 /* parity check */
-#define DSKS_ACCI 000000020000000000000 /* access inoperative */
-#define DSKS_ACCN 000000004000000000000 /* access not ready */
-#define DSKS_DSKE 000000002000000000000 /* disk error */
-#define DSKS_FILE 000000001000000000000 /* file error */
-#define DSKS_6B 000000000040000000000 /* six bit mode */
-#define DSKS_ATN0 000000000002000000000 /* attention start */
-#define DSKS_PALL 000777000000000000000
-#define DSKS_DALL 000000740000000000000
-#define DSKS_EALL 000000037000000000000
-#define DSKS_ALLERR 007777777000000000000
+#define DSKS_PCHK INT64_C(004000000000000000000) /* prog check */
+#define DSKS_DCHK INT64_C(002000000000000000000) /* data check */
+#define DSKS_EXCC INT64_C(001000000000000000000) /* exc cond */
+#define DSKS_INVS INT64_C(000200000000000000000) /* invalid seq */
+#define DSKS_INVC INT64_C(000040000000000000000) /* invalid opcode */
+#define DSKS_FMTC INT64_C(000020000000000000000) /* format check */
+#define DSKS_NRCF INT64_C(000010000000000000000) /* no record found */
+#define DSKS_INVA INT64_C(000002000000000000000) /* invalid address */
+#define DSKS_RSPC INT64_C(000000400000000000000) /* response check */
+#define DSKS_CMPC INT64_C(000000200000000000000) /* compare check */
+#define DSKS_PARC INT64_C(000000100000000000000) /* parity check */
+#define DSKS_ACCI INT64_C(000000020000000000000) /* access inoperative */
+#define DSKS_ACCN INT64_C(000000004000000000000) /* access not ready */
+#define DSKS_DSKE INT64_C(000000002000000000000) /* disk error */
+#define DSKS_FILE INT64_C(000000001000000000000) /* file error */
+#define DSKS_6B INT64_C(000000000040000000000) /* six bit mode */
+#define DSKS_ATN0 INT64_C(000000000002000000000) /* attention start */
+#define DSKS_PALL INT64_C(000777000000000000000)
+#define DSKS_DALL INT64_C(000000740000000000000)
+#define DSKS_EALL INT64_C(000000037000000000000)
+#define DSKS_ALLERR INT64_C(007777777000000000000)
/* Commands - opcode 0 */
@@ -210,7 +210,7 @@
/* CTSS record structure */
-#define CTSS_HA2 0676767676767 /* =HXXXXXX */
+#define CTSS_HA2 INT64_C(0676767676767) /* =HXXXXXX */
#define CTSS_RLNT 435 /* data record */
#define CTSS_D1LNT 31 /* padding */
#define CTSS_D2LNT 14
@@ -485,7 +485,7 @@ else {
case CHSL_CTL: /* control */
dsk_cmd = val << 24;
- if (val & 0100000000000) { /* need 2nd word? */
+ if (val & INT64_C(0100000000000)) { /* need 2nd word? */
ch_req |= REQ_CH (ch); /* req ch for 2nd */
dsk_sta = CHSL_CTL|CHSL_2ND; /* next state */
return SCPE_OK;
diff --git a/I7094/i7094_io.c b/I7094/i7094_io.c
index dae1d2b0..92e2b367 100644
--- a/I7094/i7094_io.c
+++ b/I7094/i7094_io.c
@@ -130,8 +130,8 @@ const t_uint64 bit_masks[36] = {
0000010000000, 0000020000000, 0000040000000,
0000100000000, 0000200000000, 0000400000000,
0001000000000, 0002000000000, 0004000000000,
- 0010000000000, 0020000000000, 0040000000000,
- 0100000000000, 0200000000000, 0400000000000
+ INT64_C(0010000000000), INT64_C(0020000000000), INT64_C(0040000000000),
+ INT64_C(0100000000000), INT64_C(0200000000000), INT64_C(0400000000000)
};
const DEV_CHAR dev_table[] = {
@@ -981,7 +981,7 @@ if (ch_dev[ch].flags & DEV_7909) { /* 7909 */
case CH9_ICCA:
csel = CH9D_COND (ch_wc[ch]); /* get C */
if (csel == 0) ch_ar[ch] = /* C = 0? read SMS */
- (ch_ar[ch] & 0777777770000) | ((t_uint64) ch_sms[ch]);
+ (ch_ar[ch] & INT64_C(0777777770000)) | ((t_uint64) ch_sms[ch]);
else if (csel < 7) { /* else read cond cntr */
sc = 6 * (6 - csel);
ch_ar[ch] = (ch_ar[ch] & ~(((t_uint64) 077) << sc)) |
diff --git a/I7094/i7094_mt.c b/I7094/i7094_mt.c
index 86c22bab..4c9731af 100644
--- a/I7094/i7094_mt.c
+++ b/I7094/i7094_mt.c
@@ -844,11 +844,11 @@ return sim_tape_attach (uptr, cptr);
#define BOOT_START 01000
static const t_uint64 boot_rom[5] = {
- 0076200000000 + U_MTBIN - 1, /* RDS MT_binary */
- 0054000000000 + BOOT_START + 4, /* RCHA *+3 */
- 0054400000000, /* LCHA 0 */
- 0002100000001, /* TTR 1 */
- 0500003000000, /* IOCT 0,,3 */
+ INT64_C(0076200000000) + U_MTBIN - 1, /* RDS MT_binary */
+ INT64_C(0054000000000) + BOOT_START + 4, /* RCHA *+3 */
+ INT64_C(0054400000000), /* LCHA 0 */
+ INT64_C(0002100000001), /* TTR 1 */
+ INT64_C(0500003000000), /* IOCT 0,,3 */
};
t_stat mt_boot (int32 unitno, DEVICE *dptr)
diff --git a/I7094/i7094_sys.c b/I7094/i7094_sys.c
index 0b757f91..5aa432a6 100644
--- a/I7094/i7094_sys.c
+++ b/I7094/i7094_sys.c
@@ -142,23 +142,23 @@ return SCPE_NOFNC;
#define I_V_FL 39 /* inst class */
#define I_M_FL 017 /* class mask */
-#define I_NOP 0000000000000000 /* no operand */
-#define I_MXR 0010000000000000 /* addr(tag) */
-#define I_MXN 0020000000000000 /* *addr(tag) */
-#define I_MXV 0030000000000000 /* var mul/div */
-#define I_MXC 0040000000000000 /* convert */
-#define I_DNP 0050000000000000 /* decr, no oper */
-#define I_DEC 0060000000000000 /* decrement */
-#define I_SNS 0070000000000000 /* sense */
-#define I_IMM 0100000000000000 /* 18b immediate */
-#define I_TAG 0110000000000000 /* tag only */
-#define I_IOX 0120000000000000 /* IO channel */
-#define I_TCH 0130000000000000 /* transfer channel */
-#define I_I9N 0140000000000000 /* 7909 with nostore */
-#define I_I9S 0150000000000000 /* 7909 */
-#define I_SPX 0160000000000000 /* SPU, SPR */
-#define IFAKE_7607 0001000000000000 /* fake op extensions */
-#define IFAKE_7909 0002000000000000
+#define I_NOP INT64_C(0000000000000000) /* no operand */
+#define I_MXR INT64_C(0010000000000000) /* addr(tag) */
+#define I_MXN INT64_C(0020000000000000) /* *addr(tag) */
+#define I_MXV INT64_C(0030000000000000) /* var mul/div */
+#define I_MXC INT64_C(0040000000000000) /* convert */
+#define I_DNP INT64_C(0050000000000000) /* decr, no oper */
+#define I_DEC INT64_C(0060000000000000) /* decrement */
+#define I_SNS INT64_C(0070000000000000) /* sense */
+#define I_IMM INT64_C(0100000000000000) /* 18b immediate */
+#define I_TAG INT64_C(0110000000000000) /* tag only */
+#define I_IOX INT64_C(0120000000000000) /* IO channel */
+#define I_TCH INT64_C(0130000000000000) /* transfer channel */
+#define I_I9N INT64_C(0140000000000000) /* 7909 with nostore */
+#define I_I9S INT64_C(0150000000000000) /* 7909 */
+#define I_SPX INT64_C(0160000000000000) /* SPU, SPR */
+#define IFAKE_7607 INT64_C(0001000000000000) /* fake op extensions */
+#define IFAKE_7909 INT64_C(0002000000000000)
#define DFAKE (DMASK|IFAKE_7607|IFAKE_7909)
#define I_N_NOP 000
#define I_N_MXR 001
@@ -183,14 +183,14 @@ return SCPE_NOFNC;
#define INST_P_PNT 4 /* print if nz, term */
static const t_uint64 masks[15] = {
- 03777700000000, 03777700000000,
- 03777700000000, 03777700000000,
- 03777400000000, 03700000000000,
- 03700000000000, 03777700077777,
- 03777700000000, 03777700000000,
- 03700000200000, 03700000200000,
- 03760000200000, 03740000200000,
- 03777700077760 };
+ INT64_C(03777700000000), INT64_C(03777700000000),
+ INT64_C(03777700000000), INT64_C(03777700000000),
+ INT64_C(03777400000000), INT64_C(03700000000000),
+ INT64_C(03700000000000), INT64_C(03777700077777),
+ INT64_C(03777700000000), INT64_C(03777700000000),
+ INT64_C(03700000200000), INT64_C(03700000200000),
+ INT64_C(03760000200000), INT64_C(03740000200000),
+ INT64_C(03777700077760) };
static const uint32 fld_max[15][3] = { /* addr,tag,decr limit */
{ INST_M_ADDR, INST_M_TAG, 0 },
@@ -406,174 +406,174 @@ static const char *opcode[] = {
};
static const t_uint64 opc_v[] = {
- 0100000000000+I_DEC, 0200000000000+I_DEC, 0300000000000+I_DEC,
- 0500000000000+I_DNP, 0600000000000+I_DEC, 0700000000000+I_DEC,
- 0000000000000+I_MXN, 0002000000000+I_MXN, 0002100000000+I_MXN,
+ INT64_C(0100000000000)+I_DEC, INT64_C(0200000000000)+I_DEC, INT64_C(0300000000000)+I_DEC,
+ INT64_C(0500000000000)+I_DNP, INT64_C(0600000000000)+I_DEC, INT64_C(0700000000000)+I_DEC,
+ INT64_C(0000000000000)+I_MXN, INT64_C(0002000000000)+I_MXN, INT64_C(0002100000000)+I_MXN,
- 0076000000000+I_SNS, 0076000000001+I_SNS, 0076000000002+I_SNS,
- 0076000000003+I_SNS, 0076000000004+I_SNS, 0076000000005+I_SNS,
- 0076000000006+I_SNS, 0076000000007+I_SNS, 0076000000010+I_SNS,
- 0076000000011+I_SNS, 0076000000012+I_SNS, 0076000000014+I_SNS,
- 0076000000016+I_SNS, 0076000000140+I_SNS, 0076000000141+I_SNS,
- 0076000000142+I_SNS, 0076000000143+I_SNS, 0076000000144+I_SNS,
- 0076000000161+I_SNS, 0076000000162+I_SNS, 0076000000163+I_SNS,
- 0076000000164+I_SNS, 0076000000165+I_SNS, 0076000000166+I_SNS,
- 0076000001000+I_SNS, 0076000002000+I_SNS, 0076000003000+I_SNS,
- 0076000004000+I_SNS, 0076000005000+I_SNS, 0076000006000+I_SNS,
- 0076000007000+I_SNS, 0076000010000+I_SNS,
- 0076000001350+I_SNS, 0076000002350+I_SNS, 0076000003350+I_SNS,
- 0076000004350+I_SNS, 0076000005350+I_SNS, 0076000006350+I_SNS,
- 0076000007350+I_SNS, 0076000010350+I_SNS,
- 0076000001352+I_SNS, 0076000002352+I_SNS, 0076000003352+I_SNS,
- 0076000004352+I_SNS, 0076000005352+I_SNS, 0076000006352+I_SNS,
- 0076000007352+I_SNS, 0076000010352+I_SNS,
- 0076000001340+I_SNS, 0076000002340+I_SNS, 0076000003340+I_SNS,
- 0076000004340+I_SNS, 0076000005340+I_SNS, 0076000006340+I_SNS,
- 0076000007340+I_SNS, 0076000010340+I_SNS,
- 0076000001360+I_SNS, 0076000002360+I_SNS, 0076000003360+I_SNS,
- 0076000004360+I_SNS, 0076000005360+I_SNS, 0076000006360+I_SNS,
- 0076000007360+I_SNS, 0076000010360+I_SNS,
- 0076000001360+I_SNS, 0076000002360+I_SNS, 0076000003360+I_SNS,
- 0076000004360+I_SNS, 0076000005360+I_SNS, 0076000006360+I_SNS,
- 0076000007360+I_SNS, 0076000010360+I_SNS,
+ INT64_C(0076000000000)+I_SNS, INT64_C(0076000000001)+I_SNS, INT64_C(0076000000002)+I_SNS,
+ INT64_C(0076000000003)+I_SNS, INT64_C(0076000000004)+I_SNS, INT64_C(0076000000005)+I_SNS,
+ INT64_C(0076000000006)+I_SNS, INT64_C(0076000000007)+I_SNS, INT64_C(0076000000010)+I_SNS,
+ INT64_C(0076000000011)+I_SNS, INT64_C(0076000000012)+I_SNS, INT64_C(0076000000014)+I_SNS,
+ INT64_C(0076000000016)+I_SNS, INT64_C(0076000000140)+I_SNS, INT64_C(0076000000141)+I_SNS,
+ INT64_C(0076000000142)+I_SNS, INT64_C(0076000000143)+I_SNS, INT64_C(0076000000144)+I_SNS,
+ INT64_C(0076000000161)+I_SNS, INT64_C(0076000000162)+I_SNS, INT64_C(0076000000163)+I_SNS,
+ INT64_C(0076000000164)+I_SNS, INT64_C(0076000000165)+I_SNS, INT64_C(0076000000166)+I_SNS,
+ INT64_C(0076000001000)+I_SNS, INT64_C(0076000002000)+I_SNS, INT64_C(0076000003000)+I_SNS,
+ INT64_C(0076000004000)+I_SNS, INT64_C(0076000005000)+I_SNS, INT64_C(0076000006000)+I_SNS,
+ INT64_C(0076000007000)+I_SNS, INT64_C(0076000010000)+I_SNS,
+ INT64_C(0076000001350)+I_SNS, INT64_C(0076000002350)+I_SNS, INT64_C(0076000003350)+I_SNS,
+ INT64_C(0076000004350)+I_SNS, INT64_C(0076000005350)+I_SNS, INT64_C(0076000006350)+I_SNS,
+ INT64_C(0076000007350)+I_SNS, INT64_C(0076000010350)+I_SNS,
+ INT64_C(0076000001352)+I_SNS, INT64_C(0076000002352)+I_SNS, INT64_C(0076000003352)+I_SNS,
+ INT64_C(0076000004352)+I_SNS, INT64_C(0076000005352)+I_SNS, INT64_C(0076000006352)+I_SNS,
+ INT64_C(0076000007352)+I_SNS, INT64_C(0076000010352)+I_SNS,
+ INT64_C(0076000001340)+I_SNS, INT64_C(0076000002340)+I_SNS, INT64_C(0076000003340)+I_SNS,
+ INT64_C(0076000004340)+I_SNS, INT64_C(0076000005340)+I_SNS, INT64_C(0076000006340)+I_SNS,
+ INT64_C(0076000007340)+I_SNS, INT64_C(0076000010340)+I_SNS,
+ INT64_C(0076000001360)+I_SNS, INT64_C(0076000002360)+I_SNS, INT64_C(0076000003360)+I_SNS,
+ INT64_C(0076000004360)+I_SNS, INT64_C(0076000005360)+I_SNS, INT64_C(0076000006360)+I_SNS,
+ INT64_C(0076000007360)+I_SNS, INT64_C(0076000010360)+I_SNS,
+ INT64_C(0076000001360)+I_SNS, INT64_C(0076000002360)+I_SNS, INT64_C(0076000003360)+I_SNS,
+ INT64_C(0076000004360)+I_SNS, INT64_C(0076000005360)+I_SNS, INT64_C(0076000006360)+I_SNS,
+ INT64_C(0076000007360)+I_SNS, INT64_C(0076000010360)+I_SNS,
- 0002200000000+I_MXN, 0002400000000+I_MXN,
- 0002600000000+I_MXN, 0002700000000+I_MXN,
- 0003000000000+I_MXN, 0003100000000+I_MXN,
- 0003200000000+I_MXN, 0003300000000+I_MXN,
- 0004000000000+I_MXN, 0004100000000+I_NOP, 0004200000000+I_MXR,
- 0004300000000+I_NOP, 0004400000000+I_NOP, 0004600000000+I_MXR,
- 0005100000000+I_IMM, 0005400000000+I_IMM, 0005500000000+I_IMM,
- 0005600000000+I_IMM, 0005700000000+I_IMM,
- 0006000000000+I_MXN, 0006100000000+I_MXN, 0006200000000+I_MXN,
- 0006300000000+I_MXN, 0006400000000+I_MXN, 0006500000000+I_MXN,
- 0006600000000+I_MXN, 0006700000000+I_MXN, 0007400000000+I_MXR,
- 0010000000000+I_MXN, 0011400000000+I_MXC, 0012000000000+I_MXN,
- 0013100000000+I_NOP, 0014000000000+I_MXN,
- 0016100000000+I_MXN, 0016200000000+I_MXN,
- 0020000000000+I_MXN, 0020400000000+I_MXV, 0020500000000+I_MXV,
- 0022000000000+I_MXN, 0022100000000+I_MXN,
- 0022400000000+I_MXV, 0022500000000+I_MXV,
- 0022600000000+I_MXV, 0022700000000+I_MXV,
- 0024000000000+I_MXN, 0024100000000+I_MXN,
- 0026000000000+I_MXN, 0026100000000+I_MXN,
- 0030000000000+I_MXN, 0030100000000+I_MXN,
- 0030200000000+I_MXN, 0030300000000+I_MXN,
- 0030400000000+I_MXN, 0030500000000+I_MXN,
- 0030600000000+I_MXN, 0030700000000+I_MXN,
- 0032000000000+I_MXN, 0032200000000+I_MXN,
- 0034000000000+I_MXN, 0036100000000+I_MXN,
- 0040000000000+I_MXN, 0040100000000+I_MXN,
- 0040200000000+I_MXN, 0440000000000+I_MXN,
- 0042000000000+I_NOP, 0044000000000+I_MXN, 0044100000000+I_MXN,
- 0044200000000+I_MXN, 0044300000000+I_MXN, 0044400000000+I_MXN,
- 0044500000000+I_MXN, 0044600000000+I_MXN,
- 0050000000000+I_MXN, 0050200000000+I_MXN,
- 0052000000000+I_MXN, 0052200000000+I_MXN,
- 0053400000000+I_MXR, 0053500000000+I_MXR,
- 0054000000000+I_MXN, 0054100000000+I_MXN,
- 0054200000000+I_MXN, 0054300000000+I_MXN,
- 0054400000000+I_MXN, 0054500000000+I_MXN,
- 0054600000000+I_MXN, 0054700000000+I_MXN,
- 0054000000000+I_MXN, 0054100000000+I_MXN,
- 0054200000000+I_MXN, 0054300000000+I_MXN,
- 0054400000000+I_MXN, 0054500000000+I_MXN,
- 0054600000000+I_MXN, 0054700000000+I_MXN,
- 0056000000000+I_MXN, 0056400000000+I_MXN,
- 0060000000000+I_MXN, 0060100000000+I_MXN, 0060200000000+I_MXN,
- 0060400000000+I_MXN, 0062100000000+I_MXN, 0062200000000+I_MXN,
- 0062500000000+I_MXN, 0063000000000+I_MXN,
- 0063400000000+I_MXR, 0063600000000+I_MXR,
- 0064000000000+I_MXN, 0064000000000+I_MXN,
- 0064200000000+I_MXN, 0064300000000+I_MXN,
- 0064400000000+I_MXN, 0064500000000+I_MXN,
- 0064600000000+I_MXN, 0064700000000+I_MXN,
- 0073400000000+I_TAG, 0073700000000+I_TAG,
- 0075400000000+I_TAG, 0075600000000+I_TAG,
- 0076000000000+I_MXR, 0076100000000+I_NOP, 0076200000000+I_MXR,
- 0076300000000+I_MXR, 0076400000000+I_MXR, 0076500000000+I_MXR,
- 0076600000000+I_MXR, 0076700000000+I_MXR, 0077000000000+I_MXR,
- 0077100000000+I_MXR, 0077200000000+I_MXR, 0077400000000+I_MXR,
- 0077600000000+I_MXR,
+ INT64_C(0002200000000)+I_MXN, INT64_C(0002400000000)+I_MXN,
+ INT64_C(0002600000000)+I_MXN, INT64_C(0002700000000)+I_MXN,
+ INT64_C(0003000000000)+I_MXN, INT64_C(0003100000000)+I_MXN,
+ INT64_C(0003200000000)+I_MXN, INT64_C(0003300000000)+I_MXN,
+ INT64_C(0004000000000)+I_MXN, INT64_C(0004100000000)+I_NOP, INT64_C(0004200000000)+I_MXR,
+ INT64_C(0004300000000)+I_NOP, INT64_C(0004400000000)+I_NOP, INT64_C(0004600000000)+I_MXR,
+ INT64_C(0005100000000)+I_IMM, INT64_C(0005400000000)+I_IMM, INT64_C(0005500000000)+I_IMM,
+ INT64_C(0005600000000)+I_IMM, INT64_C(0005700000000)+I_IMM,
+ INT64_C(0006000000000)+I_MXN, INT64_C(0006100000000)+I_MXN, INT64_C(0006200000000)+I_MXN,
+ INT64_C(0006300000000)+I_MXN, INT64_C(0006400000000)+I_MXN, INT64_C(0006500000000)+I_MXN,
+ INT64_C(0006600000000)+I_MXN, INT64_C(0006700000000)+I_MXN, INT64_C(0007400000000)+I_MXR,
+ INT64_C(0010000000000)+I_MXN, INT64_C(0011400000000)+I_MXC, INT64_C(0012000000000)+I_MXN,
+ INT64_C(0013100000000)+I_NOP, INT64_C(0014000000000)+I_MXN,
+ INT64_C(0016100000000)+I_MXN, INT64_C(0016200000000)+I_MXN,
+ INT64_C(0020000000000)+I_MXN, INT64_C(0020400000000)+I_MXV, INT64_C(0020500000000)+I_MXV,
+ INT64_C(0022000000000)+I_MXN, INT64_C(0022100000000)+I_MXN,
+ INT64_C(0022400000000)+I_MXV, INT64_C(0022500000000)+I_MXV,
+ INT64_C(0022600000000)+I_MXV, INT64_C(0022700000000)+I_MXV,
+ INT64_C(0024000000000)+I_MXN, INT64_C(0024100000000)+I_MXN,
+ INT64_C(0026000000000)+I_MXN, INT64_C(0026100000000)+I_MXN,
+ INT64_C(0030000000000)+I_MXN, INT64_C(0030100000000)+I_MXN,
+ INT64_C(0030200000000)+I_MXN, INT64_C(0030300000000)+I_MXN,
+ INT64_C(0030400000000)+I_MXN, INT64_C(0030500000000)+I_MXN,
+ INT64_C(0030600000000)+I_MXN, INT64_C(0030700000000)+I_MXN,
+ INT64_C(0032000000000)+I_MXN, INT64_C(0032200000000)+I_MXN,
+ INT64_C(0034000000000)+I_MXN, INT64_C(0036100000000)+I_MXN,
+ INT64_C(0040000000000)+I_MXN, INT64_C(0040100000000)+I_MXN,
+ INT64_C(0040200000000)+I_MXN, INT64_C(0440000000000)+I_MXN,
+ INT64_C(0042000000000)+I_NOP, INT64_C(0044000000000)+I_MXN, INT64_C(0044100000000)+I_MXN,
+ INT64_C(0044200000000)+I_MXN, INT64_C(0044300000000)+I_MXN, INT64_C(0044400000000)+I_MXN,
+ INT64_C(0044500000000)+I_MXN, INT64_C(0044600000000)+I_MXN,
+ INT64_C(0050000000000)+I_MXN, INT64_C(0050200000000)+I_MXN,
+ INT64_C(0052000000000)+I_MXN, INT64_C(0052200000000)+I_MXN,
+ INT64_C(0053400000000)+I_MXR, INT64_C(0053500000000)+I_MXR,
+ INT64_C(0054000000000)+I_MXN, INT64_C(0054100000000)+I_MXN,
+ INT64_C(0054200000000)+I_MXN, INT64_C(0054300000000)+I_MXN,
+ INT64_C(0054400000000)+I_MXN, INT64_C(0054500000000)+I_MXN,
+ INT64_C(0054600000000)+I_MXN, INT64_C(0054700000000)+I_MXN,
+ INT64_C(0054000000000)+I_MXN, INT64_C(0054100000000)+I_MXN,
+ INT64_C(0054200000000)+I_MXN, INT64_C(0054300000000)+I_MXN,
+ INT64_C(0054400000000)+I_MXN, INT64_C(0054500000000)+I_MXN,
+ INT64_C(0054600000000)+I_MXN, INT64_C(0054700000000)+I_MXN,
+ INT64_C(0056000000000)+I_MXN, INT64_C(0056400000000)+I_MXN,
+ INT64_C(0060000000000)+I_MXN, INT64_C(0060100000000)+I_MXN, INT64_C(0060200000000)+I_MXN,
+ INT64_C(0060400000000)+I_MXN, INT64_C(0062100000000)+I_MXN, INT64_C(0062200000000)+I_MXN,
+ INT64_C(0062500000000)+I_MXN, INT64_C(0063000000000)+I_MXN,
+ INT64_C(0063400000000)+I_MXR, INT64_C(0063600000000)+I_MXR,
+ INT64_C(0064000000000)+I_MXN, INT64_C(0064000000000)+I_MXN,
+ INT64_C(0064200000000)+I_MXN, INT64_C(0064300000000)+I_MXN,
+ INT64_C(0064400000000)+I_MXN, INT64_C(0064500000000)+I_MXN,
+ INT64_C(0064600000000)+I_MXN, INT64_C(0064700000000)+I_MXN,
+ INT64_C(0073400000000)+I_TAG, INT64_C(0073700000000)+I_TAG,
+ INT64_C(0075400000000)+I_TAG, INT64_C(0075600000000)+I_TAG,
+ INT64_C(0076000000000)+I_MXR, INT64_C(0076100000000)+I_NOP, INT64_C(0076200000000)+I_MXR,
+ INT64_C(0076300000000)+I_MXR, INT64_C(0076400000000)+I_MXR, INT64_C(0076500000000)+I_MXR,
+ INT64_C(0076600000000)+I_MXR, INT64_C(0076700000000)+I_MXR, INT64_C(0077000000000)+I_MXR,
+ INT64_C(0077100000000)+I_MXR, INT64_C(0077200000000)+I_MXR, INT64_C(0077400000000)+I_MXR,
+ INT64_C(0077600000000)+I_MXR,
- 0476000000000+I_SNS, 0476000000001+I_SNS, 0476000000002+I_SNS,
- 0476000000003+I_SNS, 0476000000004+I_SNS, 0476000000005+I_SNS,
- 0476000000006+I_SNS, 0476000000007+I_SNS, 0476000000010+I_SNS,
- 0476000000016+I_SNS, 0476000000141+I_SNS, 0476000000142+I_SNS,
- 0476000000143+I_SNS, 0476000000144+I_SNS,
- 0476000001000+I_SNS, 0476000002000+I_SNS, 0476000003000+I_SNS,
- 0476000004000+I_SNS, 0476000005000+I_SNS, 0476000006000+I_SNS,
- 0476000007000+I_SNS, 0476000010000+I_SNS,
+ INT64_C(0476000000000)+I_SNS, INT64_C(0476000000001)+I_SNS, INT64_C(0476000000002)+I_SNS,
+ INT64_C(0476000000003)+I_SNS, INT64_C(0476000000004)+I_SNS, INT64_C(0476000000005)+I_SNS,
+ INT64_C(0476000000006)+I_SNS, INT64_C(0476000000007)+I_SNS, INT64_C(0476000000010)+I_SNS,
+ INT64_C(0476000000016)+I_SNS, INT64_C(0476000000141)+I_SNS, INT64_C(0476000000142)+I_SNS,
+ INT64_C(0476000000143)+I_SNS, INT64_C(0476000000144)+I_SNS,
+ INT64_C(0476000001000)+I_SNS, INT64_C(0476000002000)+I_SNS, INT64_C(0476000003000)+I_SNS,
+ INT64_C(0476000004000)+I_SNS, INT64_C(0476000005000)+I_SNS, INT64_C(0476000006000)+I_SNS,
+ INT64_C(0476000007000)+I_SNS, INT64_C(0476000010000)+I_SNS,
- 0402100000000+I_MXN,
- 0402200000000+I_MXN, 0402400000000+I_MXN,
- 0402600000000+I_MXN, 0402700000000+I_MXN,
- 0403000000000+I_MXN, 0403100000000+I_MXN,
- 0403200000000+I_MXN, 0403300000000+I_MXN,
- 0404200000000+I_NOP, 0404600000000+I_NOP,
- 0405100000000+I_IMM, 0405400000000+I_IMM, 0405500000000+I_IMM,
- 0405600000000+I_IMM, 0405700000000+I_IMM,
- 0406000000000+I_MXN, 0406100000000+I_MXN, 0406200000000+I_MXN,
- 0406300000000+I_MXN, 0406400000000+I_MXN, 0406500000000+I_MXN,
- 0406600000000+I_MXN, 0406700000000+I_MXN,
- 0410000000000+I_MXN, 0411400000000+I_MXC, 0412000000000+I_MXN,
- 0413000000000+I_NOP, 0414000000000+I_MXN, 0415400000000+I_MXC,
- 0420000000000+I_MXN, 0424000000000+I_MXN, 0424100000000+I_MXN,
- 0426000000000+I_MXN, 0426100000000+I_MXN,
- 0430000000000+I_MXN, 0430100000000+I_MXN,
- 0430200000000+I_MXN, 0430300000000+I_MXN,
- 0430400000000+I_MXN, 0430500000000+I_MXN,
- 0430600000000+I_MXN, 0430700000000+I_MXN,
- 0432000000000+I_MXN, 0434000000000+I_MXN,
- 0450000000000+I_MXN, 0450100000000+I_MXN, 0452000000000+I_MXN,
- 0453400000000+I_MXR, 0453500000000+I_MXR,
- 0454000000000+I_MXN, 0454100000000+I_MXN,
- 0454200000000+I_MXN, 0454300000000+I_MXN,
- 0454400000000+I_MXN, 0454500000000+I_MXN,
- 0454600000000+I_MXN, 0454700000000+I_MXN,
- 0454000000000+I_MXN, 0454100000000+I_MXN,
- 0454200000000+I_MXN, 0454300000000+I_MXN,
- 0454400000000+I_MXN, 0454500000000+I_MXN,
- 0454600000000+I_MXN, 0454700000000+I_MXN,
- 0460000000000+I_MXN, 0460100000000+I_MXN, 0460200000000+I_MXN, 0460300000000+I_MXN,
- 0460400000000+I_MXN,
- 0462000000000+I_MXN, 0462500000000+I_MXN,
- 0463400000000+I_MXR, 0463600000000+I_MXR,
- 0464000000000+I_MXN, 0464000000000+I_MXN,
- 0464200000000+I_MXN, 0464300000000+I_MXN,
- 0464400000000+I_MXN, 0464500000000+I_MXN,
- 0464600000000+I_MXN, 0464700000000+I_MXN,
- 0473400000000+I_TAG, 0473700000000+I_TAG,
- 0475400000000+I_TAG, 0475600000000+I_TAG,
- 0476000000000+I_MXR, 0476300000000+I_MXR, 0476400000000+I_MXR,
- 0476500000000+I_MXR, 0477300000000+I_MXR, 0477200000000+I_MXR,
- 0477400000000+I_MXR,
+ INT64_C(0402100000000)+I_MXN,
+ INT64_C(0402200000000)+I_MXN, INT64_C(0402400000000)+I_MXN,
+ INT64_C(0402600000000)+I_MXN, INT64_C(0402700000000)+I_MXN,
+ INT64_C(0403000000000)+I_MXN, INT64_C(0403100000000)+I_MXN,
+ INT64_C(0403200000000)+I_MXN, INT64_C(0403300000000)+I_MXN,
+ INT64_C(0404200000000)+I_NOP, INT64_C(0404600000000)+I_NOP,
+ INT64_C(0405100000000)+I_IMM, INT64_C(0405400000000)+I_IMM, INT64_C(0405500000000)+I_IMM,
+ INT64_C(0405600000000)+I_IMM, INT64_C(0405700000000)+I_IMM,
+ INT64_C(0406000000000)+I_MXN, INT64_C(0406100000000)+I_MXN, INT64_C(0406200000000)+I_MXN,
+ INT64_C(0406300000000)+I_MXN, INT64_C(0406400000000)+I_MXN, INT64_C(0406500000000)+I_MXN,
+ INT64_C(0406600000000)+I_MXN, INT64_C(0406700000000)+I_MXN,
+ INT64_C(0410000000000)+I_MXN, INT64_C(0411400000000)+I_MXC, INT64_C(0412000000000)+I_MXN,
+ INT64_C(0413000000000)+I_NOP, INT64_C(0414000000000)+I_MXN, INT64_C(0415400000000)+I_MXC,
+ INT64_C(0420000000000)+I_MXN, INT64_C(0424000000000)+I_MXN, INT64_C(0424100000000)+I_MXN,
+ INT64_C(0426000000000)+I_MXN, INT64_C(0426100000000)+I_MXN,
+ INT64_C(0430000000000)+I_MXN, INT64_C(0430100000000)+I_MXN,
+ INT64_C(0430200000000)+I_MXN, INT64_C(0430300000000)+I_MXN,
+ INT64_C(0430400000000)+I_MXN, INT64_C(0430500000000)+I_MXN,
+ INT64_C(0430600000000)+I_MXN, INT64_C(0430700000000)+I_MXN,
+ INT64_C(0432000000000)+I_MXN, INT64_C(0434000000000)+I_MXN,
+ INT64_C(0450000000000)+I_MXN, INT64_C(0450100000000)+I_MXN, INT64_C(0452000000000)+I_MXN,
+ INT64_C(0453400000000)+I_MXR, INT64_C(0453500000000)+I_MXR,
+ INT64_C(0454000000000)+I_MXN, INT64_C(0454100000000)+I_MXN,
+ INT64_C(0454200000000)+I_MXN, INT64_C(0454300000000)+I_MXN,
+ INT64_C(0454400000000)+I_MXN, INT64_C(0454500000000)+I_MXN,
+ INT64_C(0454600000000)+I_MXN, INT64_C(0454700000000)+I_MXN,
+ INT64_C(0454000000000)+I_MXN, INT64_C(0454100000000)+I_MXN,
+ INT64_C(0454200000000)+I_MXN, INT64_C(0454300000000)+I_MXN,
+ INT64_C(0454400000000)+I_MXN, INT64_C(0454500000000)+I_MXN,
+ INT64_C(0454600000000)+I_MXN, INT64_C(0454700000000)+I_MXN,
+ INT64_C(0460000000000)+I_MXN, INT64_C(0460100000000)+I_MXN, INT64_C(0460200000000)+I_MXN, INT64_C(0460300000000)+I_MXN,
+ INT64_C(0460400000000)+I_MXN,
+ INT64_C(0462000000000)+I_MXN, INT64_C(0462500000000)+I_MXN,
+ INT64_C(0463400000000)+I_MXR, INT64_C(0463600000000)+I_MXR,
+ INT64_C(0464000000000)+I_MXN, INT64_C(0464000000000)+I_MXN,
+ INT64_C(0464200000000)+I_MXN, INT64_C(0464300000000)+I_MXN,
+ INT64_C(0464400000000)+I_MXN, INT64_C(0464500000000)+I_MXN,
+ INT64_C(0464600000000)+I_MXN, INT64_C(0464700000000)+I_MXN,
+ INT64_C(0473400000000)+I_TAG, INT64_C(0473700000000)+I_TAG,
+ INT64_C(0475400000000)+I_TAG, INT64_C(0475600000000)+I_TAG,
+ INT64_C(0476000000000)+I_MXR, INT64_C(0476300000000)+I_MXR, INT64_C(0476400000000)+I_MXR,
+ INT64_C(0476500000000)+I_MXR, INT64_C(0477300000000)+I_MXR, INT64_C(0477200000000)+I_MXR,
+ INT64_C(0477400000000)+I_MXR,
- 0010100000000+I_MXN, 0410100000000+I_MXN,
- 0056200000000+I_MXN, 0456400000000+I_MXN,
- 0476100000041+I_SNS, 0476100000042+I_SNS,
- 0476100000043+I_SNS, 0476100000044+I_SNS,
+ INT64_C(0010100000000)+I_MXN, INT64_C(0410100000000)+I_MXN,
+ INT64_C(0056200000000)+I_MXN, INT64_C(0456400000000)+I_MXN,
+ INT64_C(0476100000041)+I_SNS, INT64_C(0476100000042)+I_SNS,
+ INT64_C(0476100000043)+I_SNS, INT64_C(0476100000044)+I_SNS,
- 01000000000000+I_IOX, 01000000200000+I_IOX, 01100000000000+I_TCH,
- 01200000000000+I_IOX, 01200000200000+I_IOX,
- 01300000000000+I_IOX, 01300000200000+I_IOX,
- 01400000000000+I_IOX, 01400000200000+I_IOX,
- 01500000000000+I_IOX, 01500000200000+I_IOX,
- 01600000000000+I_IOX, 01600000200000+I_IOX,
- 01700000000000+I_IOX, 01700000200000+I_IOX,
+ INT64_C(01000000000000)+I_IOX, INT64_C(01000000200000)+I_IOX, INT64_C(01100000000000)+I_TCH,
+ INT64_C(01200000000000)+I_IOX, INT64_C(01200000200000)+I_IOX,
+ INT64_C(01300000000000)+I_IOX, INT64_C(01300000200000)+I_IOX,
+ INT64_C(01400000000000)+I_IOX, INT64_C(01400000200000)+I_IOX,
+ INT64_C(01500000000000)+I_IOX, INT64_C(01500000200000)+I_IOX,
+ INT64_C(01600000000000)+I_IOX, INT64_C(01600000200000)+I_IOX,
+ INT64_C(01700000000000)+I_IOX, INT64_C(01700000200000)+I_IOX,
- 02000000000000+I_TCH, 02000000200000+I_IOX,
- 02100000000000+I_TCH, 02100000200000+I_TCH,
- 02200000000000+I_I9N, 02220000000000+I_TCH,
- 02200000200000+I_I9N, 02220000200000+I_TCH,
- 02240000000000+I_I9N, 02260000000000+I_TCH,
- 02240000200000+I_I9N,
- 02300000000000+I_I9S, 02300000200000+I_I9S,
- 02340000000000+I_I9S,
- 02400000000000+I_IOX,
- 02500000000000+I_IOX, 02500000200000+I_IOX,
- 02600000200000+I_I9S, 02640000000000+I_I9S, 02640000200000+I_I9S,
- 02700000000000+I_I9S, 02700000200000+I_IOX,
+ INT64_C(02000000000000)+I_TCH, INT64_C(02000000200000)+I_IOX,
+ INT64_C(02100000000000)+I_TCH, INT64_C(02100000200000)+I_TCH,
+ INT64_C(02200000000000)+I_I9N, INT64_C(02220000000000)+I_TCH,
+ INT64_C(02200000200000)+I_I9N, INT64_C(02220000200000)+I_TCH,
+ INT64_C(02240000000000)+I_I9N, INT64_C(02260000000000)+I_TCH,
+ INT64_C(02240000200000)+I_I9N,
+ INT64_C(02300000000000)+I_I9S, INT64_C(02300000200000)+I_I9S,
+ INT64_C(02340000000000)+I_I9S,
+ INT64_C(02400000000000)+I_IOX,
+ INT64_C(02500000000000)+I_IOX, INT64_C(02500000200000)+I_IOX,
+ INT64_C(02600000200000)+I_I9S, INT64_C(02640000000000)+I_I9S, INT64_C(02640000200000)+I_I9S,
+ INT64_C(02700000000000)+I_I9S, INT64_C(02700000200000)+I_IOX,
0
};
diff --git a/PDP10/pdp10_cpu.c b/PDP10/pdp10_cpu.c
index 94850a2d..8a24bfed 100644
--- a/PDP10/pdp10_cpu.c
+++ b/PDP10/pdp10_cpu.c
@@ -428,16 +428,16 @@ const int32 pi_m2lvl[128] = {
};
const d10 bytemask[64] = { 0,
- 01, 03, 07, 017, 037, 077,
- 0177, 0377, 0777, 01777, 03777, 07777,
- 017777, 037777, 077777,
- 0177777, 0377777, 0777777,
- 01777777, 03777777, 07777777,
- 017777777, 037777777, 077777777,
- 0177777777, 0377777777, 0777777777,
- 01777777777, 03777777777, 07777777777,
- 017777777777, 037777777777, 077777777777,
- 0177777777777, 0377777777777, 0777777777777,
+ INT64_C(01), INT64_C(03), INT64_C(07), INT64_C(017), INT64_C(037), INT64_C(077),
+ INT64_C(0177), INT64_C(0377), INT64_C(0777), INT64_C(01777), INT64_C(03777), INT64_C(07777),
+ INT64_C(017777), INT64_C(037777), INT64_C(077777),
+ INT64_C(0177777), INT64_C(0377777), INT64_C(0777777),
+ INT64_C(01777777), INT64_C(03777777), INT64_C(07777777),
+ INT64_C(017777777), INT64_C(037777777), INT64_C(077777777),
+ INT64_C(0177777777), INT64_C(0377777777), INT64_C(0777777777),
+ INT64_C(01777777777), INT64_C(03777777777), INT64_C(07777777777),
+ INT64_C(017777777777), INT64_C(037777777777), INT64_C(077777777777),
+ INT64_C(0177777777777), INT64_C(0377777777777), INT64_C(0777777777777),
ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES,
ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES,
ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES, ONES
@@ -1968,10 +1968,10 @@ return;
/* I/O block transfers - byte to Unibus (0) and Unibus to byte (1) */
-#define BYTE1 0776000000000
-#define BYTE2 0001774000000
-#define BYTE3 0000003770000
-#define BYTE4 0000000007760
+#define BYTE1 INT64_C(0776000000000)
+#define BYTE2 INT64_C(0001774000000)
+#define BYTE3 INT64_C(0000003770000)
+#define BYTE4 INT64_C(0000000007760)
/* unused 0000000000017 */
void bltu (int32 ac, a10 ea, int32 pflgs, int dir)
diff --git a/PDP10/pdp10_defs.h b/PDP10/pdp10_defs.h
index 1935f4db..b6c551b5 100644
--- a/PDP10/pdp10_defs.h
+++ b/PDP10/pdp10_defs.h
@@ -149,16 +149,16 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
#define MEM_ADDR_NXM(x) ((x) >= MEMSIZE)
#define VASIZE 18 /* virtual addr width */
#define AMASK ((1 << VASIZE) - 1) /* virtual addr mask */
-#define LMASK 0777777000000 /* left mask */
-#define LSIGN 0400000000000 /* left sign */
-#define RMASK 0000000777777 /* right mask */
-#define RSIGN 0000000400000 /* right sign */
-#define DMASK 0777777777777 /* data mask */
-#define SIGN 0400000000000 /* sign */
-#define MMASK 0377777777777 /* magnitude mask */
-#define ONES 0777777777777
-#define MAXPOS 0377777777777
-#define MAXNEG 0400000000000
+#define LMASK INT64_C(0777777000000) /* left mask */
+#define LSIGN INT64_C(0400000000000) /* left sign */
+#define RMASK INT64_C(0000000777777) /* right mask */
+#define RSIGN INT64_C(0000000400000) /* right sign */
+#define DMASK INT64_C(0777777777777) /* data mask */
+#define SIGN INT64_C(0400000000000) /* sign */
+#define MMASK INT64_C(0377777777777) /* magnitude mask */
+#define ONES INT64_C(0777777777777)
+#define MAXPOS INT64_C(0377777777777)
+#define MAXNEG INT64_C(0400000000000)
/* Instruction format */
@@ -185,11 +185,11 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* Byte pointer format */
#define BP_V_P 30 /* position */
-#define BP_M_P 077
-#define BP_P 0770000000000
+#define BP_M_P INT64_C(077)
+#define BP_P INT64_C(0770000000000)
#define BP_V_S 24 /* size */
-#define BP_M_S 077
-#define BP_S 0007700000000
+#define BP_M_S INT64_C(077)
+#define BP_S INT64_C(0007700000000)
#define GET_P(x) ((int32) (((x) >> BP_V_P) & BP_M_P))
#define GET_S(x) ((int32) (((x) >> BP_V_S) & BP_M_S))
#define PUT_P(b,x) (((b) & ~BP_P) | ((((t_int64) (x)) & BP_M_P) << BP_V_P))
@@ -290,15 +290,15 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* Page table entry, TOPS-20 paging */
-#define PTE_T20_V_TYP 33 /* T20: pointer type */
-#define PTE_T20_M_TYP 07
+#define PTE_T20_V_TYP INT64_C(33) /* T20: pointer type */
+#define PTE_T20_M_TYP INT64_C(07)
#define T20_NOA 0 /* no access */
#define T20_IMM 1 /* immediate */
#define T20_SHR 2 /* shared */
#define T20_IND 3 /* indirect */
-#define PTE_T20_W 0020000000000 /* T20: writeable */
-#define PTE_T20_C 0004000000000 /* T20: cacheable */
-#define PTE_T20_STM 0000077000000 /* T20: storage medium */
+#define PTE_T20_W INT64_C(0020000000000) /* T20: writeable */
+#define PTE_T20_C INT64_C(0004000000000) /* T20: cacheable */
+#define PTE_T20_STM INT64_C(0000077000000) /* T20: storage medium */
#define PTE_T20_V_PMI 18 /* page map index */
#define PTE_T20_M_PMI 0777
#define T20_GETTYP(x) ((int32) (((x) >> PTE_T20_V_TYP) & PTE_T20_M_TYP))
@@ -306,27 +306,27 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* CST entry, TOPS-20 paging */
-#define CST_AGE 0770000000000 /* age field */
-#define CST_M 0000000000001 /* modified */
+#define CST_AGE INT64_C(0770000000000) /* age field */
+#define CST_M INT64_C(0000000000001) /* modified */
/* Page fail word, DEC paging */
-#define PF_USER 0400000000000 /* user mode */
-#define PF_HARD 0200000000000 /* nx I/O reg */
-#define PF_NXM 0370000000000 /* nx memory */
-#define PF_T10_A 0100000000000 /* T10: pte A bit */
-#define PF_T10_W 0040000000000 /* T10: pte W bit */
-#define PF_T10_S 0020000000000 /* T10: pte S bit */
-#define PF_T20_DN 0100000000000 /* T20: eval done */
-#define PF_T20_M 0040000000000 /* T20: modified */
-#define PF_T20_W 0020000000000 /* T20: writeable */
-#define PF_WRITE 0010000000000 /* write reference */
-#define PF_PUB 0004000000000 /* pte public bit */
-#define PF_C 0002000000000 /* pte C bit */
-#define PF_VIRT 0001000000000 /* pfl: virt ref */
-#define PF_NXMP 0001000000000 /* nxm: phys ref */
-#define PF_IO 0000200000000 /* I/O reference */
-#define PF_BYTE 0000020000000 /* I/O byte ref */
+#define PF_USER INT64_C(0400000000000) /* user mode */
+#define PF_HARD INT64_C(0200000000000) /* nx I/O reg */
+#define PF_NXM INT64_C(0370000000000) /* nx memory */
+#define PF_T10_A INT64_C(0100000000000) /* T10: pte A bit */
+#define PF_T10_W INT64_C(0040000000000) /* T10: pte W bit */
+#define PF_T10_S INT64_C(0020000000000) /* T10: pte S bit */
+#define PF_T20_DN INT64_C(0100000000000) /* T20: eval done */
+#define PF_T20_M INT64_C(0040000000000) /* T20: modified */
+#define PF_T20_W INT64_C(0020000000000) /* T20: writeable */
+#define PF_WRITE INT64_C(0010000000000) /* write reference */
+#define PF_PUB INT64_C(0004000000000) /* pte public bit */
+#define PF_C INT64_C(0002000000000) /* pte C bit */
+#define PF_VIRT INT64_C(0001000000000) /* pfl: virt ref */
+#define PF_NXMP INT64_C(0001000000000) /* nxm: phys ref */
+#define PF_IO INT64_C(0000200000000) /* I/O reference */
+#define PF_BYTE INT64_C(0000020000000) /* I/O byte ref */
/* Virtual address, ITS paging */
@@ -358,7 +358,7 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* Page fail word, ITS paging */
-#define PF_ITS_WRITE 0010000000000 /* write reference */
+#define PF_ITS_WRITE INT64_C(0010000000000) /* write reference */
#define PF_ITS_V_ACC 28 /* access from PTE */
/* Page table fill operations */
@@ -370,16 +370,16 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* User base register */
-#define UBR_SETACB 0400000000000 /* set AC blocks */
-#define UBR_SETUBR 0100000000000 /* set UBR */
+#define UBR_SETACB INT64_C(0400000000000) /* set AC blocks */
+#define UBR_SETUBR INT64_C(0100000000000) /* set UBR */
#define UBR_V_CURAC 27 /* current AC block */
#define UBR_V_PRVAC 24 /* previous AC block */
#define UBR_M_AC 07
-#define UBR_ACBMASK 0007700000000
+#define UBR_ACBMASK INT64_C(0007700000000)
#define UBR_V_UBR 0 /* user base register */
#define UBR_N_UBR 11
#define UBR_M_UBR 03777
-#define UBR_UBRMASK 0000000003777
+#define UBR_UBRMASK INT64_C(0000000003777)
#define UBR_GETCURAC(x) ((int32) (((x) >> UBR_V_CURAC) & UBR_M_AC))
#define UBR_GETPRVAC(x) ((int32) (((x) >> UBR_V_PRVAC) & UBR_M_AC))
#define UBR_GETUBR(x) ((int32) (((x) >> UBR_V_UBR) & PAG_M_PPN))
@@ -467,10 +467,10 @@ typedef t_int64 d10; /* PDP-10 data (36b) */
/* Microcode constants */
-#define UC_INHCST 0400000000000 /* inhibit CST update */
-#define UC_UBABLT 0040000000000 /* BLTBU and BLTUB */
-#define UC_KIPAGE 0020000000000 /* "KI" paging */
-#define UC_KLPAGE 0010000000000 /* "KL" paging */
+#define UC_INHCST INT64_C(0400000000000) /* inhibit CST update */
+#define UC_UBABLT INT64_C(0040000000000) /* BLTBU and BLTUB */
+#define UC_KIPAGE INT64_C(0020000000000) /* "KI" paging */
+#define UC_KLPAGE INT64_C(0010000000000) /* "KL" paging */
#define UC_VERDEC (0130 << 18) /* ucode version */
#define UC_VERITS (262u << 18)
#define UC_SERDEC 4097 /* serial number */
diff --git a/PDP10/pdp10_ksio.c b/PDP10/pdp10_ksio.c
index 93f9871e..b3503c07 100644
--- a/PDP10/pdp10_ksio.c
+++ b/PDP10/pdp10_ksio.c
@@ -520,8 +520,8 @@ for ( ; ba < lim; ba++) { /* by bytes */
}
val = *buf++; /* get data */
if (ba & 2)
- M[pa10] = (M[pa10] & 0777777600000) | val;
- else M[pa10] = (M[pa10] & 0600000777777) | (val << 18);
+ M[pa10] = (M[pa10] & INT64_C(0777777600000)) | val;
+ else M[pa10] = (M[pa10] & INT64_C(0600000777777)) | (val << 18);
}
return 0;
}
diff --git a/PDP10/pdp10_mdfp.c b/PDP10/pdp10_mdfp.c
index bf986e9d..623a4358 100644
--- a/PDP10/pdp10_mdfp.c
+++ b/PDP10/pdp10_mdfp.c
@@ -119,14 +119,14 @@ typedef struct { /* unpacked fp number */
#define FP_BIAS 0200 /* exponent bias */
#define FP_N_FHI 27 /* # of hi frac bits */
#define FP_V_FHI 0 /* must be zero */
-#define FP_M_FHI 0000777777777
+#define FP_M_FHI INT64_C(0000777777777)
#define FP_N_EXP 8 /* # of exp bits */
#define FP_V_EXP (FP_V_FHI + FP_N_FHI)
#define FP_M_EXP 0377
#define FP_V_SIGN (FP_V_EXP + FP_N_EXP) /* sign */
#define FP_N_FLO 35 /* # of lo frac bits */
#define FP_V_FLO 0 /* must be zero */
-#define FP_M_FLO 0377777777777
+#define FP_M_FLO INT64_C(0377777777777)
#define GET_FPSIGN(x) ((int32) (((x) >> FP_V_SIGN) & 1))
#define GET_FPEXP(x) ((int32) (((x) >> FP_V_EXP) & FP_M_EXP))
#define GET_FPHI(x) ((x) & FP_M_FHI)
@@ -141,14 +141,14 @@ typedef struct { /* unpacked fp number */
#define FP_V_URNDS (FP_V_UFHI - 1) /* sp round bit */
#define FP_V_UCRY (FP_V_UFHI + FP_N_FHI) /* <63> */
#define FP_V_UNORM (FP_V_UCRY - 1) /* normalized bit */
-#define FP_UFHI 0x7FFFFFF000000000
-#define FP_UFLO 0x0000000FFFFFFFFE
-#define FP_UFRAC 0x7FFFFFFFFFFFFFFE
-#define FP_URNDD 0x0000000000000001
-#define FP_URNDS 0x0000000800000000
-#define FP_UNORM 0x4000000000000000
-#define FP_UCRY 0x8000000000000000
-#define FP_ONES 0xFFFFFFFFFFFFFFFF
+#define FP_UFHI INT64_C(0x7FFFFFF000000000)
+#define FP_UFLO INT64_C(0x0000000FFFFFFFFE)
+#define FP_UFRAC INT64_C(0x7FFFFFFFFFFFFFFE)
+#define FP_URNDD INT64_C(0x0000000000000001)
+#define FP_URNDS INT64_C(0x0000000800000000)
+#define FP_UNORM INT64_C(0x4000000000000000)
+#define FP_UCRY INT64_C(0x8000000000000000)
+#define FP_ONES INT64_C(0xFFFFFFFFFFFFFFFF)
#define UNEG(x) ((~x) + 1)
#define DUNEG(x) x.flo = UNEG (x.flo); x.fhi = ~x.fhi + (x.flo == 0)
diff --git a/PDP10/pdp10_pag.c b/PDP10/pdp10_pag.c
index 3b0fd445..235a5357 100644
--- a/PDP10/pdp10_pag.c
+++ b/PDP10/pdp10_pag.c
@@ -762,7 +762,7 @@ t_bool wrcstm (a10 ea, int32 prv)
{
cstm = Read (ea, prv);
if ((cpu_unit.flags & UNIT_T20) && (ea == 040127))
- cstm = 0770000000000;
+ cstm = INT64_C(0770000000000);
return FALSE;
}
diff --git a/PDP10/pdp10_rp.c b/PDP10/pdp10_rp.c
index 14a7a45a..1adab24b 100644
--- a/PDP10/pdp10_rp.c
+++ b/PDP10/pdp10_rp.c
@@ -1190,97 +1190,97 @@ return SCPE_OK;
#define BOOT_LEN (sizeof (boot_rom_dec) / sizeof (d10))
static const d10 boot_rom_dec[] = {
- 0515040000001, /* boot:hrlzi 1,1 ; uba # */
- 0201000140001, /* movei 0,140001 ; vld,fst,pg 1 */
- 0713001000000+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */
- 0435040000000+(IOBA_RP & RMASK), /* iori 1,776700 ; rh addr */
- 0202040000000+FE_RHBASE, /* movem 1,FE_RHBASE */
- 0201000000040, /* movei 0,40 ; ctrl reset */
- 0713001000010, /* wrio 0,10(1) ; ->RPCS2 */
- 0201000000021, /* movei 0,21 ; preset */
- 0713001000000, /* wrio 0,0(1) ; ->RPCS1 */
- 0201100000001, /* movei 2,1 ; blk #1 */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0204140001000, /* movs 3,1000 ; id word */
- 0306140505755, /* cain 3,sixbit /HOM/ */
- 0254000377023, /* jrst .+6 ; match */
- 0201100000010, /* movei 2,10 ; blk #10 */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0204140001000, /* movs 3,1000 ; id word */
- 0302140505755, /* caie 3,sixbit /HOM/ */
- 0254200377022, /* halt . ; inv home */
- 0336100001103, /* skipn 2,1103 ; pg of ptrs */
- 0254200377024, /* halt . ; inv ptr */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0336100001004, /* skipn 2,1004 ; mon boot */
- 0254200377027, /* halt . ; inv ptr */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0254000001000, /* jrst 1000 ; start */
- 0201140176000, /* rdbl:movei 3,176000 ; wd cnt */
- 0201200004000, /* movei 4,4000 ; addr */
- 0200240000000+FE_UNIT, /* move 5,FE_UNIT ; unit */
- 0200300000002, /* move 6,2 */
- 0242300777750, /* lsh 6,-24. ; cyl */
- 0713141000002, /* wrio 3,2(1) ; ->RPWC */
- 0713201000004, /* wrio 4,4(1) ; ->RPBA */
- 0713101000006, /* wrio 2,6(1) ; ->RPDA */
- 0713241000010, /* wrio 5,10(1) ; ->RPCS2 */
- 0713301000034, /* wrio 6,34(1) ; ->RPDC */
- 0201000000071, /* movei 0,71 ; read+go */
- 0713001000000, /* wrio 0,0(1) ; ->RPCS1 */
- 0712341000000, /* rdio 7,0(1) ; read csr */
- 0606340000200, /* trnn 7,200 ; test rdy */
- 0254000377046, /* jrst .-2 ; loop */
- 0602340100000, /* trne 7,100000 ; test err */
- 0254200377052, /* halt */
- 0254017000000, /* jrst 0(17) ; return */
+ INT64_C(0515040000001), /* boot:hrlzi 1,1 ; uba # */
+ INT64_C(0201000140001), /* movei 0,140001 ; vld,fst,pg 1 */
+ INT64_C(0713001000000)+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */
+ INT64_C(0435040000000)+(IOBA_RP & RMASK), /* iori 1,776700 ; rh addr */
+ INT64_C(0202040000000)+FE_RHBASE, /* movem 1,FE_RHBASE */
+ INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
+ INT64_C(0713001000010), /* wrio 0,10(1) ; ->RPCS2 */
+ INT64_C(0201000000021), /* movei 0,21 ; preset */
+ INT64_C(0713001000000), /* wrio 0,0(1) ; ->RPCS1 */
+ INT64_C(0201100000001), /* movei 2,1 ; blk #1 */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0204140001000), /* movs 3,1000 ; id word */
+ INT64_C(0306140505755), /* cain 3,sixbit /HOM/ */
+ INT64_C(0254000377023), /* jrst .+6 ; match */
+ INT64_C(0201100000010), /* movei 2,10 ; blk #10 */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0204140001000), /* movs 3,1000 ; id word */
+ INT64_C(0302140505755), /* caie 3,sixbit /HOM/ */
+ INT64_C(0254200377022), /* halt . ; inv home */
+ INT64_C(0336100001103), /* skipn 2,1103 ; pg of ptrs */
+ INT64_C(0254200377024), /* halt . ; inv ptr */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0336100001004), /* skipn 2,1004 ; mon boot */
+ INT64_C(0254200377027), /* halt . ; inv ptr */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0254000001000), /* jrst 1000 ; start */
+ INT64_C(0201140176000), /* rdbl:movei 3,176000 ; wd cnt */
+ INT64_C(0201200004000), /* movei 4,4000 ; addr */
+ INT64_C(0200240000000)+FE_UNIT, /* move 5,FE_UNIT ; unit */
+ INT64_C(0200300000002), /* move 6,2 */
+ INT64_C(0242300777750), /* lsh 6,-24. ; cyl */
+ INT64_C(0713141000002), /* wrio 3,2(1) ; ->RPWC */
+ INT64_C(0713201000004), /* wrio 4,4(1) ; ->RPBA */
+ INT64_C(0713101000006), /* wrio 2,6(1) ; ->RPDA */
+ INT64_C(0713241000010), /* wrio 5,10(1) ; ->RPCS2 */
+ INT64_C(0713301000034), /* wrio 6,34(1) ; ->RPDC */
+ INT64_C(0201000000071), /* movei 0,71 ; read+go */
+ INT64_C(0713001000000), /* wrio 0,0(1) ; ->RPCS1 */
+ INT64_C(0712341000000), /* rdio 7,0(1) ; read csr */
+ INT64_C(0606340000200), /* trnn 7,200 ; test rdy */
+ INT64_C(0254000377046), /* jrst .-2 ; loop */
+ INT64_C(0602340100000), /* trne 7,100000 ; test err */
+ INT64_C(0254200377052), /* halt */
+ INT64_C(0254017000000), /* jrst 0(17) ; return */
};
static const d10 boot_rom_its[] = {
- 0515040000001, /* boot:hrlzi 1,1 ; uba # */
- 0201000140001, /* movei 0,140001 ; vld,fst,pg 1 */
- 0715000000000+(IOBA_UBMAP+1 & RMASK), /* iowrq 0,763001 ; set ubmap */
- 0435040000000+(IOBA_RP & RMASK), /* iori 1,776700 ; rh addr */
- 0202040000000+FE_RHBASE, /* movem 1,FE_RHBASE */
- 0201000000040, /* movei 0,40 ; ctrl reset */
- 0715001000010, /* iowrq 0,10(1) ; ->RPCS2 */
- 0201000000021, /* movei 0,21 ; preset */
- 0715001000000, /* iowrq 0,0(1) ; ->RPCS1 */
- 0201100000001, /* movei 2,1 ; blk #1 */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0204140001000, /* movs 3,1000 ; id word */
- 0306140505755, /* cain 3,sixbit /HOM/ */
- 0254000377023, /* jrst .+6 ; match */
- 0201100000010, /* movei 2,10 ; blk #10 */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0204140001000, /* movs 3,1000 ; id word */
- 0302140505755, /* caie 3,sixbit /HOM/ */
- 0254200377022, /* halt . ; inv home */
- 0336100001103, /* skipn 2,1103 ; pg of ptrs */
- 0254200377024, /* halt . ; inv ptr */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0336100001004, /* skipn 2,1004 ; mon boot */
- 0254200377027, /* halt . ; inv ptr */
- 0265740377032, /* jsp 17,rdbl ; read */
- 0254000001000, /* jrst 1000 ; start */
- 0201140176000, /* rdbl:movei 3,176000 ; wd cnt */
- 0201200004000, /* movei 4,4000 ; addr */
- 0200240000000+FE_UNIT, /* move 5,FE_UNIT ; unit */
- 0200300000002, /* move 6,2 */
- 0242300777750, /* lsh 6,-24. ; cyl */
- 0715141000002, /* iowrq 3,2(1) ; ->RPWC */
- 0715201000004, /* iowrq 4,4(1) ; ->RPBA */
- 0715101000006, /* iowrq 2,6(1) ; ->RPDA */
- 0715241000010, /* iowrq 5,10(1) ; ->RPCS2 */
- 0715301000034, /* iowrq 6,34(1) ; ->RPDC */
- 0201000000071, /* movei 0,71 ; read+go */
- 0715001000000, /* iowrq 0,0(1) ; ->RPCS1 */
- 0711341000000, /* iordq 7,0(1) ; read csr */
- 0606340000200, /* trnn 7,200 ; test rdy */
- 0254000377046, /* jrst .-2 ; loop */
- 0602340100000, /* trne 7,100000 ; test err */
- 0254200377052, /* halt */
- 0254017000000, /* jrst 0(17) ; return */
+ INT64_C(0515040000001), /* boot:hrlzi 1,1 ; uba # */
+ INT64_C(0201000140001), /* movei 0,140001 ; vld,fst,pg 1 */
+ INT64_C(0715000000000)+(IOBA_UBMAP+1 & RMASK), /* iowrq 0,763001 ; set ubmap */
+ INT64_C(0435040000000)+(IOBA_RP & RMASK), /* iori 1,776700 ; rh addr */
+ INT64_C(0202040000000)+FE_RHBASE, /* movem 1,FE_RHBASE */
+ INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
+ INT64_C(0715001000010), /* iowrq 0,10(1) ; ->RPCS2 */
+ INT64_C(0201000000021), /* movei 0,21 ; preset */
+ INT64_C(0715001000000), /* iowrq 0,0(1) ; ->RPCS1 */
+ INT64_C(0201100000001), /* movei 2,1 ; blk #1 */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0204140001000), /* movs 3,1000 ; id word */
+ INT64_C(0306140505755), /* cain 3,sixbit /HOM/ */
+ INT64_C(0254000377023), /* jrst .+6 ; match */
+ INT64_C(0201100000010), /* movei 2,10 ; blk #10 */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0204140001000), /* movs 3,1000 ; id word */
+ INT64_C(0302140505755), /* caie 3,sixbit /HOM/ */
+ INT64_C(0254200377022), /* halt . ; inv home */
+ INT64_C(0336100001103), /* skipn 2,1103 ; pg of ptrs */
+ INT64_C(0254200377024), /* halt . ; inv ptr */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0336100001004), /* skipn 2,1004 ; mon boot */
+ INT64_C(0254200377027), /* halt . ; inv ptr */
+ INT64_C(0265740377032), /* jsp 17,rdbl ; read */
+ INT64_C(0254000001000), /* jrst 1000 ; start */
+ INT64_C(0201140176000), /* rdbl:movei 3,176000 ; wd cnt */
+ INT64_C(0201200004000), /* movei 4,4000 ; addr */
+ INT64_C(0200240000000)+FE_UNIT, /* move 5,FE_UNIT ; unit */
+ INT64_C(0200300000002), /* move 6,2 */
+ INT64_C(0242300777750), /* lsh 6,-24. ; cyl */
+ INT64_C(0715141000002), /* iowrq 3,2(1) ; ->RPWC */
+ INT64_C(0715201000004), /* iowrq 4,4(1) ; ->RPBA */
+ INT64_C(0715101000006), /* iowrq 2,6(1) ; ->RPDA */
+ INT64_C(0715241000010), /* iowrq 5,10(1) ; ->RPCS2 */
+ INT64_C(0715301000034), /* iowrq 6,34(1) ; ->RPDC */
+ INT64_C(0201000000071), /* movei 0,71 ; read+go */
+ INT64_C(0715001000000), /* iowrq 0,0(1) ; ->RPCS1 */
+ INT64_C(0711341000000), /* iordq 7,0(1) ; read csr */
+ INT64_C(0606340000200), /* trnn 7,200 ; test rdy */
+ INT64_C(0254000377046), /* jrst .-2 ; loop */
+ INT64_C(0602340100000), /* trne 7,100000 ; test err */
+ INT64_C(0254200377052), /* halt */
+ INT64_C(0254017000000), /* jrst 0(17) ; return */
};
t_stat rp_boot (int32 unitno, DEVICE *dptr)
diff --git a/PDP10/pdp10_sys.c b/PDP10/pdp10_sys.c
index 12a4b664..39c43a40 100644
--- a/PDP10/pdp10_sys.c
+++ b/PDP10/pdp10_sys.c
@@ -383,17 +383,17 @@ return SCPE_FMT;
#define I_V_FL 39 /* inst class */
#define I_M_FL 03 /* class mask */
-#define I_ITS 004000000000000 /* ITS flag */
-#define I_AC 000000000000000 /* AC, address */
-#define I_OP 010000000000000 /* address only */
-#define I_IO 020000000000000 /* classic I/O */
+#define I_ITS INT64_C(004000000000000) /* ITS flag */
+#define I_AC INT64_C(000000000000000) /* AC, address */
+#define I_OP INT64_C(010000000000000) /* address only */
+#define I_IO INT64_C(020000000000000) /* classic I/O */
#define I_V_AC 00
#define I_V_OP 01
#define I_V_IO 02
static const d10 masks[] = {
- 0777000000000, 0777740000000,
- 0700340000000, 0777777777777
+ INT64_C(0777000000000), INT64_C(0777740000000),
+ INT64_C(0700340000000), INT64_C(0777777777777)
};
static const char *opcode[] = {
@@ -501,171 +501,171 @@ NULL
};
static const d10 opc_val[] = {
- 0102000000000+I_AC+I_ITS, 0103000000000+I_AC+I_ITS,
- 0710000000000+I_AC+I_ITS, 0711000000000+I_AC+I_ITS, 0712000000000+I_AC+I_ITS,
- 0713000000000+I_AC+I_ITS, 0714000000000+I_AC+I_ITS, 0715000000000+I_AC+I_ITS,
- 0720000000000+I_AC+I_ITS, 0721000000000+I_AC+I_ITS, 0722000000000+I_AC+I_ITS,
- 0723000000000+I_AC+I_ITS, 0724000000000+I_AC+I_ITS, 0725000000000+I_AC+I_ITS,
- 0701000000000+I_OP+I_ITS, 0701440000000+I_OP+I_ITS, 0701540000000+I_OP+I_ITS,
- 0702000000000+I_OP+I_ITS, 0702040000000+I_OP+I_ITS,
- 0702100000000+I_OP+I_ITS, 0702140000000+I_OP+I_ITS, 0702340000000+I_OP+I_ITS,
- 0702400000000+I_OP+I_ITS, 0702440000000+I_OP+I_ITS,
- 0702500000000+I_OP+I_ITS, 0702540000000+I_OP+I_ITS, 0702740000000+I_OP+I_ITS,
+ INT64_C(0102000000000)+I_AC+I_ITS, INT64_C(0103000000000)+I_AC+I_ITS,
+ INT64_C(0710000000000)+I_AC+I_ITS, INT64_C(0711000000000)+I_AC+I_ITS, INT64_C(0712000000000)+I_AC+I_ITS,
+ INT64_C(0713000000000)+I_AC+I_ITS, INT64_C(0714000000000)+I_AC+I_ITS, INT64_C(0715000000000)+I_AC+I_ITS,
+ INT64_C(0720000000000)+I_AC+I_ITS, INT64_C(0721000000000)+I_AC+I_ITS, INT64_C(0722000000000)+I_AC+I_ITS,
+ INT64_C(0723000000000)+I_AC+I_ITS, INT64_C(0724000000000)+I_AC+I_ITS, INT64_C(0725000000000)+I_AC+I_ITS,
+ INT64_C(0701000000000)+I_OP+I_ITS, INT64_C(0701440000000)+I_OP+I_ITS, INT64_C(0701540000000)+I_OP+I_ITS,
+ INT64_C(0702000000000)+I_OP+I_ITS, INT64_C(0702040000000)+I_OP+I_ITS,
+ INT64_C(0702100000000)+I_OP+I_ITS, INT64_C(0702140000000)+I_OP+I_ITS, INT64_C(0702340000000)+I_OP+I_ITS,
+ INT64_C(0702400000000)+I_OP+I_ITS, INT64_C(0702440000000)+I_OP+I_ITS,
+ INT64_C(0702500000000)+I_OP+I_ITS, INT64_C(0702540000000)+I_OP+I_ITS, INT64_C(0702740000000)+I_OP+I_ITS,
- 0254040000000+I_OP, 0254100000000+I_OP,
- 0254200000000+I_OP, 0254240000000+I_OP, 0254300000000+I_OP, 0254340000000+I_OP,
- 0254500000000+I_OP, 0254600000000+I_OP, 0254640000000+I_OP, 0133000000000+I_OP,
- 0255040000000+I_OP, 0255100000000+I_OP, 0255200000000+I_OP, 0255300000000+I_OP,
- 0255400000000+I_OP,
+ INT64_C(0254040000000)+I_OP, INT64_C(0254100000000)+I_OP,
+ INT64_C(0254200000000)+I_OP, INT64_C(0254240000000)+I_OP, INT64_C(0254300000000)+I_OP, INT64_C(0254340000000)+I_OP,
+ INT64_C(0254500000000)+I_OP, INT64_C(0254600000000)+I_OP, INT64_C(0254640000000)+I_OP, INT64_C(0133000000000)+I_OP,
+ INT64_C(0255040000000)+I_OP, INT64_C(0255100000000)+I_OP, INT64_C(0255200000000)+I_OP, INT64_C(0255300000000)+I_OP,
+ INT64_C(0255400000000)+I_OP,
- 0700000000000+I_OP, 0700200000000+I_OP, 0700240000000+I_OP, 0700600000000+I_OP,
- 0700640000000+I_OP, 0701040000000+I_OP, 0701100000000+I_OP, 0701140000000+I_OP,
- 0701200000000+I_OP, 0701240000000+I_OP,
- 0702000000000+I_OP, 0702040000000+I_OP, 0702100000000+I_OP, 0702140000000+I_OP,
- 0702200000000+I_OP, 0702240000000+I_OP, 0702300000000+I_OP,
- 0702400000000+I_OP, 0702440000000+I_OP, 0702500000000+I_OP, 0702540000000+I_OP,
- 0702600000000+I_OP, 0702640000000+I_OP, 0702700000000+I_OP,
+ INT64_C(0700000000000)+I_OP, INT64_C(0700200000000)+I_OP, INT64_C(0700240000000)+I_OP, INT64_C(0700600000000)+I_OP,
+ INT64_C(0700640000000)+I_OP, INT64_C(0701040000000)+I_OP, INT64_C(0701100000000)+I_OP, INT64_C(0701140000000)+I_OP,
+ INT64_C(0701200000000)+I_OP, INT64_C(0701240000000)+I_OP,
+ INT64_C(0702000000000)+I_OP, INT64_C(0702040000000)+I_OP, INT64_C(0702100000000)+I_OP, INT64_C(0702140000000)+I_OP,
+ INT64_C(0702200000000)+I_OP, INT64_C(0702240000000)+I_OP, INT64_C(0702300000000)+I_OP,
+ INT64_C(0702400000000)+I_OP, INT64_C(0702440000000)+I_OP, INT64_C(0702500000000)+I_OP, INT64_C(0702540000000)+I_OP,
+ INT64_C(0702600000000)+I_OP, INT64_C(0702640000000)+I_OP, INT64_C(0702700000000)+I_OP,
- 0001000000000+I_AC, 0002000000000+I_AC, 0003000000000+I_AC,
- 0004000000000+I_AC, 0005000000000+I_AC, 0006000000000+I_AC, 0007000000000+I_AC,
- 0010000000000+I_AC, 0011000000000+I_AC, 0012000000000+I_AC, 0013000000000+I_AC,
- 0014000000000+I_AC, 0015000000000+I_AC, 0016000000000+I_AC, 0017000000000+I_AC,
- 0020000000000+I_AC, 0021000000000+I_AC, 0022000000000+I_AC, 0023000000000+I_AC,
- 0024000000000+I_AC, 0025000000000+I_AC, 0026000000000+I_AC, 0027000000000+I_AC,
- 0030000000000+I_AC, 0031000000000+I_AC, 0032000000000+I_AC, 0033000000000+I_AC,
- 0034000000000+I_AC, 0035000000000+I_AC, 0036000000000+I_AC, 0037000000000+I_AC,
- 0040000000000+I_AC, 0041000000000+I_AC, 0042000000000+I_AC, 0043000000000+I_AC,
- 0044000000000+I_AC, 0045000000000+I_AC, 0046000000000+I_AC, 0047000000000+I_AC,
- 0050000000000+I_AC, 0051000000000+I_AC, 0052000000000+I_AC, 0053000000000+I_AC,
- 0054000000000+I_AC, 0055000000000+I_AC, 0056000000000+I_AC, 0057000000000+I_AC,
- 0060000000000+I_AC, 0061000000000+I_AC, 0062000000000+I_AC, 0063000000000+I_AC,
- 0064000000000+I_AC, 0065000000000+I_AC, 0066000000000+I_AC, 0067000000000+I_AC,
- 0070000000000+I_AC, 0071000000000+I_AC, 0072000000000+I_AC, 0073000000000+I_AC,
- 0074000000000+I_AC, 0075000000000+I_AC, 0076000000000+I_AC, 0077000000000+I_AC,
+ INT64_C(0001000000000)+I_AC, INT64_C(0002000000000)+I_AC, INT64_C(0003000000000)+I_AC,
+ INT64_C(0004000000000)+I_AC, INT64_C(0005000000000)+I_AC, INT64_C(0006000000000)+I_AC, INT64_C(0007000000000)+I_AC,
+ INT64_C(0010000000000)+I_AC, INT64_C(0011000000000)+I_AC, INT64_C(0012000000000)+I_AC, INT64_C(0013000000000)+I_AC,
+ INT64_C(0014000000000)+I_AC, INT64_C(0015000000000)+I_AC, INT64_C(0016000000000)+I_AC, INT64_C(0017000000000)+I_AC,
+ INT64_C(0020000000000)+I_AC, INT64_C(0021000000000)+I_AC, INT64_C(0022000000000)+I_AC, INT64_C(0023000000000)+I_AC,
+ INT64_C(0024000000000)+I_AC, INT64_C(0025000000000)+I_AC, INT64_C(0026000000000)+I_AC, INT64_C(0027000000000)+I_AC,
+ INT64_C(0030000000000)+I_AC, INT64_C(0031000000000)+I_AC, INT64_C(0032000000000)+I_AC, INT64_C(0033000000000)+I_AC,
+ INT64_C(0034000000000)+I_AC, INT64_C(0035000000000)+I_AC, INT64_C(0036000000000)+I_AC, INT64_C(0037000000000)+I_AC,
+ INT64_C(0040000000000)+I_AC, INT64_C(0041000000000)+I_AC, INT64_C(0042000000000)+I_AC, INT64_C(0043000000000)+I_AC,
+ INT64_C(0044000000000)+I_AC, INT64_C(0045000000000)+I_AC, INT64_C(0046000000000)+I_AC, INT64_C(0047000000000)+I_AC,
+ INT64_C(0050000000000)+I_AC, INT64_C(0051000000000)+I_AC, INT64_C(0052000000000)+I_AC, INT64_C(0053000000000)+I_AC,
+ INT64_C(0054000000000)+I_AC, INT64_C(0055000000000)+I_AC, INT64_C(0056000000000)+I_AC, INT64_C(0057000000000)+I_AC,
+ INT64_C(0060000000000)+I_AC, INT64_C(0061000000000)+I_AC, INT64_C(0062000000000)+I_AC, INT64_C(0063000000000)+I_AC,
+ INT64_C(0064000000000)+I_AC, INT64_C(0065000000000)+I_AC, INT64_C(0066000000000)+I_AC, INT64_C(0067000000000)+I_AC,
+ INT64_C(0070000000000)+I_AC, INT64_C(0071000000000)+I_AC, INT64_C(0072000000000)+I_AC, INT64_C(0073000000000)+I_AC,
+ INT64_C(0074000000000)+I_AC, INT64_C(0075000000000)+I_AC, INT64_C(0076000000000)+I_AC, INT64_C(0077000000000)+I_AC,
- 0100000000000+I_AC, 0102000000000+I_AC, 0103000000000+I_AC,
- 0104000000000+I_AC, 0105000000000+I_AC, 0106000000000+I_AC, 0107000000000+I_AC,
- 0110000000000+I_AC, 0111000000000+I_AC, 0112000000000+I_AC, 0113000000000+I_AC,
- 0114000000000+I_AC, 0115000000000+I_AC, 0116000000000+I_AC, 0117000000000+I_AC,
- 0120000000000+I_AC, 0121000000000+I_AC, 0122000000000+I_AC, 0123000000000+I_AC,
- 0124000000000+I_AC, 0125000000000+I_AC, 0126000000000+I_AC, 0127000000000+I_AC,
- 0130000000000+I_AC, 0131000000000+I_AC, 0132000000000+I_AC, 0133000000000+I_AC,
- 0134000000000+I_AC, 0135000000000+I_AC, 0136000000000+I_AC, 0137000000000+I_AC,
- 0140000000000+I_AC, 0141000000000+I_AC, 0142000000000+I_AC, 0143000000000+I_AC,
- 0144000000000+I_AC, 0145000000000+I_AC, 0146000000000+I_AC, 0147000000000+I_AC,
- 0150000000000+I_AC, 0151000000000+I_AC, 0152000000000+I_AC, 0153000000000+I_AC,
- 0154000000000+I_AC, 0155000000000+I_AC, 0156000000000+I_AC, 0157000000000+I_AC,
- 0160000000000+I_AC, 0161000000000+I_AC, 0162000000000+I_AC, 0163000000000+I_AC,
- 0164000000000+I_AC, 0165000000000+I_AC, 0166000000000+I_AC, 0167000000000+I_AC,
- 0170000000000+I_AC, 0171000000000+I_AC, 0172000000000+I_AC, 0173000000000+I_AC,
- 0174000000000+I_AC, 0175000000000+I_AC, 0176000000000+I_AC, 0177000000000+I_AC,
+ INT64_C(0100000000000)+I_AC, INT64_C(0102000000000)+I_AC, INT64_C(0103000000000)+I_AC,
+ INT64_C(0104000000000)+I_AC, INT64_C(0105000000000)+I_AC, INT64_C(0106000000000)+I_AC, INT64_C(0107000000000)+I_AC,
+ INT64_C(0110000000000)+I_AC, INT64_C(0111000000000)+I_AC, INT64_C(0112000000000)+I_AC, INT64_C(0113000000000)+I_AC,
+ INT64_C(0114000000000)+I_AC, INT64_C(0115000000000)+I_AC, INT64_C(0116000000000)+I_AC, INT64_C(0117000000000)+I_AC,
+ INT64_C(0120000000000)+I_AC, INT64_C(0121000000000)+I_AC, INT64_C(0122000000000)+I_AC, INT64_C(0123000000000)+I_AC,
+ INT64_C(0124000000000)+I_AC, INT64_C(0125000000000)+I_AC, INT64_C(0126000000000)+I_AC, INT64_C(0127000000000)+I_AC,
+ INT64_C(0130000000000)+I_AC, INT64_C(0131000000000)+I_AC, INT64_C(0132000000000)+I_AC, INT64_C(0133000000000)+I_AC,
+ INT64_C(0134000000000)+I_AC, INT64_C(0135000000000)+I_AC, INT64_C(0136000000000)+I_AC, INT64_C(0137000000000)+I_AC,
+ INT64_C(0140000000000)+I_AC, INT64_C(0141000000000)+I_AC, INT64_C(0142000000000)+I_AC, INT64_C(0143000000000)+I_AC,
+ INT64_C(0144000000000)+I_AC, INT64_C(0145000000000)+I_AC, INT64_C(0146000000000)+I_AC, INT64_C(0147000000000)+I_AC,
+ INT64_C(0150000000000)+I_AC, INT64_C(0151000000000)+I_AC, INT64_C(0152000000000)+I_AC, INT64_C(0153000000000)+I_AC,
+ INT64_C(0154000000000)+I_AC, INT64_C(0155000000000)+I_AC, INT64_C(0156000000000)+I_AC, INT64_C(0157000000000)+I_AC,
+ INT64_C(0160000000000)+I_AC, INT64_C(0161000000000)+I_AC, INT64_C(0162000000000)+I_AC, INT64_C(0163000000000)+I_AC,
+ INT64_C(0164000000000)+I_AC, INT64_C(0165000000000)+I_AC, INT64_C(0166000000000)+I_AC, INT64_C(0167000000000)+I_AC,
+ INT64_C(0170000000000)+I_AC, INT64_C(0171000000000)+I_AC, INT64_C(0172000000000)+I_AC, INT64_C(0173000000000)+I_AC,
+ INT64_C(0174000000000)+I_AC, INT64_C(0175000000000)+I_AC, INT64_C(0176000000000)+I_AC, INT64_C(0177000000000)+I_AC,
- 0200000000000+I_AC, 0201000000000+I_AC, 0202000000000+I_AC, 0203000000000+I_AC,
- 0204000000000+I_AC, 0205000000000+I_AC, 0206000000000+I_AC, 0207000000000+I_AC,
- 0210000000000+I_AC, 0211000000000+I_AC, 0212000000000+I_AC, 0213000000000+I_AC,
- 0214000000000+I_AC, 0215000000000+I_AC, 0216000000000+I_AC, 0217000000000+I_AC,
- 0220000000000+I_AC, 0221000000000+I_AC, 0222000000000+I_AC, 0223000000000+I_AC,
- 0224000000000+I_AC, 0225000000000+I_AC, 0226000000000+I_AC, 0227000000000+I_AC,
- 0230000000000+I_AC, 0231000000000+I_AC, 0232000000000+I_AC, 0233000000000+I_AC,
- 0234000000000+I_AC, 0235000000000+I_AC, 0236000000000+I_AC, 0237000000000+I_AC,
- 0240000000000+I_AC, 0241000000000+I_AC, 0242000000000+I_AC, 0243000000000+I_AC,
- 0244000000000+I_AC, 0245000000000+I_AC, 0246000000000+I_AC, 0247000000000+I_AC+I_ITS,
- 0250000000000+I_AC, 0251000000000+I_AC, 0252000000000+I_AC, 0253000000000+I_AC,
- 0254000000000+I_AC, 0255000000000+I_AC, 0256000000000+I_AC, 0257000000000+I_AC,
- 0260000000000+I_AC, 0261000000000+I_AC, 0262000000000+I_AC, 0263000000000+I_AC,
- 0264000000000+I_AC, 0265000000000+I_AC, 0266000000000+I_AC, 0267000000000+I_AC,
- 0270000000000+I_AC, 0271000000000+I_AC, 0272000000000+I_AC, 0273000000000+I_AC,
- 0274000000000+I_AC, 0275000000000+I_AC, 0276000000000+I_AC, 0277000000000+I_AC,
+ INT64_C(0200000000000)+I_AC, INT64_C(0201000000000)+I_AC, INT64_C(0202000000000)+I_AC, INT64_C(0203000000000)+I_AC,
+ INT64_C(0204000000000)+I_AC, INT64_C(0205000000000)+I_AC, INT64_C(0206000000000)+I_AC, INT64_C(0207000000000)+I_AC,
+ INT64_C(0210000000000)+I_AC, INT64_C(0211000000000)+I_AC, INT64_C(0212000000000)+I_AC, INT64_C(0213000000000)+I_AC,
+ INT64_C(0214000000000)+I_AC, INT64_C(0215000000000)+I_AC, INT64_C(0216000000000)+I_AC, INT64_C(0217000000000)+I_AC,
+ INT64_C(0220000000000)+I_AC, INT64_C(0221000000000)+I_AC, INT64_C(0222000000000)+I_AC, INT64_C(0223000000000)+I_AC,
+ INT64_C(0224000000000)+I_AC, INT64_C(0225000000000)+I_AC, INT64_C(0226000000000)+I_AC, INT64_C(0227000000000)+I_AC,
+ INT64_C(0230000000000)+I_AC, INT64_C(0231000000000)+I_AC, INT64_C(0232000000000)+I_AC, INT64_C(0233000000000)+I_AC,
+ INT64_C(0234000000000)+I_AC, INT64_C(0235000000000)+I_AC, INT64_C(0236000000000)+I_AC, INT64_C(0237000000000)+I_AC,
+ INT64_C(0240000000000)+I_AC, INT64_C(0241000000000)+I_AC, INT64_C(0242000000000)+I_AC, INT64_C(0243000000000)+I_AC,
+ INT64_C(0244000000000)+I_AC, INT64_C(0245000000000)+I_AC, INT64_C(0246000000000)+I_AC, INT64_C(0247000000000)+I_AC+I_ITS,
+ INT64_C(0250000000000)+I_AC, INT64_C(0251000000000)+I_AC, INT64_C(0252000000000)+I_AC, INT64_C(0253000000000)+I_AC,
+ INT64_C(0254000000000)+I_AC, INT64_C(0255000000000)+I_AC, INT64_C(0256000000000)+I_AC, INT64_C(0257000000000)+I_AC,
+ INT64_C(0260000000000)+I_AC, INT64_C(0261000000000)+I_AC, INT64_C(0262000000000)+I_AC, INT64_C(0263000000000)+I_AC,
+ INT64_C(0264000000000)+I_AC, INT64_C(0265000000000)+I_AC, INT64_C(0266000000000)+I_AC, INT64_C(0267000000000)+I_AC,
+ INT64_C(0270000000000)+I_AC, INT64_C(0271000000000)+I_AC, INT64_C(0272000000000)+I_AC, INT64_C(0273000000000)+I_AC,
+ INT64_C(0274000000000)+I_AC, INT64_C(0275000000000)+I_AC, INT64_C(0276000000000)+I_AC, INT64_C(0277000000000)+I_AC,
- 0300000000000+I_AC, 0301000000000+I_AC, 0302000000000+I_AC, 0303000000000+I_AC,
- 0304000000000+I_AC, 0305000000000+I_AC, 0306000000000+I_AC, 0307000000000+I_AC,
- 0310000000000+I_AC, 0311000000000+I_AC, 0312000000000+I_AC, 0313000000000+I_AC,
- 0314000000000+I_AC, 0315000000000+I_AC, 0316000000000+I_AC, 0317000000000+I_AC,
- 0320000000000+I_AC, 0321000000000+I_AC, 0322000000000+I_AC, 0323000000000+I_AC,
- 0324000000000+I_AC, 0325000000000+I_AC, 0326000000000+I_AC, 0327000000000+I_AC,
- 0330000000000+I_AC, 0331000000000+I_AC, 0332000000000+I_AC, 0333000000000+I_AC,
- 0334000000000+I_AC, 0335000000000+I_AC, 0336000000000+I_AC, 0337000000000+I_AC,
- 0340000000000+I_AC, 0341000000000+I_AC, 0342000000000+I_AC, 0343000000000+I_AC,
- 0344000000000+I_AC, 0345000000000+I_AC, 0346000000000+I_AC, 0347000000000+I_AC,
- 0350000000000+I_AC, 0351000000000+I_AC, 0352000000000+I_AC, 0353000000000+I_AC,
- 0354000000000+I_AC, 0355000000000+I_AC, 0356000000000+I_AC, 0357000000000+I_AC,
- 0360000000000+I_AC, 0361000000000+I_AC, 0362000000000+I_AC, 0363000000000+I_AC,
- 0364000000000+I_AC, 0365000000000+I_AC, 0366000000000+I_AC, 0367000000000+I_AC,
- 0370000000000+I_AC, 0371000000000+I_AC, 0372000000000+I_AC, 0373000000000+I_AC,
- 0374000000000+I_AC, 0375000000000+I_AC, 0376000000000+I_AC, 0377000000000+I_AC,
+ INT64_C(0300000000000)+I_AC, INT64_C(0301000000000)+I_AC, INT64_C(0302000000000)+I_AC, INT64_C(0303000000000)+I_AC,
+ INT64_C(0304000000000)+I_AC, INT64_C(0305000000000)+I_AC, INT64_C(0306000000000)+I_AC, INT64_C(0307000000000)+I_AC,
+ INT64_C(0310000000000)+I_AC, INT64_C(0311000000000)+I_AC, INT64_C(0312000000000)+I_AC, INT64_C(0313000000000)+I_AC,
+ INT64_C(0314000000000)+I_AC, INT64_C(0315000000000)+I_AC, INT64_C(0316000000000)+I_AC, INT64_C(0317000000000)+I_AC,
+ INT64_C(0320000000000)+I_AC, INT64_C(0321000000000)+I_AC, INT64_C(0322000000000)+I_AC, INT64_C(0323000000000)+I_AC,
+ INT64_C(0324000000000)+I_AC, INT64_C(0325000000000)+I_AC, INT64_C(0326000000000)+I_AC, INT64_C(0327000000000)+I_AC,
+ INT64_C(0330000000000)+I_AC, INT64_C(0331000000000)+I_AC, INT64_C(0332000000000)+I_AC, INT64_C(0333000000000)+I_AC,
+ INT64_C(0334000000000)+I_AC, INT64_C(0335000000000)+I_AC, INT64_C(0336000000000)+I_AC, INT64_C(0337000000000)+I_AC,
+ INT64_C(0340000000000)+I_AC, INT64_C(0341000000000)+I_AC, INT64_C(0342000000000)+I_AC, INT64_C(0343000000000)+I_AC,
+ INT64_C(0344000000000)+I_AC, INT64_C(0345000000000)+I_AC, INT64_C(0346000000000)+I_AC, INT64_C(0347000000000)+I_AC,
+ INT64_C(0350000000000)+I_AC, INT64_C(0351000000000)+I_AC, INT64_C(0352000000000)+I_AC, INT64_C(0353000000000)+I_AC,
+ INT64_C(0354000000000)+I_AC, INT64_C(0355000000000)+I_AC, INT64_C(0356000000000)+I_AC, INT64_C(0357000000000)+I_AC,
+ INT64_C(0360000000000)+I_AC, INT64_C(0361000000000)+I_AC, INT64_C(0362000000000)+I_AC, INT64_C(0363000000000)+I_AC,
+ INT64_C(0364000000000)+I_AC, INT64_C(0365000000000)+I_AC, INT64_C(0366000000000)+I_AC, INT64_C(0367000000000)+I_AC,
+ INT64_C(0370000000000)+I_AC, INT64_C(0371000000000)+I_AC, INT64_C(0372000000000)+I_AC, INT64_C(0373000000000)+I_AC,
+ INT64_C(0374000000000)+I_AC, INT64_C(0375000000000)+I_AC, INT64_C(0376000000000)+I_AC, INT64_C(0377000000000)+I_AC,
- 0400000000000+I_AC, 0401000000000+I_AC, 0402000000000+I_AC, 0403000000000+I_AC,
- 0404000000000+I_AC, 0405000000000+I_AC, 0406000000000+I_AC, 0407000000000+I_AC,
- 0410000000000+I_AC, 0411000000000+I_AC, 0412000000000+I_AC, 0413000000000+I_AC,
- 0414000000000+I_AC, 0415000000000+I_AC, 0416000000000+I_AC, 0417000000000+I_AC,
- 0420000000000+I_AC, 0421000000000+I_AC, 0422000000000+I_AC, 0423000000000+I_AC,
- 0424000000000+I_AC, 0425000000000+I_AC, 0426000000000+I_AC, 0427000000000+I_AC,
- 0430000000000+I_AC, 0431000000000+I_AC, 0432000000000+I_AC, 0433000000000+I_AC,
- 0434000000000+I_AC, 0435000000000+I_AC, 0436000000000+I_AC, 0437000000000+I_AC,
- 0440000000000+I_AC, 0441000000000+I_AC, 0442000000000+I_AC, 0443000000000+I_AC,
- 0444000000000+I_AC, 0445000000000+I_AC, 0446000000000+I_AC, 0447000000000+I_AC,
- 0450000000000+I_AC, 0451000000000+I_AC, 0452000000000+I_AC, 0453000000000+I_AC,
- 0454000000000+I_AC, 0455000000000+I_AC, 0456000000000+I_AC, 0457000000000+I_AC,
- 0460000000000+I_AC, 0461000000000+I_AC, 0462000000000+I_AC, 0463000000000+I_AC,
- 0464000000000+I_AC, 0465000000000+I_AC, 0466000000000+I_AC, 0467000000000+I_AC,
- 0470000000000+I_AC, 0471000000000+I_AC, 0472000000000+I_AC, 0473000000000+I_AC,
- 0474000000000+I_AC, 0475000000000+I_AC, 0476000000000+I_AC, 0477000000000+I_AC,
+ INT64_C(0400000000000)+I_AC, INT64_C(0401000000000)+I_AC, INT64_C(0402000000000)+I_AC, INT64_C(0403000000000)+I_AC,
+ INT64_C(0404000000000)+I_AC, INT64_C(0405000000000)+I_AC, INT64_C(0406000000000)+I_AC, INT64_C(0407000000000)+I_AC,
+ INT64_C(0410000000000)+I_AC, INT64_C(0411000000000)+I_AC, INT64_C(0412000000000)+I_AC, INT64_C(0413000000000)+I_AC,
+ INT64_C(0414000000000)+I_AC, INT64_C(0415000000000)+I_AC, INT64_C(0416000000000)+I_AC, INT64_C(0417000000000)+I_AC,
+ INT64_C(0420000000000)+I_AC, INT64_C(0421000000000)+I_AC, INT64_C(0422000000000)+I_AC, INT64_C(0423000000000)+I_AC,
+ INT64_C(0424000000000)+I_AC, INT64_C(0425000000000)+I_AC, INT64_C(0426000000000)+I_AC, INT64_C(0427000000000)+I_AC,
+ INT64_C(0430000000000)+I_AC, INT64_C(0431000000000)+I_AC, INT64_C(0432000000000)+I_AC, INT64_C(0433000000000)+I_AC,
+ INT64_C(0434000000000)+I_AC, INT64_C(0435000000000)+I_AC, INT64_C(0436000000000)+I_AC, INT64_C(0437000000000)+I_AC,
+ INT64_C(0440000000000)+I_AC, INT64_C(0441000000000)+I_AC, INT64_C(0442000000000)+I_AC, INT64_C(0443000000000)+I_AC,
+ INT64_C(0444000000000)+I_AC, INT64_C(0445000000000)+I_AC, INT64_C(0446000000000)+I_AC, INT64_C(0447000000000)+I_AC,
+ INT64_C(0450000000000)+I_AC, INT64_C(0451000000000)+I_AC, INT64_C(0452000000000)+I_AC, INT64_C(0453000000000)+I_AC,
+ INT64_C(0454000000000)+I_AC, INT64_C(0455000000000)+I_AC, INT64_C(0456000000000)+I_AC, INT64_C(0457000000000)+I_AC,
+ INT64_C(0460000000000)+I_AC, INT64_C(0461000000000)+I_AC, INT64_C(0462000000000)+I_AC, INT64_C(0463000000000)+I_AC,
+ INT64_C(0464000000000)+I_AC, INT64_C(0465000000000)+I_AC, INT64_C(0466000000000)+I_AC, INT64_C(0467000000000)+I_AC,
+ INT64_C(0470000000000)+I_AC, INT64_C(0471000000000)+I_AC, INT64_C(0472000000000)+I_AC, INT64_C(0473000000000)+I_AC,
+ INT64_C(0474000000000)+I_AC, INT64_C(0475000000000)+I_AC, INT64_C(0476000000000)+I_AC, INT64_C(0477000000000)+I_AC,
- 0500000000000+I_AC, 0501000000000+I_AC, 0502000000000+I_AC, 0503000000000+I_AC,
- 0504000000000+I_AC, 0505000000000+I_AC, 0506000000000+I_AC, 0507000000000+I_AC,
- 0510000000000+I_AC, 0511000000000+I_AC, 0512000000000+I_AC, 0513000000000+I_AC,
- 0514000000000+I_AC, 0515000000000+I_AC, 0516000000000+I_AC, 0517000000000+I_AC,
- 0520000000000+I_AC, 0521000000000+I_AC, 0522000000000+I_AC, 0523000000000+I_AC,
- 0524000000000+I_AC, 0525000000000+I_AC, 0526000000000+I_AC, 0527000000000+I_AC,
- 0530000000000+I_AC, 0531000000000+I_AC, 0532000000000+I_AC, 0533000000000+I_AC,
- 0534000000000+I_AC, 0535000000000+I_AC, 0536000000000+I_AC, 0537000000000+I_AC,
- 0540000000000+I_AC, 0541000000000+I_AC, 0542000000000+I_AC, 0543000000000+I_AC,
- 0544000000000+I_AC, 0545000000000+I_AC, 0546000000000+I_AC, 0547000000000+I_AC,
- 0550000000000+I_AC, 0551000000000+I_AC, 0552000000000+I_AC, 0553000000000+I_AC,
- 0554000000000+I_AC, 0555000000000+I_AC, 0556000000000+I_AC, 0557000000000+I_AC,
- 0560000000000+I_AC, 0561000000000+I_AC, 0562000000000+I_AC, 0563000000000+I_AC,
- 0564000000000+I_AC, 0565000000000+I_AC, 0566000000000+I_AC, 0567000000000+I_AC,
- 0570000000000+I_AC, 0571000000000+I_AC, 0572000000000+I_AC, 0573000000000+I_AC,
- 0574000000000+I_AC, 0575000000000+I_AC, 0576000000000+I_AC, 0577000000000+I_AC,
+ INT64_C(0500000000000)+I_AC, INT64_C(0501000000000)+I_AC, INT64_C(0502000000000)+I_AC, INT64_C(0503000000000)+I_AC,
+ INT64_C(0504000000000)+I_AC, INT64_C(0505000000000)+I_AC, INT64_C(0506000000000)+I_AC, INT64_C(0507000000000)+I_AC,
+ INT64_C(0510000000000)+I_AC, INT64_C(0511000000000)+I_AC, INT64_C(0512000000000)+I_AC, INT64_C(0513000000000)+I_AC,
+ INT64_C(0514000000000)+I_AC, INT64_C(0515000000000)+I_AC, INT64_C(0516000000000)+I_AC, INT64_C(0517000000000)+I_AC,
+ INT64_C(0520000000000)+I_AC, INT64_C(0521000000000)+I_AC, INT64_C(0522000000000)+I_AC, INT64_C(0523000000000)+I_AC,
+ INT64_C(0524000000000)+I_AC, INT64_C(0525000000000)+I_AC, INT64_C(0526000000000)+I_AC, INT64_C(0527000000000)+I_AC,
+ INT64_C(0530000000000)+I_AC, INT64_C(0531000000000)+I_AC, INT64_C(0532000000000)+I_AC, INT64_C(0533000000000)+I_AC,
+ INT64_C(0534000000000)+I_AC, INT64_C(0535000000000)+I_AC, INT64_C(0536000000000)+I_AC, INT64_C(0537000000000)+I_AC,
+ INT64_C(0540000000000)+I_AC, INT64_C(0541000000000)+I_AC, INT64_C(0542000000000)+I_AC, INT64_C(0543000000000)+I_AC,
+ INT64_C(0544000000000)+I_AC, INT64_C(0545000000000)+I_AC, INT64_C(0546000000000)+I_AC, INT64_C(0547000000000)+I_AC,
+ INT64_C(0550000000000)+I_AC, INT64_C(0551000000000)+I_AC, INT64_C(0552000000000)+I_AC, INT64_C(0553000000000)+I_AC,
+ INT64_C(0554000000000)+I_AC, INT64_C(0555000000000)+I_AC, INT64_C(0556000000000)+I_AC, INT64_C(0557000000000)+I_AC,
+ INT64_C(0560000000000)+I_AC, INT64_C(0561000000000)+I_AC, INT64_C(0562000000000)+I_AC, INT64_C(0563000000000)+I_AC,
+ INT64_C(0564000000000)+I_AC, INT64_C(0565000000000)+I_AC, INT64_C(0566000000000)+I_AC, INT64_C(0567000000000)+I_AC,
+ INT64_C(0570000000000)+I_AC, INT64_C(0571000000000)+I_AC, INT64_C(0572000000000)+I_AC, INT64_C(0573000000000)+I_AC,
+ INT64_C(0574000000000)+I_AC, INT64_C(0575000000000)+I_AC, INT64_C(0576000000000)+I_AC, INT64_C(0577000000000)+I_AC,
- 0600000000000+I_AC, 0601000000000+I_AC, 0602000000000+I_AC, 0603000000000+I_AC,
- 0604000000000+I_AC, 0605000000000+I_AC, 0606000000000+I_AC, 0607000000000+I_AC,
- 0610000000000+I_AC, 0611000000000+I_AC, 0612000000000+I_AC, 0613000000000+I_AC,
- 0614000000000+I_AC, 0615000000000+I_AC, 0616000000000+I_AC, 0617000000000+I_AC,
- 0620000000000+I_AC, 0621000000000+I_AC, 0622000000000+I_AC, 0623000000000+I_AC,
- 0624000000000+I_AC, 0625000000000+I_AC, 0626000000000+I_AC, 0627000000000+I_AC,
- 0630000000000+I_AC, 0631000000000+I_AC, 0632000000000+I_AC, 0633000000000+I_AC,
- 0634000000000+I_AC, 0635000000000+I_AC, 0636000000000+I_AC, 0637000000000+I_AC,
- 0640000000000+I_AC, 0641000000000+I_AC, 0642000000000+I_AC, 0643000000000+I_AC,
- 0644000000000+I_AC, 0645000000000+I_AC, 0646000000000+I_AC, 0647000000000+I_AC,
- 0650000000000+I_AC, 0651000000000+I_AC, 0652000000000+I_AC, 0653000000000+I_AC,
- 0654000000000+I_AC, 0655000000000+I_AC, 0656000000000+I_AC, 0657000000000+I_AC,
- 0660000000000+I_AC, 0661000000000+I_AC, 0662000000000+I_AC, 0663000000000+I_AC,
- 0664000000000+I_AC, 0665000000000+I_AC, 0666000000000+I_AC, 0667000000000+I_AC,
- 0670000000000+I_AC, 0671000000000+I_AC, 0672000000000+I_AC, 0673000000000+I_AC,
- 0674000000000+I_AC, 0675000000000+I_AC, 0676000000000+I_AC, 0677000000000+I_AC,
+ INT64_C(0600000000000)+I_AC, INT64_C(0601000000000)+I_AC, INT64_C(0602000000000)+I_AC, INT64_C(0603000000000)+I_AC,
+ INT64_C(0604000000000)+I_AC, INT64_C(0605000000000)+I_AC, INT64_C(0606000000000)+I_AC, INT64_C(0607000000000)+I_AC,
+ INT64_C(0610000000000)+I_AC, INT64_C(0611000000000)+I_AC, INT64_C(0612000000000)+I_AC, INT64_C(0613000000000)+I_AC,
+ INT64_C(0614000000000)+I_AC, INT64_C(0615000000000)+I_AC, INT64_C(0616000000000)+I_AC, INT64_C(0617000000000)+I_AC,
+ INT64_C(0620000000000)+I_AC, INT64_C(0621000000000)+I_AC, INT64_C(0622000000000)+I_AC, INT64_C(0623000000000)+I_AC,
+ INT64_C(0624000000000)+I_AC, INT64_C(0625000000000)+I_AC, INT64_C(0626000000000)+I_AC, INT64_C(0627000000000)+I_AC,
+ INT64_C(0630000000000)+I_AC, INT64_C(0631000000000)+I_AC, INT64_C(0632000000000)+I_AC, INT64_C(0633000000000)+I_AC,
+ INT64_C(0634000000000)+I_AC, INT64_C(0635000000000)+I_AC, INT64_C(0636000000000)+I_AC, INT64_C(0637000000000)+I_AC,
+ INT64_C(0640000000000)+I_AC, INT64_C(0641000000000)+I_AC, INT64_C(0642000000000)+I_AC, INT64_C(0643000000000)+I_AC,
+ INT64_C(0644000000000)+I_AC, INT64_C(0645000000000)+I_AC, INT64_C(0646000000000)+I_AC, INT64_C(0647000000000)+I_AC,
+ INT64_C(0650000000000)+I_AC, INT64_C(0651000000000)+I_AC, INT64_C(0652000000000)+I_AC, INT64_C(0653000000000)+I_AC,
+ INT64_C(0654000000000)+I_AC, INT64_C(0655000000000)+I_AC, INT64_C(0656000000000)+I_AC, INT64_C(0657000000000)+I_AC,
+ INT64_C(0660000000000)+I_AC, INT64_C(0661000000000)+I_AC, INT64_C(0662000000000)+I_AC, INT64_C(0663000000000)+I_AC,
+ INT64_C(0664000000000)+I_AC, INT64_C(0665000000000)+I_AC, INT64_C(0666000000000)+I_AC, INT64_C(0667000000000)+I_AC,
+ INT64_C(0670000000000)+I_AC, INT64_C(0671000000000)+I_AC, INT64_C(0672000000000)+I_AC, INT64_C(0673000000000)+I_AC,
+ INT64_C(0674000000000)+I_AC, INT64_C(0675000000000)+I_AC, INT64_C(0676000000000)+I_AC, INT64_C(0677000000000)+I_AC,
- 0704000000000+I_AC, 0705000000000+I_AC,
- 0710000000000+I_AC, 0711000000000+I_AC, 0712000000000+I_AC, 0713000000000+I_AC,
- 0714000000000+I_AC, 0715000000000+I_AC, 0716000000000+I_AC, 0717000000000+I_AC,
- 0720000000000+I_AC, 0721000000000+I_AC, 0722000000000+I_AC, 0723000000000+I_AC,
- 0724000000000+I_AC, 0725000000000+I_AC,
+ INT64_C(0704000000000)+I_AC, INT64_C(0705000000000)+I_AC,
+ INT64_C(0710000000000)+I_AC, INT64_C(0711000000000)+I_AC, INT64_C(0712000000000)+I_AC, INT64_C(0713000000000)+I_AC,
+ INT64_C(0714000000000)+I_AC, INT64_C(0715000000000)+I_AC, INT64_C(0716000000000)+I_AC, INT64_C(0717000000000)+I_AC,
+ INT64_C(0720000000000)+I_AC, INT64_C(0721000000000)+I_AC, INT64_C(0722000000000)+I_AC, INT64_C(0723000000000)+I_AC,
+ INT64_C(0724000000000)+I_AC, INT64_C(0725000000000)+I_AC,
- 0700000000000+I_IO, 0700040000000+I_IO, 0700100000000+I_IO, 0700140000000+I_IO,
- 0700200000000+I_IO, 0700240000000+I_IO, 0700300000000+I_IO, 0700340000000+I_IO,
+ INT64_C(0700000000000)+I_IO, INT64_C(0700040000000)+I_IO, INT64_C(0700100000000)+I_IO, INT64_C(0700140000000)+I_IO,
+ INT64_C(0700200000000)+I_IO, INT64_C(0700240000000)+I_IO, INT64_C(0700300000000)+I_IO, INT64_C(0700340000000)+I_IO,
- 0400000000000+I_AC, 0401000000000+I_AC, 0402000000000+I_AC, 0403000000000+I_AC,
- 0434000000000+I_AC, 0435000000000+I_AC, 0436000000000+I_AC, 0437000000000+I_AC,
- 0415000000000+I_AC, 0501000000000+I_AC,
+ INT64_C(0400000000000)+I_AC, INT64_C(0401000000000)+I_AC, INT64_C(0402000000000)+I_AC, INT64_C(0403000000000)+I_AC,
+ INT64_C(0434000000000)+I_AC, INT64_C(0435000000000)+I_AC, INT64_C(0436000000000)+I_AC, INT64_C(0437000000000)+I_AC,
+ INT64_C(0415000000000)+I_AC, INT64_C(0501000000000)+I_AC,
- 0001000000000+I_AC, 0002000000000+I_AC, 0003000000000+I_AC,
- 0004000000000+I_AC, 0005000000000+I_AC, 0006000000000+I_AC, 0007000000000+I_AC,
- 0010000000000+I_AC, 0011000000000+I_AC, 0012000000000+I_AC, 0013000000000+I_AC,
- 0014000000000+I_AC, 0015000000000+I_AC, 0016000000000+I_AC, 0017000000000+I_AC,
- 0020000000000+I_AC, 0021000000000+I_AC, 0022000000000+I_AC, 0023000000000+I_AC,
- 0024000000000+I_AC, 0025000000000+I_AC, 0026000000000+I_AC, 0027000000000+I_AC,
- 0030000000000+I_AC, 0031000000000+I_AC,
- -1
+ INT64_C(0001000000000)+I_AC, INT64_C(0002000000000)+I_AC, INT64_C(0003000000000)+I_AC,
+ INT64_C(0004000000000)+I_AC, INT64_C(0005000000000)+I_AC, INT64_C(0006000000000)+I_AC, INT64_C(0007000000000)+I_AC,
+ INT64_C(0010000000000)+I_AC, INT64_C(0011000000000)+I_AC, INT64_C(0012000000000)+I_AC, INT64_C(0013000000000)+I_AC,
+ INT64_C(0014000000000)+I_AC, INT64_C(0015000000000)+I_AC, INT64_C(0016000000000)+I_AC, INT64_C(0017000000000)+I_AC,
+ INT64_C(0020000000000)+I_AC, INT64_C(0021000000000)+I_AC, INT64_C(0022000000000)+I_AC, INT64_C(0023000000000)+I_AC,
+ INT64_C(0024000000000)+I_AC, INT64_C(0025000000000)+I_AC, INT64_C(0026000000000)+I_AC, INT64_C(0027000000000)+I_AC,
+ INT64_C(0030000000000)+I_AC, INT64_C(0031000000000)+I_AC,
+ -INT64_C(1)
};
#define NUMDEV 6
diff --git a/PDP10/pdp10_tu.c b/PDP10/pdp10_tu.c
index a1f3c3d9..e33e8884 100644
--- a/PDP10/pdp10_tu.c
+++ b/PDP10/pdp10_tu.c
@@ -1194,79 +1194,79 @@ return sim_tape_detach (uptr);
#define BOOT_LEN (sizeof (boot_rom_dec) / sizeof (d10))
static const d10 boot_rom_dec[] = {
- 0515040000003, /* boot:hrlzi 1,3 ; uba # */
- 0201000040001, /* movei 0,40001 ; vld,pg 1 */
- 0713001000000+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */
- 0435040000000+(IOBA_TU & RMASK), /* iori 1,772440 ; rh addr */
- 0202040000000+FE_RHBASE, /* movem 1,FE_RHBASE */
- 0201000000040, /* movei 0,40 ; ctrl reset */
- 0713001000010, /* wrio 0,10(1) ; ->MTFS */
- 0201100000031, /* movei 2,31 ; space f */
- 0265740377014, /* jsp 17,tpop ; skip ucode */
- 0201100000071, /* movei 2,71 ; read f */
- 0265740377014, /* jsp 17,tpop ; read boot */
- 0254000001000, /* jrst 1000 ; start */
- 0200000000000+FE_MTFMT, /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
- 0713001000032, /* wrio 0,32(1) ; ->MTTC */
- 0201000000011, /* movei 0,11 ; clr+go */
- 0713001000000, /* wrio 0,0(1) ; ->MTCS1 */
- 0201140176000, /* movei 3,176000 ; wd cnt */
- 0201200004000, /* movei 4,4000 ; addr */
- 0200240000000+FE_MTFMT, /* move 5,FE_MTFMT ; unit */
- 0201300000000, /* movei 6,0 ; fmtr */
- 0713141000002, /* wrio 3,2(1) ; ->MTWC */
- 0713201000004, /* wrio 4,4(1) ; ->MTBA */
- 0713301000006, /* wrio 6,6(1) ; ->MTFC */
- 0713301000010, /* wrio 6,10(1) ; ->MTFS */
- 0713241000032, /* wrio 5,32(1) ; ->MTTC */
- 0713101000000, /* wrio 2,0(1) ; ->MTCS1 */
- 0712341000012, /* rdio 7,12(1) ; read FS */
- 0606340000200, /* trnn 7,200 ; test rdy */
- 0254000377032, /* jrst .-2 ; loop */
- 0606340040000, /* trnn 7,40000 ; test err */
- 0254017000000, /* jrst 0(17) ; return */
- 0712341000014, /* rdio 7,14(1) ; read err */
- 0302340001000, /* caie 7,1000 ; fce? */
- 0254200377052, /* halt */
- 0254017000000, /* jrst 0(17) ; return */
+ INT64_C(0515040000003), /* boot:hrlzi 1,3 ; uba # */
+ INT64_C(0201000040001), /* movei 0,40001 ; vld,pg 1 */
+ INT64_C(0713001000000)+(IOBA_UBMAP+1 & RMASK), /* wrio 0,763001(1); set ubmap */
+ INT64_C(0435040000000)+(IOBA_TU & RMASK), /* iori 1,772440 ; rh addr */
+ INT64_C(0202040000000)+FE_RHBASE, /* movem 1,FE_RHBASE */
+ INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
+ INT64_C(0713001000010), /* wrio 0,10(1) ; ->MTFS */
+ INT64_C(0201100000031), /* movei 2,31 ; space f */
+ INT64_C(0265740377014), /* jsp 17,tpop ; skip ucode */
+ INT64_C(0201100000071), /* movei 2,71 ; read f */
+ INT64_C(0265740377014), /* jsp 17,tpop ; read boot */
+ INT64_C(0254000001000), /* jrst 1000 ; start */
+ INT64_C(0200000000000)+FE_MTFMT, /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
+ INT64_C(0713001000032), /* wrio 0,32(1) ; ->MTTC */
+ INT64_C(0201000000011), /* movei 0,11 ; clr+go */
+ INT64_C(0713001000000), /* wrio 0,0(1) ; ->MTCS1 */
+ INT64_C(0201140176000), /* movei 3,176000 ; wd cnt */
+ INT64_C(0201200004000), /* movei 4,4000 ; addr */
+ INT64_C(0200240000000)+FE_MTFMT, /* move 5,FE_MTFMT ; unit */
+ INT64_C(0201300000000), /* movei 6,0 ; fmtr */
+ INT64_C(0713141000002), /* wrio 3,2(1) ; ->MTWC */
+ INT64_C(0713201000004), /* wrio 4,4(1) ; ->MTBA */
+ INT64_C(0713301000006), /* wrio 6,6(1) ; ->MTFC */
+ INT64_C(0713301000010), /* wrio 6,10(1) ; ->MTFS */
+ INT64_C(0713241000032), /* wrio 5,32(1) ; ->MTTC */
+ INT64_C(0713101000000), /* wrio 2,0(1) ; ->MTCS1 */
+ INT64_C(0712341000012), /* rdio 7,12(1) ; read FS */
+ INT64_C(0606340000200), /* trnn 7,200 ; test rdy */
+ INT64_C(0254000377032), /* jrst .-2 ; loop */
+ INT64_C(0606340040000), /* trnn 7,40000 ; test err */
+ INT64_C(0254017000000), /* jrst 0(17) ; return */
+ INT64_C(0712341000014), /* rdio 7,14(1) ; read err */
+ INT64_C(0302340001000), /* caie 7,1000 ; fce? */
+ INT64_C(0254200377052), /* halt */
+ INT64_C(0254017000000), /* jrst 0(17) ; return */
};
static const d10 boot_rom_its[] = {
- 0515040000003, /* boot:hrlzi 1,3 ; uba # - not used */
- 0201000040001, /* movei 0,40001 ; vld,pg 1 */
- 0714000000000+(IOBA_UBMAP+1 & RMASK), /* iowri 0,763001 ; set ubmap */
- 0435040000000+(IOBA_TU & RMASK), /* iori 1,772440 ; rh addr */
- 0202040000000+FE_RHBASE, /* movem 1,FE_RHBASE */
- 0201000000040, /* movei 0,40 ; ctrl reset */
- 0714001000010, /* iowri 0,10(1) ; ->MTFS */
- 0201100000031, /* movei 2,31 ; space f */
- 0265740377014, /* jsp 17,tpop ; skip ucode */
- 0201100000071, /* movei 2,71 ; read f */
- 0265740377014, /* jsp 17,tpop ; read boot */
- 0254000001000, /* jrst 1000 ; start */
- 0200000000000+FE_MTFMT, /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
- 0714001000032, /* iowri 0,32(1) ; ->MTTC */
- 0201000000011, /* movei 0,11 ; clr+go */
- 0714001000000, /* iowri 0,0(1) ; ->MTCS1 */
- 0201140176000, /* movei 3,176000 ; wd cnt */
- 0201200004000, /* movei 4,4000 ; addr */
- 0200240000000+FE_MTFMT, /* move 5,FE_MTFMT ; unit */
- 0201300000000, /* movei 6,0 ; fmtr */
- 0714141000002, /* iowri 3,2(1) ; ->MTWC */
- 0714201000004, /* iowri 4,4(1) ; ->MTBA */
- 0714301000006, /* iowri 6,6(1) ; ->MTFC */
- 0714301000010, /* iowri 6,10(1) ; ->MTFS */
- 0714241000032, /* iowri 5,32(1) ; ->MTTC */
- 0714101000000, /* iowri 2,0(1) ; ->MTCS1 */
- 0710341000012, /* iordi 7,12(1) ; read FS */
- 0606340000200, /* trnn 7,200 ; test rdy */
- 0254000377032, /* jrst .-2 ; loop */
- 0606340040000, /* trnn 7,40000 ; test err */
- 0254017000000, /* jrst 0(17) ; return */
- 0710341000014, /* iordi 7,14(1) ; read err */
- 0302340001000, /* caie 7,1000 ; fce? */
- 0254200377052, /* halt */
- 0254017000000, /* jrst 0(17) ; return */
+ INT64_C(0515040000003), /* boot:hrlzi 1,3 ; uba # - not used */
+ INT64_C(0201000040001), /* movei 0,40001 ; vld,pg 1 */
+ INT64_C(0714000000000)+(IOBA_UBMAP+1 & RMASK), /* iowri 0,763001 ; set ubmap */
+ INT64_C(0435040000000)+(IOBA_TU & RMASK), /* iori 1,772440 ; rh addr */
+ INT64_C(0202040000000)+FE_RHBASE, /* movem 1,FE_RHBASE */
+ INT64_C(0201000000040), /* movei 0,40 ; ctrl reset */
+ INT64_C(0714001000010), /* iowri 0,10(1) ; ->MTFS */
+ INT64_C(0201100000031), /* movei 2,31 ; space f */
+ INT64_C(0265740377014), /* jsp 17,tpop ; skip ucode */
+ INT64_C(0201100000071), /* movei 2,71 ; read f */
+ INT64_C(0265740377014), /* jsp 17,tpop ; read boot */
+ INT64_C(0254000001000), /* jrst 1000 ; start */
+ INT64_C(0200000000000)+FE_MTFMT, /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
+ INT64_C(0714001000032), /* iowri 0,32(1) ; ->MTTC */
+ INT64_C(0201000000011), /* movei 0,11 ; clr+go */
+ INT64_C(0714001000000), /* iowri 0,0(1) ; ->MTCS1 */
+ INT64_C(0201140176000), /* movei 3,176000 ; wd cnt */
+ INT64_C(0201200004000), /* movei 4,4000 ; addr */
+ INT64_C(0200240000000)+FE_MTFMT, /* move 5,FE_MTFMT ; unit */
+ INT64_C(0201300000000), /* movei 6,0 ; fmtr */
+ INT64_C(0714141000002), /* iowri 3,2(1) ; ->MTWC */
+ INT64_C(0714201000004), /* iowri 4,4(1) ; ->MTBA */
+ INT64_C(0714301000006), /* iowri 6,6(1) ; ->MTFC */
+ INT64_C(0714301000010), /* iowri 6,10(1) ; ->MTFS */
+ INT64_C(0714241000032), /* iowri 5,32(1) ; ->MTTC */
+ INT64_C(0714101000000), /* iowri 2,0(1) ; ->MTCS1 */
+ INT64_C(0710341000012), /* iordi 7,12(1) ; read FS */
+ INT64_C(0606340000200), /* trnn 7,200 ; test rdy */
+ INT64_C(0254000377032), /* jrst .-2 ; loop */
+ INT64_C(0606340040000), /* trnn 7,40000 ; test err */
+ INT64_C(0254017000000), /* jrst 0(17) ; return */
+ INT64_C(0710341000014), /* iordi 7,14(1) ; read err */
+ INT64_C(0302340001000), /* caie 7,1000 ; fce? */
+ INT64_C(0254200377052), /* halt */
+ INT64_C(0254017000000), /* jrst 0(17) ; return */
};
t_stat tu_boot (int32 unitno, DEVICE *dptr)
diff --git a/PDP10/pdp10_xtnd.c b/PDP10/pdp10_xtnd.c
index a73a9619..d64e7fde 100644
--- a/PDP10/pdp10_xtnd.c
+++ b/PDP10/pdp10_xtnd.c
@@ -89,10 +89,10 @@
/* Translation control */
-#define XT_LFLG 0400000000000 /* L flag */
-#define XT_SFLG 0400000000000 /* S flag */
-#define XT_NFLG 0200000000000 /* N flag */
-#define XT_MFLG 0100000000000 /* M flag */
+#define XT_LFLG INT64_C(0400000000000) /* L flag */
+#define XT_SFLG INT64_C(0400000000000) /* S flag */
+#define XT_NFLG INT64_C(0200000000000) /* N flag */
+#define XT_MFLG INT64_C(0100000000000) /* M flag */
/* Translation table */
@@ -104,10 +104,10 @@
/* AC masks */
-#define XLNTMASK 0000777777777 /* length */
-#define XFLGMASK 0700000000000 /* flags */
-#define XT_MBZ 0777000000000 /* must be zero */
-#define XT_MBZE 0047777000000 /* must be zero, edit */
+#define XLNTMASK INT64_C(0000777777777) /* length */
+#define XFLGMASK INT64_C(0700000000000) /* flags */
+#define XT_MBZ INT64_C(0777000000000) /* must be zero */
+#define XT_MBZE INT64_C(0047777000000) /* must be zero, edit */
/* Register change log */
@@ -122,7 +122,7 @@
#define ED_V_PBYN 30 /* pattern byte # */
#define ED_M_PBYN 03
-#define ED_PBYNO 0040000000000 /* overflow bit */
+#define ED_PBYNO INT64_C(0040000000000) /* overflow bit */
#define ED_GETPBYN(x) ((int32) (((x) >> ED_V_PBYN) & ED_M_PBYN))
#define ED_V_POPC 6 /* pattern byte opcode */
#define ED_M_PAT 0777 /* pattern byte mask */
@@ -155,29 +155,29 @@ d10 xlate (d10 by, a10 tblad, d10 *xflgs, int32 pflgs);
void filldst (d10 fill, int32 ac, d10 cnt, int32 pflgs);
static const d10 pwrs10[23][2] = {
- 0, 0,
- 0, 1,
- 0, 10,
- 0, 100,
- 0, 1000,
- 0, 10000,
- 0, 100000,
- 0, 1000000,
- 0, 10000000,
- 0, 100000000,
- 0, 1000000000,
- 0, 10000000000,
- 2, 31280523264,
- 29, 3567587328,
- 291, 1316134912,
- 2910, 13161349120,
- 29103, 28534276096,
- 291038, 10464854016,
- 2910383, 1569325056,
- 29103830, 15693250560,
- 291038304, 19493552128,
- 2910383045, 23136829440,
- 29103830456, 25209864192
+ INT64_C(0), INT64_C(0),
+ INT64_C(0), INT64_C(1),
+ INT64_C(0), INT64_C(10),
+ INT64_C(0), INT64_C(100),
+ INT64_C(0), INT64_C(1000),
+ INT64_C(0), INT64_C(10000),
+ INT64_C(0), INT64_C(100000),
+ INT64_C(0), INT64_C(1000000),
+ INT64_C(0), INT64_C(10000000),
+ INT64_C(0), INT64_C(100000000),
+ INT64_C(0), INT64_C(1000000000),
+ INT64_C(0), INT64_C(10000000000),
+ INT64_C(2), INT64_C(31280523264),
+ INT64_C(29), INT64_C(3567587328),
+ INT64_C(291), INT64_C(1316134912),
+ INT64_C(2910), INT64_C(13161349120),
+ INT64_C(29103), INT64_C(28534276096),
+ INT64_C(291038), INT64_C(10464854016),
+ INT64_C(2910383), INT64_C(1569325056),
+ INT64_C(29103830), INT64_C(15693250560),
+ INT64_C(291038304), INT64_C(19493552128),
+ INT64_C(2910383045), INT64_C(23136829440),
+ INT64_C(29103830456), INT64_C(25209864192)
};
int xtend (int32 ac, int32 ea, int32 pflgs)
diff --git a/PDP11/pdp11_io_lib.c b/PDP11/pdp11_io_lib.c
index 10bdfe3a..2e4dd412 100644
--- a/PDP11/pdp11_io_lib.c
+++ b/PDP11/pdp11_io_lib.c
@@ -351,7 +351,7 @@ AUTO_CON auto_tab[] = {/*c #v am vm fxa fxv */
{ { "QBA" }, 1, 0, 0, 0,
{017500} }, /* doorbell - fx CSR, no VEC */
{ { "MCTL" }, 1, 0, 0, 0,
- {012100} }, /* MSV11-P - fx CSR, no VEC */
+ {012100} }, /* MSV11-P/MSV11-Q - fx CSR, no VEC */
{ { "KE" }, 1, 0, 0, 0,
{017300} }, /* KE11-A - fx CSR, no VEC */
{ { "KG" }, 1, 0, 0, 0,
diff --git a/PDP11/pdp11_xu.c b/PDP11/pdp11_xu.c
index 4bc99675..db1495f8 100644
--- a/PDP11/pdp11_xu.c
+++ b/PDP11/pdp11_xu.c
@@ -493,7 +493,7 @@ t_stat xu_process_loopback(CTLR* xu, ETH_PACK* pack)
memcpy (&response.msg[0], &response.msg[offset+2], sizeof(ETH_MAC));
memcpy (&response.msg[6], physical_address, sizeof(ETH_MAC));
- offset += 8;
+ offset += 8 - 16; /* Account for the Ethernet Header and Offset value in this number */
response.msg[14] = offset & 0xFF;
response.msg[15] = (offset >> 8) & 0xFF;
diff --git a/VAX/vax610_defs.h b/VAX/vax610_defs.h
index a3a6a42c..1b59789a 100644
--- a/VAX/vax610_defs.h
+++ b/VAX/vax610_defs.h
@@ -94,10 +94,13 @@
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
#undef PAMASK
#define PAMASK 0x203FFFFF /* KA610 needs a special mask */
-#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 19), NULL, "512k", &cpu_set_size, NULL, NULL, "Set Memory to 512K bytes" },\
+#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 19), NULL, "512K", &cpu_set_size, NULL, NULL, "Set Memory to 512K bytes" },\
+ { UNIT_MSIZE, (1u << 19) + (1u << 18), NULL, "768K", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
{ UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
{ UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
- { UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }
+ { UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }, \
+ { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
+extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "LEDS", NULL, \
NULL, &cpu_show_leds, NULL, "Display the CPU LED values" }, \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
diff --git a/VAX/vax610_mem.c b/VAX/vax610_mem.c
index bec635c9..273b761c 100644
--- a/VAX/vax610_mem.c
+++ b/VAX/vax610_mem.c
@@ -73,7 +73,7 @@ DEVICE mctl_dev = {
1, DEV_RDX, 20, 1, DEV_RDX, 8,
NULL, NULL, &mctl_reset,
NULL, NULL, NULL,
- &mctl_dib, DEV_Q18, 0, NULL, NULL, NULL, NULL, NULL, NULL,
+ &mctl_dib, DEV_QBUS, 0, NULL, NULL, NULL, NULL, NULL, NULL,
&mctl_description
};
@@ -119,3 +119,30 @@ void rom_wr_B (int32 pa, int32 val)
return;
}
+t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
+{
+uint32 memsize = (uint32)(MEMSIZE>>10);
+uint32 baseaddr = 0;
+uint32 csraddr = mctl_dib.ba;
+struct {
+ uint32 capacity;
+ char *option;
+ } boards[] = {
+ { 4096, "MSV11-QC"},
+ { 2048, "MSV11-QB"},
+ { 1024, "MSV11-QA"},
+ { 512, "MSV11-PL"},
+ { 256, "MSV11-PK"},
+ { 0, NULL}};
+int32 i;
+
+while (memsize) {
+ for (i=0; boards[i].capacity > memsize; ++i)
+ ;
+ fprintf(st, "Memory (@0x%08x): %3d %sbytes (%s) - CSR: 0x%08x.\n", baseaddr, boards[i].capacity/((boards[i].capacity >= 1024) ? 1024 : 1), (boards[i].capacity >= 1024) ? "M" : "K", boards[i].option, csraddr);
+ memsize -= boards[i].capacity;
+ baseaddr += boards[i].capacity*1024;
+ csraddr += (boards[i].capacity/256)*2;
+ }
+return SCPE_OK;
+}
diff --git a/VAX/vax630_defs.h b/VAX/vax630_defs.h
index e54f077e..00c13b61 100644
--- a/VAX/vax630_defs.h
+++ b/VAX/vax630_defs.h
@@ -98,12 +98,15 @@
#define INITMEMSIZE (1 << 24) /* initial memory size */
#define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
-#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
- { UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
- { UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }, \
- { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size, NULL, NULL, "Set Memory to 8M bytes" }, \
- { UNIT_MSIZE, (1u << 23) + (1u << 22), NULL, "12M", &cpu_set_size, NULL, NULL, "Set Memory to 12M bytes" }, \
- { UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size, NULL, NULL, "Set Memory to 16M bytes" }
+#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
+ { UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
+ { UNIT_MSIZE, (1u << 21) + (1u << 20), NULL, "3M", &cpu_set_size, NULL, NULL, "Set Memory to 3M bytes" }, \
+ { UNIT_MSIZE, (1u << 22) + (1u << 20), NULL, "5M", &cpu_set_size, NULL, NULL, "Set Memory to 5M bytes" }, \
+ { UNIT_MSIZE, (1u << 23) + (1u << 20), NULL, "9M", &cpu_set_size, NULL, NULL, "Set Memory to 9M bytes" }, \
+ { UNIT_MSIZE, (1u << 23) + (1u << 22) + (1u << 20), NULL, "13M", &cpu_set_size, NULL, NULL, "Set Memory to 13M bytes" }, \
+ { UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size, NULL, NULL, "Set Memory to 16M bytes" }, \
+ { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
+extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
NULL, &cpu_show_model, NULL, "Display the simulator CPU Model" }, \
{ MTAB_XTD|MTAB_VDV, 0, "DIAG", "DIAG={FULL|MIN}", \
diff --git a/VAX/vax630_sysdev.c b/VAX/vax630_sysdev.c
index 807dafb1..eb9916ef 100644
--- a/VAX/vax630_sysdev.c
+++ b/VAX/vax630_sysdev.c
@@ -979,3 +979,32 @@ fprintf (st, "The simulator is booted with the BOOT command:\n\n");
fprintf (st, " sim> BOOT\n\n");
return SCPE_OK;
}
+
+t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
+{
+uint32 memsize = (uint32)(MEMSIZE>>20);
+uint32 baseaddr = 0;
+struct {
+ uint32 capacity;
+ char *option;
+ } boards[] = {
+ { 16, "MS630-CA"},
+ { 4, "MS630-BB"},
+ { 2, "MS630-BA"},
+ { 1, "MS630-AA"},
+ { 0, NULL}};
+int32 i;
+
+while (memsize > 1) {
+ for (i=0; boards[i].capacity > memsize; ++i)
+ ;
+ if (memsize == 2)
+ i = 3;
+ fprintf(st, "Memory (@0x%08x): %3d Mbytes (%s)\n", baseaddr, boards[i].capacity, boards[i].option);
+ memsize -= boards[i].capacity;
+ baseaddr += boards[i].capacity<<20;
+ }
+if (memsize)
+ fprintf(st, "Memory (0x%08x): 1 Mbytes (On-Board)\n", baseaddr);
+return SCPE_OK;
+}
diff --git a/VAX/vax730_defs.h b/VAX/vax730_defs.h
index 1a27fb02..39ed5618 100644
--- a/VAX/vax730_defs.h
+++ b/VAX/vax730_defs.h
@@ -129,7 +129,9 @@
{ UNIT_MSIZE, (2u << 20), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
{ UNIT_MSIZE, (3u << 20), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 3M bytes" }, \
{ UNIT_MSIZE, (4u << 20), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }, \
- { UNIT_MSIZE, (5u << 20), NULL, "5M", &cpu_set_size, NULL, NULL, "Set Memory to 5M bytes" }
+ { UNIT_MSIZE, (5u << 20), NULL, "5M", &cpu_set_size, NULL, NULL, "Set Memory to 5M bytes" }, \
+ { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
+extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
NULL, &cpu_show_model, NULL, "Display the simulator CPU Model" }
diff --git a/VAX/vax730_mem.c b/VAX/vax730_mem.c
index 938bf6ff..d6d8d583 100644
--- a/VAX/vax730_mem.c
+++ b/VAX/vax730_mem.c
@@ -188,11 +188,7 @@ t_stat mctl_reset (DEVICE *dptr)
{
mcsr0 = 0;
mcsr1 = 0;
-mcsr2 = 0;
-if (MEMSIZE > MAXMEMSIZE) /* More than 2MB? */
- mcsr2 = mcsr2 | MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_64K) | MCSR2_CS; /* Use 64k chips */
-else
- mcsr2 = mcsr2 | MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_16K); /* Use 16k chips */
+mcsr2 = MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_64K) | MCSR2_CS; /* Use 64k chips */
return SCPE_OK;
}
@@ -200,3 +196,26 @@ char *mctl_description (DEVICE *dptr)
{
return "memory controller";
}
+
+t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
+{
+uint32 memsize = (uint32)(MEMSIZE>>20);
+uint32 baseaddr = 0;
+uint32 slot = 6;
+struct {
+ uint32 capacity;
+ char *option;
+ } boards[] = {
+ { 1, "MS730-CA M8750"},
+ { 0, NULL}};
+int32 bd;
+
+while (memsize) {
+ bd = 0;
+ fprintf(st, "Memory slot %d (@0x%08x): %3d Mbytes (%s)\n", slot, baseaddr, boards[bd].capacity, boards[bd].option);
+ memsize -= boards[bd].capacity;
+ baseaddr += boards[bd].capacity<<20;
+ ++slot;
+ }
+return SCPE_OK;
+}
diff --git a/VAX/vax750_defs.h b/VAX/vax750_defs.h
index 36e1011b..ab536f22 100644
--- a/VAX/vax750_defs.h
+++ b/VAX/vax750_defs.h
@@ -141,15 +141,22 @@
#define MAXMEMWIDTH 21 /* max mem, 16k chips */
#define MAXMEMSIZE (1 << MAXMEMWIDTH)
-#define MAXMEMWIDTH_X 23 /* max mem, 64k chips */
-#define MAXMEMSIZE_X (1 << MAXMEMWIDTH_X)
+#define MAXMEMWIDTH_Y 23 /* max mem, 64k chips */
+#define MAXMEMSIZE_Y (1 << MAXMEMWIDTH_Y)
+#define MAXMEMWIDTH_X 24 /* max mem, 256k chips */
+#define MAXMEMSIZE_X ((1 << MAXMEMWIDTH_X) - (1 << 20)) /* 15M Max before interfering with Register Space */
#define INITMEMSIZE (1 << MAXMEMWIDTH) /* initial memory size */
#define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
-#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
- { UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
- { UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }, \
- { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size, NULL, NULL, "Set Memory to 8M bytes" }
+#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
+ { UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
+ { UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }, \
+ { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size, NULL, NULL, "Set Memory to 8M bytes" }, \
+ { UNIT_MSIZE, (1u << 23) + (1u << 22), NULL, "12M", &cpu_set_size, NULL, NULL, "Set Memory to 12M bytes" }, \
+ { UNIT_MSIZE, (1u << 23) + (6u << 20), NULL, "14M", &cpu_set_size, NULL, NULL, "Set Memory to 14M bytes" }, \
+ { UNIT_MSIZE, (1u << 23) + (7u << 20), NULL, "15M", &cpu_set_size, NULL, NULL, "Set Memory to 15M bytes" }, \
+ { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
+extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
NULL, &cpu_show_model, NULL, "Display the simulator CPU Model" }
diff --git a/VAX/vax750_mem.c b/VAX/vax750_mem.c
index ddcdc61f..9ae672a1 100644
--- a/VAX/vax750_mem.c
+++ b/VAX/vax750_mem.c
@@ -63,19 +63,24 @@
#define MCSR2_INIT 0x00010000 /* Cold/warm restart flag */
#define MCSR2_V_SA 17
#define MCSR2_M_SA 0x7F /* Start address */
-#define MCSR2_V_CS 24
-#define MCSR2_CS (1u << MCSR2_V_CS) /* Chip size */
-#define MCSR2_MBZ 0xFF000000
+#define MCSR2_V_CS64 24
+#define MCSR2_CS64 (1u << MCSR2_V_CS64) /* Chip size */
+#define MCSR2_V_CS256 25
+#define MCSR2_CS256 (1u << MCSR2_V_CS256) /* Chip size */
+#define MCSR2_MBZ 0xFC000000
/* Debug switches */
#define MCTL_DEB_RRD 0x01 /* reg reads */
#define MCTL_DEB_RWR 0x02 /* reg writes */
-#define MEM_SIZE_16K (1u << 17) /* Board size (16k chips) */
-#define MEM_SIZE_64K (1u << 19) /* Board size (64k chips) */
-#define MEM_BOARD_MASK(x,y) ((1u << (uint32)(x/y)) - 1)
+#define MEM_SIZE_16K (1u << 18) /* Board size (16k chips) */
+#define MEM_SIZE_64K (1u << 20) /* Board size (64k chips) */
+#define MEM_SIZE_256K (1u << 22) /* Board size (256k chips) */
#define MEM_64K_MASK 0x5555
+#define MEM_BOARD_MASK_64K(x) ((((1u << (uint32)(x/MEM_SIZE_64K)) - 1) & MEM_64K_MASK) | MCSR2_CS64)
+#define MEM_256K_MASK 0x5555
+#define MEM_BOARD_MASK_256K(x) ((((1u << (uint32)(x/MEM_SIZE_256K)) - 1) & MEM_256K_MASK) | MCSR2_CS256)
extern UNIT cpu_unit;
@@ -100,6 +105,9 @@ DIB mctl_dib = { TR_MCTL, 0, &mctl_rdreg, &mctl_wrreg, 0 };
UNIT mctl_unit = { UDATA (NULL, 0, 0) };
REG mctl_reg[] = {
+ { HRDATAD (CSR0, mcsr0, 32, "ECC syndrome bits") },
+ { HRDATAD (CSR1, mcsr1, 32, "CPU error control/check bits") },
+ { HRDATAD (CSR2, mcsr2, 32, "Memory Configuration") },
{ NULL }
};
@@ -198,12 +206,24 @@ return;
t_stat mctl_reset (DEVICE *dptr)
{
+uint32 large_slot_size = MEM_SIZE_16K, large_slots;
+uint32 small_slot_size, small_slots;
+uint32 boards, board_mask;
+
mcsr0 = 0;
mcsr1 = 0;
-if (MEMSIZE > MAXMEMSIZE) /* More than 2MB? */
- mcsr2 = MCSR2_INIT | (MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_64K) & MEM_64K_MASK) | MCSR2_CS; /* Use 64k chips */
-else
- mcsr2 = MCSR2_INIT | MEM_BOARD_MASK(MEMSIZE, MEM_SIZE_16K); /* Use 16k chips */
+if (MEMSIZE > MAXMEMSIZE_Y) /* More than 8MB? */
+ large_slot_size = MEM_SIZE_256K; /* Use 256k chips */
+else {
+ if (MEMSIZE > MAXMEMSIZE)
+ large_slot_size = MEM_SIZE_64K;
+ }
+small_slot_size = large_slot_size >> 2;
+large_slots = (uint32)(MEMSIZE/large_slot_size);
+small_slots = (MEMSIZE & (large_slot_size -1))/small_slot_size;
+boards = ((1u << ((large_slots + small_slots) << 1)) - 1);
+board_mask = (((large_slot_size == MEM_SIZE_16K)? 0xFFFF : 0x5555) & (((1u << (large_slots << 1)) - 1))) | (((large_slot_size == MEM_SIZE_256K) ? 0xAAAA : 0xFFFF) << (large_slots << 1));
+mcsr2 = MCSR2_INIT | (boards & board_mask) | ((large_slot_size == MEM_SIZE_256K) ? MCSR2_CS256 : 0); /* Use 256k chips */
return SCPE_OK;
}
@@ -211,3 +231,53 @@ char *mctl_description (DEVICE *dptr)
{
return "Memory controller";
}
+
+t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
+{
+uint32 memsize = (uint32)(MEMSIZE>>10);
+uint32 baseaddr = 0;
+struct {
+ uint32 capacity;
+ char *option;
+ } boards[] = {
+ { 4096, "MS750-JD M7199"},
+ { 1024, "MS750-CA M8750"},
+ { 256, "MS750-AA M8728"},
+ { 0, NULL}};
+int32 i, bd;
+
+for (i=0; i<8; i++) {
+ if (mcsr2&MCSR2_CS256) {
+ switch ((mcsr2&(3<<(i*2)))>>(i*2)) {
+ case 0:
+ case 3:
+ bd = 3; /* Not Present */
+ break;
+ case 2:
+ bd = 1; /* 64Kb chips */
+ break;
+ case 1:
+ bd = 0; /* 256Kb chips */
+ break;
+ }
+ }
+ else {
+ switch ((mcsr2&(3<<(i*2)))>>(i*2)) {
+ case 0:
+ bd = 3; /* Not Present */
+ break;
+ case 3:
+ bd = 2; /* 16Kb chips */
+ break;
+ case 1:
+ case 2:
+ bd = 1; /* 64Kb chips */
+ break;
+ }
+ }
+ if (boards[bd].capacity)
+ fprintf(st, "Memory slot %d (@0x%08x): %3d %sbytes (%s)\n", 11+i, baseaddr, boards[bd].capacity/((boards[bd].capacity>=1024) ? 1024 : 1), (boards[bd].capacity>=1024) ? "M" : "K", boards[bd].option);
+ baseaddr += boards[bd].capacity<<10;
+ }
+return SCPE_OK;
+}
diff --git a/VAX/vax780_defs.h b/VAX/vax780_defs.h
index 9ab0bbb3..5f00d0fc 100644
--- a/VAX/vax780_defs.h
+++ b/VAX/vax780_defs.h
@@ -157,12 +157,17 @@
#define INITMEMSIZE (1 << MAXMEMWIDTH) /* initial memory size */
#define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
-#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size, NULL, NULL, "Set Memory to 8M bytes" }, \
+#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 20), NULL, "1M", &cpu_set_size, NULL, NULL, "Set Memory to 1M bytes" }, \
+ { UNIT_MSIZE, (1u << 21), NULL, "2M", &cpu_set_size, NULL, NULL, "Set Memory to 2M bytes" }, \
+ { UNIT_MSIZE, (1u << 22), NULL, "4M", &cpu_set_size, NULL, NULL, "Set Memory to 4M bytes" }, \
+ { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size, NULL, NULL, "Set Memory to 8M bytes" }, \
{ UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size, NULL, NULL, "Set Memory to 16M bytes" }, \
{ UNIT_MSIZE, (1u << 25), NULL, "32M", &cpu_set_size, NULL, NULL, "Set Memory to 32M bytes" }, \
{ UNIT_MSIZE, (1u << 25) + (1u << 24), NULL, "48M", &cpu_set_size, NULL, NULL, "Set Memory to 48M bytes" }, \
{ UNIT_MSIZE, (1u << 26), NULL, "64M", &cpu_set_size, NULL, NULL, "Set Memory to 64M bytes" }, \
- { UNIT_MSIZE, (1u << 27), NULL, "128M", &cpu_set_size, NULL, NULL, "Set Memory to 128M bytes" }
+ { UNIT_MSIZE, (1u << 27), NULL, "128M", &cpu_set_size, NULL, NULL, "Set Memory to 128M bytes" }, \
+ { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
+extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS \
{ MTAB_XTD|MTAB_VDV, 0, "MODEL", NULL, \
NULL, &cpu_show_model, NULL, "Display the simulator CPU Model" }
diff --git a/VAX/vax780_mem.c b/VAX/vax780_mem.c
index 4d4019c2..a79d999f 100644
--- a/VAX/vax780_mem.c
+++ b/VAX/vax780_mem.c
@@ -32,17 +32,20 @@
/* Memory controller register A */
-#define MCRA_OF 0x0
-#define MCRA_SUMM 0x00100000 /* err summ (MS780E) */
-#define MCRA_C_SIZE 0x00007E00 /* array size - fixed */
-#define MCRA_V_SIZE 9
-#define MCRA_ILVE 0x00000100 /* interleave wr enab */
-#define MCRA_TYPE 0x000000F8 /* type */
-#define MCRA_C_TYPE 0x00000010 /* 16k uninterleaved */
-#define MCRA_E_TYPE 0x0000006A /* 256k upper + lower */
-#define MCRA_ILV 0x00000007 /* interleave */
-#define MCRA_RD (0x00107FFF|SBI_FAULTS)
-#define MCRA_WR 0x00000100
+#define MCRA_OF 0x0
+#define MCRA_SUMM 0x00100000 /* err summ (MS780E) */
+#define MCRA_M_SIZE 0x00007E00 /* array size - field */
+#define MCRA_V_SIZE 9
+#define MCRA_ILVE 0x00000100 /* interleave wr enab */
+#define MCRA_M_TYPE 0x000000F8 /* type */
+#define MCRA_C_TYPE_16K 0x00000010 /* 16k uninterleaved (256kb arrays) */
+#define MCRA_C_TYPE_4K 0x00000008 /* 4k uninterleaved (64kb arrays) */
+#define MCRA_E_TYPE_256K 0x00000070 /* 256k uninterleaved (4096kb arrays) */
+#define MCRA_E_TYPE_64K 0x00000068 /* 64k uninterleaved (1024kb arrays) */
+#define MCRA_E_TYPE 0x0000006A /* 256k upper + lower */
+#define MCRA_ILV 0x00000007 /* interleave */
+#define MCRA_RD (0x00107FFF|SBI_FAULTS)
+#define MCRA_WR 0x00000100
/* Memory controller register B */
@@ -263,19 +266,17 @@ return;
t_stat mctl_reset (DEVICE *dptr)
{
-int32 i, amb;
+int32 i, amb, akb;
t_bool extmem = MEMSIZE > MAXMEMSIZE;
-amb = (int32) (MEMSIZE / 2) >> 20; /* array size MB */
-for (i = 0; i < MCTL_NUM; i++) { /* init for MS780C */
- if (extmem) { /* extended memory? */
- mcr_a[i] = ((amb - 1) << MCRA_V_SIZE) | MCRA_E_TYPE;
- mcr_b[i] = MCRB_INIT | ((i * amb) << (MCRB_V_SA + 4));
- }
- else {
- mcr_a[i] = MCRA_C_SIZE | MCRA_C_TYPE;
- mcr_b[i] = MCRB_INIT | (i << 21);
- }
+amb = (int32) (MEMSIZE / MCTL_NUM) >> 20; /* array size MB */
+akb = (int32) (MEMSIZE / MCTL_NUM) >> 10; /* array size KB */
+for (i = 0; i < MCTL_NUM; i++) {
+ if (extmem) /* Need MS780E? */
+ mcr_a[i] = ((amb - 1) << MCRA_V_SIZE) | ((amb <= 16) ? MCRA_E_TYPE_64K : MCRA_E_TYPE_256K);
+ else /* Use MS780C */
+ mcr_a[i] = (((akb >> 6) - 1) << MCRA_V_SIZE) | ((akb <= 1024) ? MCRA_C_TYPE_4K : MCRA_C_TYPE_16K);
+ mcr_b[i] = MCRB_INIT | ((i * akb) << (MCRB_V_SA - 6));
mcr_c[i] = 0;
mcr_d[i] = 0;
}
@@ -289,3 +290,43 @@ static char buf[64];
sprintf (buf, "Memory controller %d", (int)(dptr-mctl_dev));
return buf;
}
+
+t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
+{
+struct {
+ uint32 capacity;
+ char *option;
+ } boards[] = {
+ { 4096, "MS780-JD M8374 array"},
+ { 1024, "MS780-FD M8373 array"},
+ { 256, "MS780-C M8210 array"},
+ { 64, "MS780-C M8211 array"},
+ { 0, NULL}};
+uint32 i, slot, bd;
+
+for (i = 0; i < MCTL_NUM; i++) {
+ uint32 baseaddr = ((mcr_b[i] & MCRB_SA) << 1);
+
+ fprintf (st, "Memory Controller %d - MS780-%s\n", i, ((mcr_a[i]&MCRA_M_TYPE) >> 5) ? "E" : "C");
+ switch (mcr_a[i]&MCRA_M_TYPE) {
+ case MCRA_C_TYPE_4K:
+ bd = 3; /* 4kbit chips, 64Kbyte arrays */
+ break;
+ case MCRA_C_TYPE_16K:
+ bd = 2; /* 16kbit chips, 256Kbyte arrays */
+ break;
+ case MCRA_E_TYPE_64K:
+ bd = 1; /* 64kbit chips, 1Mbyte arrays */
+ break;
+ case MCRA_E_TYPE_256K:
+ bd = 0; /* 256kbit chips, 4Mbyte arrays */
+ break;
+ }
+ for (slot=0; slot<=((mcr_a[i]&MCRA_M_SIZE)>>MCRA_V_SIZE); slot += ((mcr_a[i]&MCRA_C_TYPE_4K)? 1 : 4)) {
+ if (boards[bd].capacity)
+ fprintf(st, "Memory slot %d (@0x%08x): %3d %sbytes (%s)\n", slot, baseaddr, boards[bd].capacity/((boards[bd].capacity>=1024) ? 1024 : 1), (boards[bd].capacity>=1024) ? "M" : "K", boards[bd].option);
+ baseaddr += boards[bd].capacity<<10;
+ }
+ }
+return SCPE_OK;
+}
diff --git a/VAX/vax860_abus.c b/VAX/vax860_abus.c
index b6f4cec9..768ac31c 100644
--- a/VAX/vax860_abus.c
+++ b/VAX/vax860_abus.c
@@ -192,7 +192,7 @@ DEVICE abus_dev = {
};
/*
-The 8600/8650 systems can have a max of 260MB of memory.
+The 8600/8650 systems can have a max of 260MB of physical memory.
There are three different memory boards that exists: 4MB, 16MB, and 64MB.
In addition, you can mix different boards.
The rule is to put large boards first, and smaller boards later.
@@ -205,6 +205,13 @@ up any other slot.
If you are using 16MB boards, the max memory is 68MB.
Slot 0,2,4 and 6 will have 16MB boards. And then you can place a 4MB board in slot 7.
Same story with the 64MB boards.
+
+The system architecture reserves 512MB of address space for memory, so the
+simulated memory can be expanded up to 512MB using 2 256MB memory boards which
+never existed but are easy to simulate. We call these fictional boards MS86-E
+
+The logic here fills as many slots as possible with memory boards to describe
+the total system memory size.
*/
void init_pamm()
@@ -212,28 +219,27 @@ void init_pamm()
int32 addr = 0;
int32 mem = (int32)(MEMSIZE >> 20);
int32 slot = 0;
-int32 size = 0;
+int32 slots_remaining = 8;
+int32 size = 4;
int32 i;
for (i=0; i<1024; i++)
pamm[i] = PAMM_NXM;
for (;mem > 0; ) {
- if (mem >= 64)
- size = 64;
- else {
- if (mem >= 16)
- size = 16;
- else
- size = 4;
- }
- if ((size > 4) && (slot > 0))
+ size = 4;
+ while (mem/size > slots_remaining/((size > 4) ? 2 : 1))
+ size = size * 4;
+ if ((size > 4) && (slot > 0)) {
slot++;
+ slots_remaining--;
+ }
if (slot < 8) {
for (i=0; i<size; i++)
pamm[addr++] = slot;
}
slot++;
+ slots_remaining--;
mem -= size;
}
@@ -245,7 +251,16 @@ t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
{
int32 slot[32];
int32 base[32];
-int32 i;
+struct {
+ int capacity;
+ char *option;
+ } boards[] = {
+ { 4, "MS86-B"},
+ { 16, "MS86-C"},
+ { 64, "MS86-D"},
+ {256, "MS86-E (board never existed)"}, /* Fake 256MB board */
+ { 0, NULL}};
+int32 i, j;
for (i=0; i<32; i++)
slot[i] = base[i] = 0;
@@ -256,23 +271,26 @@ for (i=1023; i>=0; i--) {
}
for (i=0; i<8; i++) {
- if (slot[i] > 0)
- fprintf(st, "Memory slot %d (@0x%08x): %d Mbytes.\n", i, base[i] << 20, slot[i]);
+ if (slot[i] > 0) {
+ for (j=0; boards[j].option && boards[j].capacity != slot[i]; ++j)
+ ;
+ fprintf(st, "Memory slot %d (@0x%08x): %3d Mbytes (%s).\n", i, base[i] << 20, boards[j].capacity, boards[j].option);
+ }
}
for (i=8; i<0x18; i++) {
if (slot[i] > 0)
- fprintf(st, "Unused code %d (@0x%08x): %d Mbytes.\n", i, base[i] << 20, slot[i]);
+ fprintf(st, "Unused code %d (@0x%08x): %3d Mbytes.\n", i, base[i] << 20, slot[i]);
}
for (i=0x18; i<0x1c; i++) {
if (slot[i] > 0)
- fprintf(st, "I/O adapter %d (@0x%08x): %d Mbytes.\n", i-0x18, base[i] << 20, slot[i]);
+ fprintf(st, "I/O adapter %d (@0x%08x): %3d Mbytes.\n", i-0x18, base[i] << 20, slot[i]);
}
for (i=0x1c; i<0x1f; i++) {
if (slot[i] > 0)
- fprintf(st, "Unused code %d (@0x%08x): %d Mbytes.\n", i, base[i] << 20, slot[i]);
+ fprintf(st, "Unused code %d (@0x%08x): %3d Mbytes.\n", i, base[i] << 20, slot[i]);
}
fprintf(st, "Ununsed address space: %d Mbytes.\n", slot[0x1f]);
diff --git a/VAX/vax860_defs.h b/VAX/vax860_defs.h
index 5341ea62..c1aaeabe 100644
--- a/VAX/vax860_defs.h
+++ b/VAX/vax860_defs.h
@@ -164,8 +164,8 @@
#define MAXMEMWIDTH 25 /* max mem, 4MB boards */
#define MAXMEMSIZE (1 << MAXMEMWIDTH)
-#define MAXMEMWIDTH_X 28 /* max mem, 64MB boards */
-#define MAXMEMSIZE_X ((1 << MAXMEMWIDTH_X) + (1 << 22)) /* 8 64MB + 1 4MB */
+#define MAXMEMWIDTH_X 29 /* max mem space using non-existant 256MB boards */
+#define MAXMEMSIZE_X (1 << MAXMEMWIDTH_X)
#define INITMEMSIZE (1 << MAXMEMWIDTH) /* initial memory size */
#define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
@@ -178,6 +178,7 @@
{ UNIT_MSIZE, (1u << 27), NULL, "128M", &cpu_set_size, NULL, NULL, "Set Memory to 128M bytes" }, \
{ UNIT_MSIZE, (1u << 28), NULL, "256M", &cpu_set_size, NULL, NULL, "Set Memory to 256M bytes" }, \
{ UNIT_MSIZE, (1u << 28) + (1u << 22), NULL, "260M", &cpu_set_size, NULL, NULL, "Set Memory to 260M bytes" }, \
+ { UNIT_MSIZE, (1u << 29), NULL, "512M", &cpu_set_size, NULL, NULL, "Set Memory to 512M bytes" }, \
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
diff --git a/VAX/vax_sysdev.c b/VAX/vax_sysdev.c
index ab6a0097..dda6a00b 100644
--- a/VAX/vax_sysdev.c
+++ b/VAX/vax_sysdev.c
@@ -30,6 +30,7 @@
nvr non-volatile ROM (no registers)
csi console storage input
cso console storage output
+ cmctl memory controller
sysd system devices (SSC miscellany)
23-Dec-10 RMS Added power clear call to boot routine (Mark Pizzolato)
@@ -1143,6 +1144,32 @@ switch (rg) {
return;
}
+t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc)
+{
+uint32 memsize = (uint32)(MEMSIZE>>20);
+uint32 baseaddr = 0;
+struct {
+ uint32 capacity;
+ char *option;
+ } boards[] = {
+ { 16, "MS650-BA"},
+ { 0, NULL}};
+int32 i;
+
+while (memsize > 1) {
+ if (baseaddr >= (64<<20)) {
+ fprintf(st, "Memory (@0x%08x): %3d Mbytes (Simulated Extended Memory)\n", baseaddr, memsize);
+ break;
+ }
+ for (i=0; boards[i].capacity > memsize; ++i)
+ ;
+ fprintf(st, "Memory (@0x%08x): %3d Mbytes (%s)\n", baseaddr, boards[i].capacity, boards[i].option);
+ memsize -= boards[i].capacity;
+ baseaddr += boards[i].capacity<<20;
+ }
+return SCPE_OK;
+}
+
/* KA655 registers */
int32 ka_rd (int32 pa)
diff --git a/VAX/vaxmod_defs.h b/VAX/vaxmod_defs.h
index f3997fdf..2d73f8d7 100644
--- a/VAX/vaxmod_defs.h
+++ b/VAX/vaxmod_defs.h
@@ -118,14 +118,15 @@
#define INITMEMSIZE (1 << 24) /* initial memory size */
#define MEMSIZE (cpu_unit.capac)
#define ADDR_IS_MEM(x) (((uint32) (x)) < MEMSIZE)
-#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 23), NULL, "8M", &cpu_set_size, NULL, NULL, "Set Memory to 8M bytes" }, \
- { UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size, NULL, NULL, "Set Memory to 16M bytes" }, \
+#define MEM_MODIFIERS { UNIT_MSIZE, (1u << 24), NULL, "16M", &cpu_set_size, NULL, NULL, "Set Memory to 16M bytes" }, \
{ UNIT_MSIZE, (1u << 25), NULL, "32M", &cpu_set_size, NULL, NULL, "Set Memory to 32M bytes" }, \
{ UNIT_MSIZE, (1u << 25) + (1u << 24), NULL, "48M", &cpu_set_size, NULL, NULL, "Set Memory to 48M bytes" }, \
{ UNIT_MSIZE, (1u << 26), NULL, "64M", &cpu_set_size, NULL, NULL, "Set Memory to 64M bytes" }, \
{ UNIT_MSIZE, (1u << 27), NULL, "128M", &cpu_set_size, NULL, NULL, "Set Memory to 128M bytes" }, \
{ UNIT_MSIZE, (1u << 28), NULL, "256M", &cpu_set_size, NULL, NULL, "Set Memory to 256M bytes" }, \
- { UNIT_MSIZE, (1u << 29), NULL, "512M", &cpu_set_size, NULL, NULL, "Set Memory to 512M bytes" }
+ { UNIT_MSIZE, (1u << 29), NULL, "512M", &cpu_set_size, NULL, NULL, "Set Memory to 512M bytes" }, \
+ { MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "MEMORY", NULL, NULL, &cpu_show_memory, NULL, "Display memory configuration" }
+extern t_stat cpu_show_memory (FILE* st, UNIT* uptr, int32 val, void* desc);
#define CPU_MODEL_MODIFIERS { MTAB_XTD|MTAB_VDV, 0, "MODEL", "MODEL={VAXServer|MicroVAX}", \
&cpu_set_model, &cpu_show_model, NULL, "Set/Display processor model" }, \
{ MTAB_XTD|MTAB_VDV, 0, "AUTOBOOT", "AUTOBOOT", \
diff --git a/scp.c b/scp.c
index 2a5df1db..b201c9dc 100644
--- a/scp.c
+++ b/scp.c
@@ -2556,8 +2556,11 @@ else if ((shptr = find_shtab (show_glob_tab, gbuf))) /* global? */
else {
if (sim_dflt_dev->modifiers)
for (mptr = sim_dflt_dev->modifiers; mptr->mask != 0; mptr++) {
- if (mptr->mstring && (MATCH_CMD (gbuf, mptr->mstring) == 0)) {
+ if ((((mptr->mask & MTAB_VDV) == MTAB_VDV) &&
+ (mptr->pstring && (MATCH_CMD (gbuf, mptr->pstring) == 0))) ||
+ (!(mptr->mask & MTAB_VDV) && (mptr->mstring && (MATCH_CMD (gbuf, mptr->mstring) == 0)))) {
dptr = sim_dflt_dev;
+ lvl = MTAB_VDV; /* device match */
cptr -= strlen (gbuf) + 1;
while (isspace(*cptr))
++cptr;
diff --git a/sim_defs.h b/sim_defs.h
index c9248efd..30782661 100644
--- a/sim_defs.h
+++ b/sim_defs.h
@@ -173,6 +173,9 @@ typedef unsigned long t_uint64;
#define t_int64 signed long long
#define t_uint64 unsigned long long
#endif /* end 64b */
+#ifndef INT64_C
+#define INT64_C(x) x ## LL
+#endif
#if defined (USE_INT64) /* 64b data */
typedef t_int64 t_svalue; /* signed value */
diff --git a/sim_disk.c b/sim_disk.c
index 38a6f969..12072bc7 100644
--- a/sim_disk.c
+++ b/sim_disk.c
@@ -821,7 +821,7 @@ FILE *(*open_function)(const char *filename, const char *mode) = sim_fopen;
FILE *(*create_function)(const char *filename, t_offset desiredsize) = NULL;
t_offset (*size_function)(FILE *file);
t_stat (*storage_function)(FILE *file, uint32 *sector_size, uint32 *removable) = NULL;
-t_bool created = FALSE;
+t_bool created = FALSE, copied = FALSE;
t_bool auto_format = FALSE;
t_offset capac;
@@ -920,11 +920,65 @@ if (sim_switches & SWMASK ('C')) { /* create vhd disk & cop
else
printf ("\n%s%d: Error copying: %s.\n", sim_dname (dptr), (int)(uptr-dptr->units), sim_error_text (r));
}
+ if ((r == SCPE_OK) && (sim_switches & SWMASK ('V'))) {
+ uint8 *verify_buf = (uint8*) malloc (1024*1024);
+
+ if (!verify_buf) {
+ sim_vhd_disk_close(vhd);
+ remove (gbuf);
+ free (copy_buf);
+ return SCPE_MEM;
+ }
+ for (lba = 0; (lba < total_sectors) && (r == SCPE_OK); lba += sects) {
+ if (!sim_quiet)
+ printf ("%s%d: Verified %dMB. %d%% complete.\r", sim_dname (dptr), (int)(uptr-dptr->units), (int)((((float)lba)*sector_size)/1000000), (int)((((float)lba)*100)/total_sectors));
+ sects = sectors_per_buffer;
+ if (lba + sects > total_sectors)
+ sects = total_sectors - lba;
+ r = sim_disk_rdsect (uptr, lba, copy_buf, NULL, sects);
+ if (r == SCPE_OK) {
+ uint32 saved_unit_flags = uptr->flags;
+ FILE *save_unit_fileref = uptr->fileref;
+
+ sim_disk_set_fmt (uptr, 0, "VHD", NULL);
+ uptr->fileref = vhd;
+ r = sim_disk_rdsect (uptr, lba, verify_buf, NULL, sects);
+ uptr->fileref = save_unit_fileref;
+ uptr->flags = saved_unit_flags;
+ if (r == SCPE_OK) {
+ if (0 != memcmp (copy_buf, verify_buf, 1024*1024))
+ r = SCPE_IOERR;
+ }
+ }
+ }
+ if (!sim_quiet) {
+ if (r == SCPE_OK)
+ printf ("\n%s%d: Verified %dMB. Done.\n", sim_dname (dptr), (int)(uptr-dptr->units), (int)(((t_offset)lba*sector_size)/1000000));
+ else {
+ t_lba i;
+ uint32 save_dctrl = dptr->dctrl;
+ FILE *save_sim_deb = sim_deb;
+
+ for (i = 0; i < (1024*1024/sector_size); ++i)
+ if (0 != memcmp (copy_buf+i*sector_size, verify_buf+i*sector_size, sector_size))
+ break;
+ printf ("\n%s%d: Verification Error on lbn %d.\n", sim_dname (dptr), (int)(uptr-dptr->units), lba+i);
+ dptr->dctrl = 0xFFFFFFFF;
+ sim_deb = stdout;
+ sim_disk_data_trace (uptr, copy_buf+i*sector_size, lba+i, sector_size, "Expected", TRUE, 1);
+ sim_disk_data_trace (uptr, verify_buf+i*sector_size, lba+i, sector_size, "Found", TRUE, 1);
+ dptr->dctrl = save_dctrl;
+ sim_deb = save_sim_deb;
+ }
+ }
+ free (verify_buf);
+ }
free (copy_buf);
sim_vhd_disk_close (vhd);
sim_disk_detach (uptr);
if (r == SCPE_OK) {
created = TRUE;
+ copied = TRUE;
strcpy (cptr, gbuf);
sim_disk_set_fmt (uptr, 0, "VHD", NULL);
sim_switches = saved_sim_switches;
@@ -1045,7 +1099,7 @@ uptr->pos = 0;
if (storage_function)
storage_function (uptr->fileref, &ctx->storage_sector_size, &ctx->removable);
-if (created) {
+if ((created) && (!copied)) {
t_stat r = SCPE_OK;
uint8 *secbuf = calloc (1, ctx->sector_size); /* alloc temp sector buf */
@@ -1203,7 +1257,9 @@ fprintf (st, " -F Open the indicated disk container in a specific fo
fprintf (st, " is to autodetect VHD defaulting to simh if the indicated\n");
fprintf (st, " container is not a VHD).\n");
fprintf (st, " -C Create a VHD and copy its contents from another disk (simh, VHD,\n");
-fprintf (st, " or RAW format).\n");
+fprintf (st, " or RAW format). Add a -V switch to verify a copy operation.\n");
+fprintf (st, " -V Perform a verification pass to confirm successful data copy\n");
+fprintf (st, " operation.\n");
fprintf (st, " -X When creating a VHD, create a fixed sized VHD (vs a Dynamically\n");
fprintf (st, " expanding one).\n");
fprintf (st, " -D Create a Differencing VHD (relative to an already existing VHD\n");
diff --git a/sim_serial.c b/sim_serial.c
index 444d9bc6..14678e95 100644
--- a/sim_serial.c
+++ b/sim_serial.c
@@ -170,6 +170,16 @@ for (i=0; i<serial_open_device_count; ++i)
return NULL;
}
+static struct open_serial_device *_get_open_device_byname (const char *name)
+{
+int i;
+
+for (i=0; i<serial_open_device_count; ++i)
+ if (0 == strcmp(name, serial_open_devices[i].name))
+ return &serial_open_devices[i];
+return NULL;
+}
+
static struct open_serial_device *_serial_add_to_open_list (SERHANDLE port, TMLN *line, const char *name, const char *config)
{
serial_open_devices = realloc(serial_open_devices, (++serial_open_device_count)*sizeof(*serial_open_devices));
@@ -421,6 +431,12 @@ else {
}
}
+if (_get_open_device_byname (savname)) {
+ if (stat)
+ *stat = SCPE_OPENERR;
+ return INVALID_HANDLE;
+ }
+
port = sim_open_os_serial (savname);
if (port == INVALID_HANDLE) {
diff --git a/sim_serial.h b/sim_serial.h
index b66f8219..463f8065 100644
--- a/sim_serial.h
+++ b/sim_serial.h
@@ -46,7 +46,7 @@
#define INVALID_HANDLE INVALID_HANDLE_VALUE
#endif /* !defined(INVALID_HANDLE) */
-#elif defined (__unix__) || defined(__APPLE__) /* UNIX definitions */
+#elif defined (__unix__) || defined (__APPLE__) || defined (__hpux) /* UNIX definitions */
#include <fcntl.h>
#ifdef __hpux
diff --git a/sim_sock.c b/sim_sock.c
index bcc67358..33a5f20c 100644
--- a/sim_sock.c
+++ b/sim_sock.c
@@ -840,6 +840,19 @@ fd_set rw_set, er_set;
fd_set *rw_p = &rw_set;
fd_set *er_p = &er_set;
struct timeval tz;
+struct sockaddr_storage peername;
+#if defined (macintosh) || defined (__linux) || defined (__linux__) || \
+ defined (__APPLE__) || defined (__OpenBSD__) || \
+ defined(__NetBSD__) || defined(__FreeBSD__) || \
+ (defined(__hpux) && defined(_XOPEN_SOURCE_EXTENDED))
+socklen_t peernamesize = (socklen_t)sizeof(peername);
+#elif defined (_WIN32) || defined (__EMX__) || \
+ (defined (__ALPHA) && defined (__unix__)) || \
+ defined (__hpux)
+int peernamesize = (int)sizeof(peername);
+#else
+size_t peernamesize = sizeof(peername);
+#endif
timerclear (&tz);
FD_ZERO (rw_p);
@@ -849,10 +862,13 @@ FD_SET (sock, er_p);
if (rd)
select ((int) sock + 1, rw_p, NULL, er_p, &tz);
else select ((int) sock + 1, NULL, rw_p, er_p, &tz);
-if (FD_ISSET (sock, rw_p))
- return 1;
if (FD_ISSET (sock, er_p))
return -1;
+if (FD_ISSET (sock, rw_p))
+ if (0 == getpeername (sock, (struct sockaddr *)&peername, &peernamesize))
+ return 1;
+ else
+ return -1;
return 0;
}
diff --git a/sim_tmxr.c b/sim_tmxr.c
index 8fa005f0..3a25cae5 100644
--- a/sim_tmxr.c
+++ b/sim_tmxr.c
@@ -1501,6 +1501,10 @@ t_bool nolog, notelnet, listennotelnet, unbuffered;
TMLN *lp;
t_stat r = SCPE_ARG;
+for (i = 0; i < mp->lines; i++) { /* initialize lines */
+ lp = mp->ldsc + i;
+ lp->mp = mp; /* set the back pointer */
+ }
tmxr_debug_trace (mp, "tmxr_open_master()");
while (*tptr) {
line = nextline;