3b2: Fix for clock drift when idling

When the 3B2 simulator was set to allow idling, there was significant
clock drift related to the primary timer unit. It turns out that the
simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack`
incorrectly. They are not needed with the structure of system timers in
the 3B2 architecture.
This commit is contained in:
Seth Morabito 2022-12-06 17:13:03 -08:00 committed by Paul Koning
parent dcd3e48048
commit da6dcef801
2 changed files with 0 additions and 3 deletions

View file

@ -388,7 +388,6 @@ static t_stat tod_svc(UNIT *uptr)
sim_activate_after(uptr, 1000000/CLK_TPS);
tmr_poll = t;
tmxr_poll = t;
AIO_SET_INTERRUPT_LATENCY(tmr_poll * CLK_TPS);
return SCPE_OK;
}

View file

@ -345,8 +345,6 @@ uint32 timer_read(uint32 pa, size_t size)
of also clearing pending interrupts */
CSRBIT(CSRCLK, FALSE);
CPU_CLR_INT(INT_CLOCK);
/* Acknowledge a clock tick */
sim_rtcn_tick_ack(1, TMR_CLK);
retval = 0;
break;
default: