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VAX8200: Cleanup potential compiler warnings

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- Properly initialize DIB structure arrays.
- Change use of snprintf to strlcpy to carefully avoid potential buffer
  overflow warnings.
This commit is contained in:
Mark Pizzolato 2020-10-19 12:27:53 -07:00
parent bf6ec441f5
commit dc4ce222e5
2 changed files with 11 additions and 10 deletions
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17
VAX/vax820_ka.c
View file

@ -102,7 +102,7 @@ extern void cpu_start (int32 cpu, uint32 addr);
kax_reg KAx register list
*/
DIB ka0_dib[] = { TR_KA0, 0, &ka_rdreg, &ka_wrreg, 0 };
DIB ka0_dib[] = { { TR_KA0, 0, &ka_rdreg, &ka_wrreg, 0 } };
UNIT ka0_unit = { UDATA (&ka_svc, 0, 0) };
@ -116,7 +116,7 @@ MTAB ka0_mod[] = {
{ 0 }
};
DIB ka1_dib[] = { TR_KA1, 0, &ka_rdreg, &ka_wrreg, 0 };
DIB ka1_dib[] = { { TR_KA1, 0, &ka_rdreg, &ka_wrreg, 0 } };
UNIT ka1_unit = { UDATA (&ka_svc, 0, 0) };
@ -296,10 +296,11 @@ switch (ch) {
rxcd_ibuf[rxcd_iptr++] = '\0'; /* terminator */
printf (">>> %s\n", &rxcd_ibuf[0]);
if (rxcd_ibuf[0] == 'D') { /* DEPOSIT */
snprintf (&conv[0], 2, "%s", &rxcd_ibuf[4]);
rg = (int32)get_uint (&conv[0], 16, 0xF, &r); /* get register number */
snprintf (&conv[0], 9, "%s", &rxcd_ibuf[6]);
rval = (int32)get_uint (&conv[0], 16, 0xFFFFFFFF, &r); /* get deposit value */
conv[0] = rxcd_ibuf[4];
conv[1] = '\0';
rg = (int32)get_uint (conv, 16, 0xF, &r); /* get register number */
strlcpy (conv, &rxcd_ibuf[6], 9);
rval = (int32)get_uint (conv, 16, 0xFFFFFFFF, &r); /* get deposit value */
#if defined (VAX_MP)
cpu_setreg (cpu, rg, rval);
#endif
@ -313,8 +314,8 @@ switch (ch) {
rxcd_optr = 0;
}
else if (rxcd_ibuf[0] == 'S') { /* START */
snprintf (&conv[0], 9, "%s", &rxcd_ibuf[2]);
rval = (int32)get_uint (&conv[0], 16, 0xFFFFFFFF, &r);
strlcpy (conv, &rxcd_ibuf[2], 9);
rval = (int32)get_uint (conv, 16, 0xFFFFFFFF, &r);
#if defined (VAX_MP)
cpu_start (cpu, rval);
#endif

4
VAX/vax820_mem.c
View file

@ -56,7 +56,7 @@ t_stat mctl_wrreg (int32 val, int32 pa, int32 mode);
mctlx_reg MCTLx register list
*/
DIB mctl0_dib[] = { TR_MCTL0, 0, &mctl_rdreg, &mctl_wrreg, 0 };
DIB mctl0_dib[] = { { TR_MCTL0, 0, &mctl_rdreg, &mctl_wrreg, 0 } };
UNIT mctl0_unit = { UDATA (NULL, 0, 0) };
@ -72,7 +72,7 @@ MTAB mctl0_mod[] = {
{ 0 }
};
DIB mctl1_dib[] = { TR_MCTL1, 0, &mctl_rdreg, &mctl_wrreg, 0 };
DIB mctl1_dib[] = { { TR_MCTL1, 0, &mctl_rdreg, &mctl_wrreg, 0 } };
UNIT mctl1_unit = { UDATA (NULL, 0, 0) };