folkert/simh-testsetgenerator
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Various simulators: Set line endings to CRLF for consistency, remove stray tabs

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Project standard source code has tabs converted to spaces and CRLF line
endings.

Other text files have CRLF line endings.
This commit is contained in:
Mark Pizzolato 2023-03-11 13:20:50 -10:00 • committed by Paul Koning
parent f1f8cf9cb1
commit decbe5b76b
53 changed files with 39065 additions and 39065 deletions
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2
3B2/3b2_scsi.c
View file

@ -1183,7 +1183,7 @@ static void ha_cmd(uint8 op, uint8 subdev, uint32 addr, int32 len, t_bool expres
void ha_ctrl(uint8 tc) void ha_ctrl(uint8 tc)
{ {
volatile t_bool txn_done; volatile t_bool txn_done;
uint32 i, j; uint32 i, j;
uint32 plen, ha_ptr; uint32 plen, ha_ptr;
uint32 in_len, out_len; uint32 in_len, out_len;
uint8 lu, status; uint8 lu, status;

4
AltairZ80/altairz80_sio.c
View file

@ -1771,12 +1771,12 @@ static int32 simh_out(const int32 port, const int32 data) {
if (genInterruptPos == 0) { if (genInterruptPos == 0) {
genInterruptVec = data; genInterruptVec = data;
genInterruptPos = 1; genInterruptPos = 1;
sim_printf("genInterruptVec=%d genInterruptPos=%d\n", genInterruptVec, genInterruptPos); sim_printf("genInterruptVec=%d genInterruptPos=%d\n", genInterruptVec, genInterruptPos);
} else { } else {
vectorInterrupt |= (1 << genInterruptVec); vectorInterrupt |= (1 << genInterruptVec);
dataBus[genInterruptVec] = data; dataBus[genInterruptVec] = data;
genInterruptPos = lastCommand = 0; genInterruptPos = lastCommand = 0;
sim_printf("genInterruptVec=%d vectorInterrupt=%X dataBus=%02X genInterruptPos=%d\n", genInterruptVec, vectorInterrupt, data, genInterruptPos); sim_printf("genInterruptVec=%d vectorInterrupt=%X dataBus=%02X genInterruptPos=%d\n", genInterruptVec, vectorInterrupt, data, genInterruptPos);
} }
break; break;
case setFCBAddressCmd: case setFCBAddressCmd:

248
AltairZ80/m68k/example/softfloat/softfloat.h
View file

@ -47,13 +47,13 @@ typedef bits32 float32;
typedef bits64 float64; typedef bits64 float64;
#ifdef FLOATX80 #ifdef FLOATX80
typedef struct { typedef struct {
bits16 high; bits16 high;
bits64 low; bits64 low;
} floatx80; } floatx80;
#endif #endif
#ifdef FLOAT128 #ifdef FLOAT128
typedef struct { typedef struct {
bits64 high, low; bits64 high, low;
} float128; } float128;
#endif #endif
@ -69,8 +69,8 @@ typedef struct {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_detect_tininess; extern int8 float_detect_tininess;
enum { enum {
float_tininess_after_rounding = 0, float_tininess_after_rounding = 0,
float_tininess_before_rounding = 1 float_tininess_before_rounding = 1
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
@ -78,10 +78,10 @@ enum {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_rounding_mode; extern int8 float_rounding_mode;
enum { enum {
float_round_nearest_even = 0, float_round_nearest_even = 0,
float_round_to_zero = 1, float_round_to_zero = 1,
float_round_down = 2, float_round_down = 2,
float_round_up = 3 float_round_up = 3
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
@ -89,8 +89,8 @@ enum {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_exception_flags; extern int8 float_exception_flags;
enum { enum {
float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08, float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
float_flag_underflow = 0x10, float_flag_inexact = 0x20 float_flag_underflow = 0x10, float_flag_inexact = 0x20
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
@ -208,11 +208,11 @@ floatx80 floatx80_scale(floatx80 a, floatx80 b);
static inline floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static inline floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
{ {
floatx80 z; floatx80 z;
z.low = zSig; z.low = zSig;
z.high = ( ( (bits16) zSign )<<15 ) + zExp; z.high = ( ( (bits16) zSign )<<15 ) + zExp;
return z; return z;
} }
@ -301,13 +301,13 @@ flag float128_is_signaling_nan( float128 );
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
static inline float128 static inline float128
packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{ {
float128 z; float128 z;
z.low = zSig1; z.low = zSig1;
z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0; z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
return z; return z;
} }
@ -333,92 +333,92 @@ static inline float128
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
static inline float128 static inline float128
roundAndPackFloat128( roundAndPackFloat128(
flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 ) flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )
{ {
int8 roundingMode; int8 roundingMode;
flag roundNearestEven, increment, isTiny; flag roundNearestEven, increment, isTiny;
roundingMode = float_rounding_mode; roundingMode = float_rounding_mode;
roundNearestEven = ( roundingMode == float_round_nearest_even ); roundNearestEven = ( roundingMode == float_round_nearest_even );
increment = ( (sbits64) zSig2 < 0 ); increment = ( (sbits64) zSig2 < 0 );
if ( ! roundNearestEven ) { if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) { if ( roundingMode == float_round_to_zero ) {
increment = 0; increment = 0;
} }
else { else {
if ( zSign ) { if ( zSign ) {
increment = ( roundingMode == float_round_down ) && zSig2; increment = ( roundingMode == float_round_down ) && zSig2;
} }
else { else {
increment = ( roundingMode == float_round_up ) && zSig2; increment = ( roundingMode == float_round_up ) && zSig2;
} }
} }
} }
if ( 0x7FFD <= (bits32) zExp ) { if ( 0x7FFD <= (bits32) zExp ) {
if ( ( 0x7FFD < zExp ) if ( ( 0x7FFD < zExp )
|| ( ( zExp == 0x7FFD ) || ( ( zExp == 0x7FFD )
&& eq128( && eq128(
LIT64( 0x0001FFFFFFFFFFFF ), LIT64( 0x0001FFFFFFFFFFFF ),
LIT64( 0xFFFFFFFFFFFFFFFF ), LIT64( 0xFFFFFFFFFFFFFFFF ),
zSig0, zSig0,
zSig1 zSig1
) )
&& increment && increment
) )
) { ) {
float_raise( float_flag_overflow | float_flag_inexact ); float_raise( float_flag_overflow | float_flag_inexact );
if ( ( roundingMode == float_round_to_zero ) if ( ( roundingMode == float_round_to_zero )
|| ( zSign && ( roundingMode == float_round_up ) ) || ( zSign && ( roundingMode == float_round_up ) )
|| ( ! zSign && ( roundingMode == float_round_down ) ) || ( ! zSign && ( roundingMode == float_round_down ) )
) { ) {
return return
packFloat128( packFloat128(
zSign, zSign,
0x7FFE, 0x7FFE,
LIT64( 0x0000FFFFFFFFFFFF ), LIT64( 0x0000FFFFFFFFFFFF ),
LIT64( 0xFFFFFFFFFFFFFFFF ) LIT64( 0xFFFFFFFFFFFFFFFF )
); );
} }
return packFloat128( zSign, 0x7FFF, 0, 0 ); return packFloat128( zSign, 0x7FFF, 0, 0 );
} }
if ( zExp < 0 ) { if ( zExp < 0 ) {
isTiny = isTiny =
( float_detect_tininess == float_tininess_before_rounding ) ( float_detect_tininess == float_tininess_before_rounding )
|| ( zExp < -1 ) || ( zExp < -1 )
|| ! increment || ! increment
|| lt128( || lt128(
zSig0, zSig0,
zSig1, zSig1,
LIT64( 0x0001FFFFFFFFFFFF ), LIT64( 0x0001FFFFFFFFFFFF ),
LIT64( 0xFFFFFFFFFFFFFFFF ) LIT64( 0xFFFFFFFFFFFFFFFF )
); );
shift128ExtraRightJamming( shift128ExtraRightJamming(
zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 ); zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
zExp = 0; zExp = 0;
if ( isTiny && zSig2 ) float_raise( float_flag_underflow ); if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
if ( roundNearestEven ) { if ( roundNearestEven ) {
increment = ( (sbits64) zSig2 < 0 ); increment = ( (sbits64) zSig2 < 0 );
} }
else { else {
if ( zSign ) { if ( zSign ) {
increment = ( roundingMode == float_round_down ) && zSig2; increment = ( roundingMode == float_round_down ) && zSig2;
} }
else { else {
increment = ( roundingMode == float_round_up ) && zSig2; increment = ( roundingMode == float_round_up ) && zSig2;
} }
} }
} }
} }
if ( zSig2 ) float_exception_flags |= float_flag_inexact; if ( zSig2 ) float_exception_flags |= float_flag_inexact;
if ( increment ) { if ( increment ) {
add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 ); add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven ); zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
} }
else { else {
if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0; if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
} }
return packFloat128( zSign, zExp, zSig0, zSig1 ); return packFloat128( zSign, zExp, zSig0, zSig1 );
} }
@ -433,28 +433,28 @@ static inline float128
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
static inline float128 static inline float128
normalizeRoundAndPackFloat128( normalizeRoundAndPackFloat128(
flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{ {
int8 shiftCount; int8 shiftCount;
bits64 zSig2; bits64 zSig2;
if ( zSig0 == 0 ) { if ( zSig0 == 0 ) {
zSig0 = zSig1; zSig0 = zSig1;
zSig1 = 0; zSig1 = 0;
zExp -= 64; zExp -= 64;
} }
shiftCount = countLeadingZeros64( zSig0 ) - 15; shiftCount = countLeadingZeros64( zSig0 ) - 15;
if ( 0 <= shiftCount ) { if ( 0 <= shiftCount ) {
zSig2 = 0; zSig2 = 0;
shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 ); shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
} }
else { else {
shift128ExtraRightJamming( shift128ExtraRightJamming(
zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 ); zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
} }
zExp -= shiftCount; zExp -= shiftCount;
return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 ); return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
} }
#endif #endif

98
AltairZ80/m68k/m68k.h
View file

@ -93,62 +93,62 @@ extern "C" {
/* CPU types for use in m68k_set_cpu_type() */ /* CPU types for use in m68k_set_cpu_type() */
enum enum
{ {
M68K_CPU_TYPE_INVALID, M68K_CPU_TYPE_INVALID,
M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68000,
M68K_CPU_TYPE_68010, M68K_CPU_TYPE_68010,
M68K_CPU_TYPE_68EC020, M68K_CPU_TYPE_68EC020,
M68K_CPU_TYPE_68020, M68K_CPU_TYPE_68020,
M68K_CPU_TYPE_68EC030, M68K_CPU_TYPE_68EC030,
M68K_CPU_TYPE_68030, M68K_CPU_TYPE_68030,
M68K_CPU_TYPE_68EC040, M68K_CPU_TYPE_68EC040,
M68K_CPU_TYPE_68LC040, M68K_CPU_TYPE_68LC040,
M68K_CPU_TYPE_68040, M68K_CPU_TYPE_68040,
M68K_CPU_TYPE_SCC68070 M68K_CPU_TYPE_SCC68070
}; };
/* Registers used by m68k_get_reg() and m68k_set_reg() */ /* Registers used by m68k_get_reg() and m68k_set_reg() */
typedef enum typedef enum
{ {
/* Real registers */ /* Real registers */
M68K_REG_D0, /* Data registers */ M68K_REG_D0, /* Data registers */
M68K_REG_D1, M68K_REG_D1,
M68K_REG_D2, M68K_REG_D2,
M68K_REG_D3, M68K_REG_D3,
M68K_REG_D4, M68K_REG_D4,
M68K_REG_D5, M68K_REG_D5,
M68K_REG_D6, M68K_REG_D6,
M68K_REG_D7, M68K_REG_D7,
M68K_REG_A0, /* Address registers */ M68K_REG_A0, /* Address registers */
M68K_REG_A1, M68K_REG_A1,
M68K_REG_A2, M68K_REG_A2,
M68K_REG_A3, M68K_REG_A3,
M68K_REG_A4, M68K_REG_A4,
M68K_REG_A5, M68K_REG_A5,
M68K_REG_A6, M68K_REG_A6,
M68K_REG_A7, M68K_REG_A7,
M68K_REG_PC, /* Program Counter */ M68K_REG_PC, /* Program Counter */
M68K_REG_SR, /* Status Register */ M68K_REG_SR, /* Status Register */
M68K_REG_SP, /* The current Stack Pointer (located in A7) */ M68K_REG_SP, /* The current Stack Pointer (located in A7) */
M68K_REG_USP, /* User Stack Pointer */ M68K_REG_USP, /* User Stack Pointer */
M68K_REG_ISP, /* Interrupt Stack Pointer */ M68K_REG_ISP, /* Interrupt Stack Pointer */
M68K_REG_MSP, /* Master Stack Pointer */ M68K_REG_MSP, /* Master Stack Pointer */
M68K_REG_SFC, /* Source Function Code */ M68K_REG_SFC, /* Source Function Code */
M68K_REG_DFC, /* Destination Function Code */ M68K_REG_DFC, /* Destination Function Code */
M68K_REG_VBR, /* Vector Base Register */ M68K_REG_VBR, /* Vector Base Register */
M68K_REG_CACR, /* Cache Control Register */ M68K_REG_CACR, /* Cache Control Register */
M68K_REG_CAAR, /* Cache Address Register */ M68K_REG_CAAR, /* Cache Address Register */
/* Assumed registers */ /* Assumed registers */
/* These are cheat registers which emulate the 1-longword prefetch /* These are cheat registers which emulate the 1-longword prefetch
* present in the 68000 and 68010. * present in the 68000 and 68010.
*/ */
M68K_REG_PREF_ADDR, /* Last prefetch address */ M68K_REG_PREF_ADDR, /* Last prefetch address */
M68K_REG_PREF_DATA, /* Last prefetch data */ M68K_REG_PREF_DATA, /* Last prefetch data */
/* Convenience registers */ /* Convenience registers */
M68K_REG_PPC, /* Previous value in the program counter */ M68K_REG_PPC, /* Previous value in the program counter */
M68K_REG_IR, /* Instruction register */ M68K_REG_IR, /* Instruction register */
M68K_REG_CPU_TYPE /* Type of CPU being run */ M68K_REG_CPU_TYPE /* Type of CPU being run */
} m68k_register_t; } m68k_register_t;
/* ======================================================================== */ /* ======================================================================== */

2
AltairZ80/m68k/m68kconf.h
View file

@ -142,7 +142,7 @@
* You should put OPT_SPECIFY_HANDLER here if you cant to use it, otherwise it will * You should put OPT_SPECIFY_HANDLER here if you cant to use it, otherwise it will
* use a dummy default handler and you'll have to call m68k_set_illg_instr_callback explicitely * use a dummy default handler and you'll have to call m68k_set_illg_instr_callback explicitely
*/ */
#define M68K_ILLG_HAS_CALLBACK OPT_OFF #define M68K_ILLG_HAS_CALLBACK OPT_OFF
#define M68K_ILLG_CALLBACK(opcode) op_illg(opcode) #define M68K_ILLG_CALLBACK(opcode) op_illg(opcode)
/* If ON, CPU will call the set fc callback on every memory access to /* If ON, CPU will call the set fc callback on every memory access to

1722
AltairZ80/m68k/m68kcpu.c
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File diff suppressed because it is too large Load diff

1662
AltairZ80/m68k/m68kcpu.h
View file

File diff suppressed because it is too large Load diff

4474
AltairZ80/m68k/m68kdasm.c
View file

File diff suppressed because it is too large Load diff

2878
AltairZ80/m68k/m68kfpu.c
View file

File diff suppressed because it is too large Load diff

518
AltairZ80/m68k/m68kmmu.h
View file

@ -8,314 +8,314 @@
*/ */
/* /*
pmmu_translate_addr: perform 68851/68030-style PMMU address translation pmmu_translate_addr: perform 68851/68030-style PMMU address translation
*/ */
uint pmmu_translate_addr(uint addr_in) uint pmmu_translate_addr(uint addr_in)
{ {
uint32 addr_out, tbl_entry = 0, tbl_entry2, tamode = 0, tbmode = 0, tcmode = 0; uint32 addr_out, tbl_entry = 0, tbl_entry2, tamode = 0, tbmode = 0, tcmode = 0;
uint root_aptr, root_limit, tofs, is, abits, bbits, cbits; uint root_aptr, root_limit, tofs, is, abits, bbits, cbits;
uint resolved, tptr, shift; uint resolved, tptr, shift;
resolved = 0; resolved = 0;
addr_out = addr_in; addr_out = addr_in;
// if SRP is enabled and we're in supervisor mode, use it // if SRP is enabled and we're in supervisor mode, use it
if ((m68ki_cpu.mmu_tc & 0x02000000) && (m68ki_get_sr() & 0x2000)) if ((m68ki_cpu.mmu_tc & 0x02000000) && (m68ki_get_sr() & 0x2000))
{ {
root_aptr = m68ki_cpu.mmu_srp_aptr; root_aptr = m68ki_cpu.mmu_srp_aptr;
root_limit = m68ki_cpu.mmu_srp_limit; root_limit = m68ki_cpu.mmu_srp_limit;
} }
else // else use the CRP else // else use the CRP
{ {
root_aptr = m68ki_cpu.mmu_crp_aptr; root_aptr = m68ki_cpu.mmu_crp_aptr;
root_limit = m68ki_cpu.mmu_crp_limit; root_limit = m68ki_cpu.mmu_crp_limit;
} }
// get initial shift (# of top bits to ignore) // get initial shift (# of top bits to ignore)
is = (m68ki_cpu.mmu_tc>>16) & 0xf; is = (m68ki_cpu.mmu_tc>>16) & 0xf;
abits = (m68ki_cpu.mmu_tc>>12)&0xf; abits = (m68ki_cpu.mmu_tc>>12)&0xf;
bbits = (m68ki_cpu.mmu_tc>>8)&0xf; bbits = (m68ki_cpu.mmu_tc>>8)&0xf;
cbits = (m68ki_cpu.mmu_tc>>4)&0xf; cbits = (m68ki_cpu.mmu_tc>>4)&0xf;
// fprintf(stderr,"PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68ki_cpu.mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); // fprintf(stderr,"PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68ki_cpu.mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits);
// get table A offset // get table A offset
tofs = (addr_in<<is)>>(32-abits); tofs = (addr_in<<is)>>(32-abits);
// find out what format table A is // find out what format table A is
switch (root_limit & 3) switch (root_limit & 3)
{ {
case 0: // invalid, should cause MMU exception case 0: // invalid, should cause MMU exception
case 1: // page descriptor, should cause direct mapping case 1: // page descriptor, should cause direct mapping
fatalerror("680x0 PMMU: Unhandled root mode\n"); fatalerror("680x0 PMMU: Unhandled root mode\n");
break; break;
case 2: // valid 4 byte descriptors case 2: // valid 4 byte descriptors
tofs *= 4; tofs *= 4;
// fprintf(stderr,"PMMU: reading table A entry at %08x\n", tofs + (root_aptr & 0xfffffffc)); // fprintf(stderr,"PMMU: reading table A entry at %08x\n", tofs + (root_aptr & 0xfffffffc));
tbl_entry = m68k_read_memory_32( tofs + (root_aptr & 0xfffffffc)); tbl_entry = m68k_read_memory_32( tofs + (root_aptr & 0xfffffffc));
tamode = tbl_entry & 3; tamode = tbl_entry & 3;
// fprintf(stderr,"PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs); // fprintf(stderr,"PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs);
break; break;
case 3: // valid 8 byte descriptors case 3: // valid 8 byte descriptors
tofs *= 8; tofs *= 8;
// fprintf(stderr,"PMMU: reading table A entries at %08x\n", tofs + (root_aptr & 0xfffffffc)); // fprintf(stderr,"PMMU: reading table A entries at %08x\n", tofs + (root_aptr & 0xfffffffc));
tbl_entry2 = m68k_read_memory_32( tofs + (root_aptr & 0xfffffffc)); tbl_entry2 = m68k_read_memory_32( tofs + (root_aptr & 0xfffffffc));
tbl_entry = m68k_read_memory_32( tofs + (root_aptr & 0xfffffffc)+4); tbl_entry = m68k_read_memory_32( tofs + (root_aptr & 0xfffffffc)+4);
tamode = tbl_entry2 & 3; tamode = tbl_entry2 & 3;
// fprintf(stderr,"PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs); // fprintf(stderr,"PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs);
break; break;
} }
// get table B offset and pointer // get table B offset and pointer
tofs = (addr_in<<(is+abits))>>(32-bbits); tofs = (addr_in<<(is+abits))>>(32-bbits);
tptr = tbl_entry & 0xfffffff0; tptr = tbl_entry & 0xfffffff0;
// find out what format table B is, if any // find out what format table B is, if any
switch (tamode) switch (tamode)
{ {
case 0: // invalid, should cause MMU exception case 0: // invalid, should cause MMU exception
fatalerror("680x0 PMMU: Unhandled Table A mode %d (addr_in %08x)\n", tamode, addr_in); fatalerror("680x0 PMMU: Unhandled Table A mode %d (addr_in %08x)\n", tamode, addr_in);
break; break;
case 2: // 4-byte table B descriptor case 2: // 4-byte table B descriptor
tofs *= 4; tofs *= 4;
// fprintf(stderr,"PMMU: reading table B entry at %08x\n", tofs + tptr); // fprintf(stderr,"PMMU: reading table B entry at %08x\n", tofs + tptr);
tbl_entry = m68k_read_memory_32( tofs + tptr); tbl_entry = m68k_read_memory_32( tofs + tptr);
tbmode = tbl_entry & 3; tbmode = tbl_entry & 3;
// fprintf(stderr,"PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs); // fprintf(stderr,"PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
break; break;
case 3: // 8-byte table B descriptor case 3: // 8-byte table B descriptor
tofs *= 8; tofs *= 8;
// fprintf(stderr,"PMMU: reading table B entries at %08x\n", tofs + tptr); // fprintf(stderr,"PMMU: reading table B entries at %08x\n", tofs + tptr);
tbl_entry2 = m68k_read_memory_32( tofs + tptr); tbl_entry2 = m68k_read_memory_32( tofs + tptr);
tbl_entry = m68k_read_memory_32( tofs + tptr + 4); tbl_entry = m68k_read_memory_32( tofs + tptr + 4);
tbmode = tbl_entry2 & 3; tbmode = tbl_entry2 & 3;
// fprintf(stderr,"PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs); // fprintf(stderr,"PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break; break;
case 1: // early termination descriptor case 1: // early termination descriptor
tbl_entry &= 0xffffff00; tbl_entry &= 0xffffff00;
shift = is+abits; shift = is+abits;
addr_out = ((addr_in<<shift)>>shift) + tbl_entry; addr_out = ((addr_in<<shift)>>shift) + tbl_entry;
resolved = 1; resolved = 1;
break; break;
} }
// if table A wasn't early-out, continue to process table B // if table A wasn't early-out, continue to process table B
if (!resolved) if (!resolved)
{ {
// get table C offset and pointer // get table C offset and pointer
tofs = (addr_in<<(is+abits+bbits))>>(32-cbits); tofs = (addr_in<<(is+abits+bbits))>>(32-cbits);
tptr = tbl_entry & 0xfffffff0; tptr = tbl_entry & 0xfffffff0;
switch (tbmode) switch (tbmode)
{ {
case 0: // invalid, should cause MMU exception case 0: // invalid, should cause MMU exception
fatalerror("680x0 PMMU: Unhandled Table B mode %d (addr_in %08x PC %x)\n", tbmode, addr_in, REG_PC); fatalerror("680x0 PMMU: Unhandled Table B mode %d (addr_in %08x PC %x)\n", tbmode, addr_in, REG_PC);
break; break;
case 2: // 4-byte table C descriptor case 2: // 4-byte table C descriptor
tofs *= 4; tofs *= 4;
// fprintf(stderr,"PMMU: reading table C entry at %08x\n", tofs + tptr); // fprintf(stderr,"PMMU: reading table C entry at %08x\n", tofs + tptr);
tbl_entry = m68k_read_memory_32(tofs + tptr); tbl_entry = m68k_read_memory_32(tofs + tptr);
tcmode = tbl_entry & 3; tcmode = tbl_entry & 3;
// fprintf(stderr,"PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs); // fprintf(stderr,"PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
break; break;
case 3: // 8-byte table C descriptor case 3: // 8-byte table C descriptor
tofs *= 8; tofs *= 8;
// fprintf(stderr,"PMMU: reading table C entries at %08x\n", tofs + tptr); // fprintf(stderr,"PMMU: reading table C entries at %08x\n", tofs + tptr);
tbl_entry2 = m68k_read_memory_32(tofs + tptr); tbl_entry2 = m68k_read_memory_32(tofs + tptr);
tbl_entry = m68k_read_memory_32(tofs + tptr + 4); tbl_entry = m68k_read_memory_32(tofs + tptr + 4);
tcmode = tbl_entry2 & 3; tcmode = tbl_entry2 & 3;
// fprintf(stderr,"PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs); // fprintf(stderr,"PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break; break;
case 1: // termination descriptor case 1: // termination descriptor
tbl_entry &= 0xffffff00; tbl_entry &= 0xffffff00;
shift = is+abits+bbits; shift = is+abits+bbits;
addr_out = ((addr_in<<shift)>>shift) + tbl_entry; addr_out = ((addr_in<<shift)>>shift) + tbl_entry;
resolved = 1; resolved = 1;
break; break;
} }
} }
if (!resolved) if (!resolved)
{ {
switch (tcmode) switch (tcmode)
{ {
case 0: // invalid, should cause MMU exception case 0: // invalid, should cause MMU exception
case 2: // 4-byte ??? descriptor case 2: // 4-byte ??? descriptor
case 3: // 8-byte ??? descriptor case 3: // 8-byte ??? descriptor
fatalerror("680x0 PMMU: Unhandled Table B mode %d (addr_in %08x PC %x)\n", tbmode, addr_in, REG_PC); fatalerror("680x0 PMMU: Unhandled Table B mode %d (addr_in %08x PC %x)\n", tbmode, addr_in, REG_PC);
break; break;
case 1: // termination descriptor case 1: // termination descriptor
tbl_entry &= 0xffffff00; tbl_entry &= 0xffffff00;
shift = is+abits+bbits+cbits; shift = is+abits+bbits+cbits;
addr_out = ((addr_in<<shift)>>shift) + tbl_entry; addr_out = ((addr_in<<shift)>>shift) + tbl_entry;
resolved = 1; resolved = 1;
break; break;
} }
} }
// fprintf(stderr,"PMMU: [%08x] => [%08x]\n", addr_in, addr_out); // fprintf(stderr,"PMMU: [%08x] => [%08x]\n", addr_in, addr_out);
return addr_out; return addr_out;
} }
/* /*
m68881_mmu_ops: COP 0 MMU opcode handling m68881_mmu_ops: COP 0 MMU opcode handling
*/ */
void m68881_mmu_ops(void) void m68881_mmu_ops(void)
{ {
uint16 modes; uint16 modes;
uint32 ea = m68ki_cpu.ir & 0x3f; uint32 ea = m68ki_cpu.ir & 0x3f;
uint64 temp64; uint64 temp64;
// catch the 2 "weird" encodings up front (PBcc) // catch the 2 "weird" encodings up front (PBcc)
if ((m68ki_cpu.ir & 0xffc0) == 0xf0c0) if ((m68ki_cpu.ir & 0xffc0) == 0xf0c0)
{ {
fprintf(stderr,"680x0: unhandled PBcc\n"); fprintf(stderr,"680x0: unhandled PBcc\n");
return; return;
} }
else if ((m68ki_cpu.ir & 0xffc0) == 0xf080) else if ((m68ki_cpu.ir & 0xffc0) == 0xf080)
{ {
fprintf(stderr,"680x0: unhandled PBcc\n"); fprintf(stderr,"680x0: unhandled PBcc\n");
return; return;
} }
else // the rest are 1111000xxxXXXXXX where xxx is the instruction family else // the rest are 1111000xxxXXXXXX where xxx is the instruction family
{ {
switch ((m68ki_cpu.ir>>9) & 0x7) switch ((m68ki_cpu.ir>>9) & 0x7)
{ {
case 0: case 0:
modes = OPER_I_16(); modes = OPER_I_16();
if ((modes & 0xfde0) == 0x2000) // PLOAD if ((modes & 0xfde0) == 0x2000) // PLOAD
{ {
fprintf(stderr,"680x0: unhandled PLOAD\n"); fprintf(stderr,"680x0: unhandled PLOAD\n");
return; return;
} }
else if ((modes & 0xe200) == 0x2000) // PFLUSH else if ((modes & 0xe200) == 0x2000) // PFLUSH
{ {
fprintf(stderr,"680x0: unhandled PFLUSH PC=%x\n", REG_PC); fprintf(stderr,"680x0: unhandled PFLUSH PC=%x\n", REG_PC);
return; return;
} }
else if (modes == 0xa000) // PFLUSHR else if (modes == 0xa000) // PFLUSHR
{ {
fprintf(stderr,"680x0: unhandled PFLUSHR\n"); fprintf(stderr,"680x0: unhandled PFLUSHR\n");
return; return;
} }
else if (modes == 0x2800) // PVALID (FORMAT 1) else if (modes == 0x2800) // PVALID (FORMAT 1)
{ {
fprintf(stderr,"680x0: unhandled PVALID1\n"); fprintf(stderr,"680x0: unhandled PVALID1\n");
return; return;
} }
else if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2) else if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
{ {
fprintf(stderr,"680x0: unhandled PVALID2\n"); fprintf(stderr,"680x0: unhandled PVALID2\n");
return; return;
} }
else if ((modes & 0xe000) == 0x8000) // PTEST else if ((modes & 0xe000) == 0x8000) // PTEST
{ {
fprintf(stderr,"680x0: unhandled PTEST\n"); fprintf(stderr,"680x0: unhandled PTEST\n");
return; return;
} }
else else
{ {
switch ((modes>>13) & 0x7) switch ((modes>>13) & 0x7)
{ {
case 0: // MC68030/040 form with FD bit case 0: // MC68030/040 form with FD bit
case 2: // MC68881 form, FD never set case 2: // MC68881 form, FD never set
if (modes & 0x200) if (modes & 0x200)
{ {
switch ((modes>>10) & 7) switch ((modes>>10) & 7)
{ {
case 0: // translation control register case 0: // translation control register
WRITE_EA_32(ea, m68ki_cpu.mmu_tc); WRITE_EA_32(ea, m68ki_cpu.mmu_tc);
break; break;
case 2: // supervisor root pointer case 2: // supervisor root pointer
WRITE_EA_64(ea, (uint64)m68ki_cpu.mmu_srp_limit<<32 | (uint64)m68ki_cpu.mmu_srp_aptr); WRITE_EA_64(ea, (uint64)m68ki_cpu.mmu_srp_limit<<32 | (uint64)m68ki_cpu.mmu_srp_aptr);
break; break;
case 3: // CPU root pointer case 3: // CPU root pointer
WRITE_EA_64(ea, (uint64)m68ki_cpu.mmu_crp_limit<<32 | (uint64)m68ki_cpu.mmu_crp_aptr); WRITE_EA_64(ea, (uint64)m68ki_cpu.mmu_crp_limit<<32 | (uint64)m68ki_cpu.mmu_crp_aptr);
break; break;
default: default:
fprintf(stderr,"680x0: PMOVE from unknown MMU register %x, PC %x\n", (modes>>10) & 7, REG_PC); fprintf(stderr,"680x0: PMOVE from unknown MMU register %x, PC %x\n", (modes>>10) & 7, REG_PC);
break; break;
} }
} }
else else
{ {
switch ((modes>>10) & 7) switch ((modes>>10) & 7)
{ {
case 0: // translation control register case 0: // translation control register
m68ki_cpu.mmu_tc = READ_EA_32(ea); m68ki_cpu.mmu_tc = READ_EA_32(ea);
if (m68ki_cpu.mmu_tc & 0x80000000) if (m68ki_cpu.mmu_tc & 0x80000000)
{ {
m68ki_cpu.pmmu_enabled = 1; m68ki_cpu.pmmu_enabled = 1;
} }
else else
{ {
m68ki_cpu.pmmu_enabled = 0; m68ki_cpu.pmmu_enabled = 0;
} }
break; break;
case 2: // supervisor root pointer case 2: // supervisor root pointer
temp64 = READ_EA_64(ea); temp64 = READ_EA_64(ea);
m68ki_cpu.mmu_srp_limit = (temp64>>32) & 0xffffffff; m68ki_cpu.mmu_srp_limit = (temp64>>32) & 0xffffffff;
m68ki_cpu.mmu_srp_aptr = temp64 & 0xffffffff; m68ki_cpu.mmu_srp_aptr = temp64 & 0xffffffff;
break; break;
case 3: // CPU root pointer case 3: // CPU root pointer
temp64 = READ_EA_64(ea); temp64 = READ_EA_64(ea);
m68ki_cpu.mmu_crp_limit = (temp64>>32) & 0xffffffff; m68ki_cpu.mmu_crp_limit = (temp64>>32) & 0xffffffff;
m68ki_cpu.mmu_crp_aptr = temp64 & 0xffffffff; m68ki_cpu.mmu_crp_aptr = temp64 & 0xffffffff;
break; break;
default: default:
fprintf(stderr,"680x0: PMOVE to unknown MMU register %x, PC %x\n", (modes>>10) & 7, REG_PC); fprintf(stderr,"680x0: PMOVE to unknown MMU register %x, PC %x\n", (modes>>10) & 7, REG_PC);
break; break;
} }
} }
break; break;
case 3: // MC68030 to/from status reg case 3: // MC68030 to/from status reg
if (modes & 0x200) if (modes & 0x200)
{ {
WRITE_EA_32(ea, m68ki_cpu.mmu_sr); WRITE_EA_32(ea, m68ki_cpu.mmu_sr);
} }
else else
{ {
m68ki_cpu.mmu_sr = READ_EA_32(ea); m68ki_cpu.mmu_sr = READ_EA_32(ea);
} }
break; break;
default: default:
fprintf(stderr,"680x0: unknown PMOVE mode %x (modes %04x) (PC %x)\n", (modes>>13) & 0x7, modes, REG_PC); fprintf(stderr,"680x0: unknown PMOVE mode %x (modes %04x) (PC %x)\n", (modes>>13) & 0x7, modes, REG_PC);
break; break;
} }
} }
break; break;
default: default:
fprintf(stderr,"680x0: unknown PMMU instruction group %d\n", (m68ki_cpu.ir>>9) & 0x7); fprintf(stderr,"680x0: unknown PMMU instruction group %d\n", (m68ki_cpu.ir>>9) & 0x7);
break; break;
} }
} }
} }

6428
AltairZ80/m68k/softfloat/softfloat.c
View file

File diff suppressed because it is too large Load diff

248
AltairZ80/m68k/softfloat/softfloat.h
View file

@ -47,13 +47,13 @@ typedef bits32 float32;
typedef bits64 float64; typedef bits64 float64;
#ifdef FLOATX80 #ifdef FLOATX80
typedef struct { typedef struct {
bits16 high; bits16 high;
bits64 low; bits64 low;
} floatx80; } floatx80;
#endif #endif
#ifdef FLOAT128 #ifdef FLOAT128
typedef struct { typedef struct {
bits64 high, low; bits64 high, low;
} float128; } float128;
#endif #endif
@ -69,8 +69,8 @@ typedef struct {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_detect_tininess; extern int8 float_detect_tininess;
enum { enum {
float_tininess_after_rounding = 0, float_tininess_after_rounding = 0,
float_tininess_before_rounding = 1 float_tininess_before_rounding = 1
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
@ -78,10 +78,10 @@ enum {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_rounding_mode; extern int8 float_rounding_mode;
enum { enum {
float_round_nearest_even = 0, float_round_nearest_even = 0,
float_round_to_zero = 1, float_round_to_zero = 1,
float_round_down = 2, float_round_down = 2,
float_round_up = 3 float_round_up = 3
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
@ -89,8 +89,8 @@ enum {
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
extern int8 float_exception_flags; extern int8 float_exception_flags;
enum { enum {
float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08, float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
float_flag_underflow = 0x10, float_flag_inexact = 0x20 float_flag_underflow = 0x10, float_flag_inexact = 0x20
}; };
/*---------------------------------------------------------------------------- /*----------------------------------------------------------------------------
@ -208,11 +208,11 @@ floatx80 floatx80_scale(floatx80 a, floatx80 b);
static inline floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static inline floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
{ {
floatx80 z; floatx80 z;
z.low = zSig; z.low = zSig;
z.high = ( ( (bits16) zSign )<<15 ) + zExp; z.high = ( ( (bits16) zSign )<<15 ) + zExp;
return z; return z;
} }
@ -301,13 +301,13 @@ flag float128_is_signaling_nan( float128 );
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
static inline float128 static inline float128
packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{ {
float128 z; float128 z;
z.low = zSig1; z.low = zSig1;
z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0; z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
return z; return z;
} }
@ -333,92 +333,92 @@ static inline float128
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
static inline float128 static inline float128
roundAndPackFloat128( roundAndPackFloat128(
flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 ) flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )
{ {
int8 roundingMode; int8 roundingMode;
flag roundNearestEven, increment, isTiny; flag roundNearestEven, increment, isTiny;
roundingMode = float_rounding_mode; roundingMode = float_rounding_mode;
roundNearestEven = ( roundingMode == float_round_nearest_even ); roundNearestEven = ( roundingMode == float_round_nearest_even );
increment = ( (sbits64) zSig2 < 0 ); increment = ( (sbits64) zSig2 < 0 );
if ( ! roundNearestEven ) { if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) { if ( roundingMode == float_round_to_zero ) {
increment = 0; increment = 0;
} }
else { else {
if ( zSign ) { if ( zSign ) {
increment = ( roundingMode == float_round_down ) && zSig2; increment = ( roundingMode == float_round_down ) && zSig2;
} }
else { else {
increment = ( roundingMode == float_round_up ) && zSig2; increment = ( roundingMode == float_round_up ) && zSig2;
} }
} }
} }
if ( 0x7FFD <= (bits32) zExp ) { if ( 0x7FFD <= (bits32) zExp ) {
if ( ( 0x7FFD < zExp ) if ( ( 0x7FFD < zExp )
|| ( ( zExp == 0x7FFD ) || ( ( zExp == 0x7FFD )
&& eq128( && eq128(
LIT64( 0x0001FFFFFFFFFFFF ), LIT64( 0x0001FFFFFFFFFFFF ),
LIT64( 0xFFFFFFFFFFFFFFFF ), LIT64( 0xFFFFFFFFFFFFFFFF ),
zSig0, zSig0,
zSig1 zSig1
) )
&& increment && increment
) )
) { ) {
float_raise( float_flag_overflow | float_flag_inexact ); float_raise( float_flag_overflow | float_flag_inexact );
if ( ( roundingMode == float_round_to_zero ) if ( ( roundingMode == float_round_to_zero )
|| ( zSign && ( roundingMode == float_round_up ) ) || ( zSign && ( roundingMode == float_round_up ) )
|| ( ! zSign && ( roundingMode == float_round_down ) ) || ( ! zSign && ( roundingMode == float_round_down ) )
) { ) {
return return
packFloat128( packFloat128(
zSign, zSign,
0x7FFE, 0x7FFE,
LIT64( 0x0000FFFFFFFFFFFF ), LIT64( 0x0000FFFFFFFFFFFF ),
LIT64( 0xFFFFFFFFFFFFFFFF ) LIT64( 0xFFFFFFFFFFFFFFFF )
); );
} }
return packFloat128( zSign, 0x7FFF, 0, 0 ); return packFloat128( zSign, 0x7FFF, 0, 0 );
} }
if ( zExp < 0 ) { if ( zExp < 0 ) {
isTiny = isTiny =
( float_detect_tininess == float_tininess_before_rounding ) ( float_detect_tininess == float_tininess_before_rounding )
|| ( zExp < -1 ) || ( zExp < -1 )
|| ! increment || ! increment
|| lt128( || lt128(
zSig0, zSig0,
zSig1, zSig1,
LIT64( 0x0001FFFFFFFFFFFF ), LIT64( 0x0001FFFFFFFFFFFF ),
LIT64( 0xFFFFFFFFFFFFFFFF ) LIT64( 0xFFFFFFFFFFFFFFFF )
); );
shift128ExtraRightJamming( shift128ExtraRightJamming(
zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 ); zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
zExp = 0; zExp = 0;
if ( isTiny && zSig2 ) float_raise( float_flag_underflow ); if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
if ( roundNearestEven ) { if ( roundNearestEven ) {
increment = ( (sbits64) zSig2 < 0 ); increment = ( (sbits64) zSig2 < 0 );
} }
else { else {
if ( zSign ) { if ( zSign ) {
increment = ( roundingMode == float_round_down ) && zSig2; increment = ( roundingMode == float_round_down ) && zSig2;
} }
else { else {
increment = ( roundingMode == float_round_up ) && zSig2; increment = ( roundingMode == float_round_up ) && zSig2;
} }
} }
} }
} }
if ( zSig2 ) float_exception_flags |= float_flag_inexact; if ( zSig2 ) float_exception_flags |= float_flag_inexact;
if ( increment ) { if ( increment ) {
add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 ); add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven ); zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
} }
else { else {
if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0; if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
} }
return packFloat128( zSign, zExp, zSig0, zSig1 ); return packFloat128( zSign, zExp, zSig0, zSig1 );
} }
@ -433,28 +433,28 @@ static inline float128
*----------------------------------------------------------------------------*/ *----------------------------------------------------------------------------*/
static inline float128 static inline float128
normalizeRoundAndPackFloat128( normalizeRoundAndPackFloat128(
flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{ {
int8 shiftCount; int8 shiftCount;
bits64 zSig2; bits64 zSig2;
if ( zSig0 == 0 ) { if ( zSig0 == 0 ) {
zSig0 = zSig1; zSig0 = zSig1;
zSig1 = 0; zSig1 = 0;
zExp -= 64; zExp -= 64;
} }
shiftCount = countLeadingZeros64( zSig0 ) - 15; shiftCount = countLeadingZeros64( zSig0 ) - 15;
if ( 0 <= shiftCount ) { if ( 0 <= shiftCount ) {
zSig2 = 0; zSig2 = 0;
shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 ); shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
} }
else { else {
shift128ExtraRightJamming( shift128ExtraRightJamming(
zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 ); zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
} }
zExp -= shiftCount; zExp -= shiftCount;
return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 ); return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
} }
#endif #endif

2
AltairZ80/s100_djhdc.c
View file

@ -155,7 +155,7 @@ static DJHDC_INFO djhdc_info_data = { { 0x0, 0, 0x54, 2 } };
static DJHDC_INFO *djhdc_info = &djhdc_info_data; static DJHDC_INFO *djhdc_info = &djhdc_info_data;
/* Disk geometries: /* Disk geometries:
* IMI SCRIBE * IMI SCRIBE
* Sectsize: 1024 1024 * Sectsize: 1024 1024
* Sectors: 8 8 * Sectors: 8 8
* Heads: 6 4 * Heads: 6 4

12
AltairZ80/wd179x.c
View file

@ -1203,15 +1203,15 @@ static uint8 Do1793Command(uint8 cCommand)
" Verify ", wd179x_info->sel_drive, PCX); " Verify ", wd179x_info->sel_drive, PCX);
if (pDrive->uptr->u3 == IMAGE_TYPE_IMD) { if (pDrive->uptr->u3 == IMAGE_TYPE_IMD) {
if (sectSeek(pDrive->imd, pDrive->track, wd179x_info->fdc_head) != SCPE_OK) { if (sectSeek(pDrive->imd, pDrive->track, wd179x_info->fdc_head) != SCPE_OK) {
sim_debug(SEEK_MSG, &wd179x_dev, "FAILED\n"); sim_debug(SEEK_MSG, &wd179x_dev, "FAILED\n");
wd179x_info->fdc_status |= WD179X_STAT_NOT_FOUND; /* Sector not found */ wd179x_info->fdc_status |= WD179X_STAT_NOT_FOUND; /* Sector not found */
} else if (testMode(pDrive)) { } else if (testMode(pDrive)) {
wd179x_info->fdc_status |= WD179X_STAT_NOT_FOUND; /* Sector not found */ wd179x_info->fdc_status |= WD179X_STAT_NOT_FOUND; /* Sector not found */
sim_debug(SEEK_MSG, &wd179x_dev, "NOT FOUND\n"); sim_debug(SEEK_MSG, &wd179x_dev, "NOT FOUND\n");
} else { } else {
sim_debug(SEEK_MSG, &wd179x_dev, "Ok\n"); sim_debug(SEEK_MSG, &wd179x_dev, "Ok\n");
} }
} }
} }
if (pDrive->track == 0) { if (pDrive->track == 0) {

2
BESM6/besm6_tty.c
View file

@ -1252,7 +1252,7 @@ void vt_receive()
* <enter>HYC<enter> needs to be typed * <enter>HYC<enter> needs to be typed
* to re-initialize the line * to re-initialize the line
*/ */
TTY_IN |= mask; /* "long start" */ TTY_IN |= mask; /* "long start" */
break; break;
} }
switch (tty_unit[num].flags & TTY_CHARSET_MASK) { switch (tty_unit[num].flags & TTY_CHARSET_MASK) {

4
Intel-Systems/common/i8080.c
View file

@ -1368,7 +1368,7 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
cnt++; cnt++;
} }
fprintf(fileref,"%02X\n", chk & BYTEMASK); fprintf(fileref,"%02X\n", chk & BYTEMASK);
addr += HLEN; addr += HLEN;
} }
if(addr < end) { //last record if(addr < end) { //last record
fprintf(fileref, ":%02X%04X00", end - addr, addr); fprintf(fileref, ":%02X%04X00", end - addr, addr);
@ -1383,7 +1383,7 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
cnt++; cnt++;
} }
fprintf(fileref, "%02X\n", chk); fprintf(fileref, "%02X\n", chk);
addr = end; addr = end;
} }
fprintf(fileref,":00000001FF\n"); //EOF record fprintf(fileref,":00000001FF\n"); //EOF record
} else { //binary } else { //binary

10
PDP11/pdp11_dz.c
View file

@ -844,8 +844,8 @@ for (dz = 0; dz < dz_desc.lines/DZ_LINES; dz++) {
for (muxln = 0; muxln < DZ_LINES; muxln++) { for (muxln = 0; muxln < DZ_LINES; muxln++) {
TMLN *lp = &dz_ldsc[(dz * DZ_LINES) + muxln]; TMLN *lp = &dz_ldsc[(dz * DZ_LINES) + muxln];
if (lp->serconfig) if (lp->serconfig)
tmxr_set_config_line (lp, lp->serconfig); /* make settings consistent */ tmxr_set_config_line (lp, lp->serconfig); /* make settings consistent */
} }
if (!dz_mctl || (0 == (dz_csr[dz] & CSR_MSE))) /* enabled? */ if (!dz_mctl || (0 == (dz_csr[dz] & CSR_MSE))) /* enabled? */
continue; continue;
@ -873,10 +873,10 @@ for (dz = 0; dz < dz_desc.lines/DZ_LINES; dz++) {
for (muxln = 0; muxln < DZ_LINES; muxln++) { for (muxln = 0; muxln < DZ_LINES; muxln++) {
TMLN *lp = &dz_ldsc[(dz * DZ_LINES) + muxln]; TMLN *lp = &dz_ldsc[(dz * DZ_LINES) + muxln];
free (lp->serconfig); free (lp->serconfig);
lp->serconfig = NULL; lp->serconfig = NULL;
} }
} }
return r; return r;
} }

14
PDP11/pdp11_mb.c
View file

@ -46,17 +46,17 @@ static uint32 history[HSIZE];
/* BITS IN MBCSR */ /* BITS IN MBCSR */
#define MBINTE 0100 #define MBINTE 0100
#define MBAFRZ 0200 #define MBAFRZ 0200
#define MBXAYR 0400 /* X<A<Y READ TRAP */ #define MBXAYR 0400 /* X<A<Y READ TRAP */
#define MBXAYW 01000 /* X<A<Y WRITE TRAP */ #define MBXAYW 01000 /* X<A<Y WRITE TRAP */
#define MBNOIN 02000 /* IGNORE INIT */ #define MBNOIN 02000 /* IGNORE INIT */
#define MBINAO 04000 /* INTERRUPT ON ALMOST OVERFLOW */ #define MBINAO 04000 /* INTERRUPT ON ALMOST OVERFLOW */
/* BITS IN MBXHGH AND MBYHGH*/ /* BITS IN MBXHGH AND MBYHGH*/
#define MBREDT 04 /* READ TRAP BIT */ #define MBREDT 04 /* READ TRAP BIT */
#define MBWRTT 010 /* WRITE TRAP BIT */ #define MBWRTT 010 /* WRITE TRAP BIT */
/* BITS IN MBHHGH */ /* BITS IN MBHHGH */
#define MBWRTB 04 /* WRITE BIT IN HISTORY MEMORY HIGH BITS */ #define MBWRTB 04 /* WRITE BIT IN HISTORY MEMORY HIGH BITS */
#define IOLN_MB 020 #define IOLN_MB 020
DIB mb_dib = { DIB mb_dib = {

12
PDP11/pdp11_tv.c
View file

@ -77,14 +77,14 @@ static uint16 RAM[64*FB];
#define TVINC 0077 /* Mask for the increment. */ #define TVINC 0077 /* Mask for the increment. */
/* TVSEL bits. */ /* TVSEL bits. */
#define TVRCNS 0077 /* The console number mask. */ #define TVRCNS 0077 /* The console number mask. */
#define TVNSH 0000 /* No shift write mode. */ #define TVNSH 0000 /* No shift write mode. */
#define TVIOR 0100 /* The inclusive or mode. */ #define TVIOR 0100 /* The inclusive or mode. */
#define TVXOR 0200 /* The xor mode. */ #define TVXOR 0200 /* The xor mode. */
#define TVMOV 0300 /* The move function. */ #define TVMOV 0300 /* The move function. */
/* TVSHR bits. */ /* TVSHR bits. */
#define TVSHCN 0017 /* The shift count. */ #define TVSHCN 0017 /* The shift count. */
/* TVCNSL bits. */ /* TVCNSL bits. */
#define SCROLL 007777 /* Scroll pointer. */ #define SCROLL 007777 /* Scroll pointer. */
@ -181,7 +181,7 @@ render_display (uint16 display)
if (display >= TV_WINDOWS) if (display >= TV_WINDOWS)
return; return;
sim_debug (DBG_VID, &tv_dev, "Render display %d buffer %d\n", sim_debug (DBG_VID, &tv_dev, "Render display %d buffer %d\n",
display, buffer); display, buffer);
for (i = 0; i < (TV_PIXELS / 8); i += 2) for (i = 0; i < (TV_PIXELS / 8); i += 2)
render_word (buffer, i); render_word (buffer, i);
tv_updated[display] = 1; tv_updated[display] = 1;

2
TX-0/tx0_defs.h
View file

@ -90,4 +90,4 @@
#define UNIT_MODE_TEST (1 << UNIT_V_MODE) #define UNIT_MODE_TEST (1 << UNIT_V_MODE)
#endif /* TX0_DEFS_H_ */ #endif /* TX0_DEFS_H_ */

2
display/iii.c
View file

@ -97,7 +97,7 @@ iii_draw_line(int x1, int y1, int x2, int y2, int l)
if (dy == 0) { if (dy == 0) {
for (i = 1; i < dx; i++) { for (i = 1; i < dx; i++) {
display_point(x1, y1, l, 0); display_point(x1, y1, l, 0);
x1+=ax; x1+=ax;
} }
return; return;
} }

8
scp.c
View file

@ -6637,10 +6637,10 @@ if (vdelt) {
if (1) { if (1) {
char mode[] = S_xstr(SIM_VERSION_MODE); char mode[] = S_xstr(SIM_VERSION_MODE);
if (NULL != strchr (mode, '\"')) { /* Quoted String? */ if (NULL != strchr (mode, '\"')) { /* Quoted String? */
mode[strlen (mode) - 1] = '\0'; /* strip quotes */ mode[strlen (mode) - 1] = '\0'; /* strip quotes */
memmove (mode, mode + 1, strlen (mode)); memmove (mode, mode + 1, strlen (mode));
} }
fprintf (st, " %s", mode); fprintf (st, " %s", mode);
setenv ("SIM_VERSION_MODE", mode, 1); setenv ("SIM_VERSION_MODE", mode, 1);
} }

4
swtp6800/common/m6800.c
View file

@ -2057,7 +2057,7 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
} }
chk = (~chk) & BYTEMASK; chk = (~chk) & BYTEMASK;
fprintf(fileref,"%02X\n", chk); fprintf(fileref,"%02X\n", chk);
addr += HLEN; addr += HLEN;
} }
if(addr < end) { //last record if(addr < end) { //last record
fprintf(fileref, "S1%02X%04X", end - addr + 3, addr); fprintf(fileref, "S1%02X%04X", end - addr + 3, addr);
@ -2073,7 +2073,7 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
} }
chk = (~chk) & BYTEMASK; chk = (~chk) & BYTEMASK;
fprintf(fileref, "%02X\n", chk); fprintf(fileref, "%02X\n", chk);
addr = end; addr = end;
} }
fprintf(fileref,"S9\n"); //EOF record fprintf(fileref,"S9\n"); //EOF record
} else { //binary } else { //binary

8
swtp6800/common/mp-s.c
View file

@ -335,23 +335,23 @@ int32 sio0d(int32 io, int32 data)
case 0x11: // PTR on case 0x11: // PTR on
ptr_flag = 1; ptr_flag = 1;
ptr_unit.u3 |= RXF; ptr_unit.u3 |= RXF;
printf("Reader on\n"); printf("Reader on\n");
break; break;
case 0x12: // PTP on case 0x12: // PTP on
ptp_flag = 1; ptp_flag = 1;
ptp_unit.u3 |= TXE; ptp_unit.u3 |= TXE;
printf("Punch on\n"); printf("Punch on\n");
break; break;
case 0x13: // PTR off case 0x13: // PTR off
ptr_flag = 0; ptr_flag = 0;
if (ptr_unit.pos) if (ptr_unit.pos)
printf("Reader off-%d bytes read\n", ptr_unit.pos); printf("Reader off-%d bytes read\n", ptr_unit.pos);
ptr_unit.pos = 0; ptr_unit.pos = 0;
break; break;
case 0x14: // PTP off case 0x14: // PTP off
ptp_flag = 0; ptp_flag = 0;
if (ptp_unit.pos) if (ptp_unit.pos)
printf("Punch off-%d bytes written\n", ptp_unit.pos); printf("Punch off-%d bytes written\n", ptp_unit.pos);
ptp_unit.pos = 0; ptp_unit.pos = 0;
break; break;
default: // ignore all other characters default: // ignore all other characters

2
tt2500/tt2500_dpy.c
View file

@ -63,7 +63,7 @@ int dpy_quit = FALSE;
4000 4000
6000 6000
tv-off tv-off-const 1 001 (unused) tv-off tv-off-const 1 001 (unused)
tv-green-const 2 010 (unused) tv-green-const 2 010 (unused)
tv-blank green-blank-const 4 100 (flash) tv-blank green-blank-const 4 100 (flash)

64
tt2500/tt2500_rom.c
View file

@ -63,37 +63,37 @@ uint16 tt2500_rom[] =
#if 0 #if 0
0010000, /* NOP */ 0010000, /* NOP */
0010000, /* NOP */ 0010000, /* NOP */
0010000, /* NOP */ 0010000, /* NOP */
0040025, /* PUSHJ GETC Call subroutine to read TTY character. */ 0040025, /* PUSHJ GETC Call subroutine to read TTY character. */
0007001, /* SUBI 0 WD 32-bit instruction computes 147577 - WD */ 0007001, /* SUBI 0 WD 32-bit instruction computes 147577 - WD */
0147577, /* 147577 (The constant "LOGO" is stored here.) */ 0147577, /* 147577 (The constant "LOGO" is stored here.) */
0133774, /* BNE START Branch to START if result Not zero. */ 0133774, /* BNE START Branch to START if result Not zero. */
0040022, /* PUSHJ GETW Reads 4 characters to make 16-bit word. */ 0040022, /* PUSHJ GETW Reads 4 characters to make 16-bit word. */
0074201, /* GET ADR WD Move word from WD to ADR (register 2). */ 0074201, /* GET ADR WD Move word from WD to ADR (register 2). */
0040022, /* PUSHJ GETW Get next data word into WD. */ 0040022, /* PUSHJ GETW Get next data word into WD. */
0074301, /* GET CNT WD Move it to CNT. */ 0074301, /* GET CNT WD Move it to CNT. */
0040022, /* PUSHJ GETW Get another data word. */ 0040022, /* PUSHJ GETW Get another data word. */
0004220, /* DEC ADR Decrement the Address and use it to */ 0004220, /* DEC ADR Decrement the Address and use it to */
0025100, /* CWRITE WD write [WD] into control memory. */ 0025100, /* CWRITE WD write [WD] into control memory. */
0004320, /* DEC CNT Decrement the word in CNT (count). */ 0004320, /* DEC CNT Decrement the word in CNT (count). */
0133773, /* BNE LOOP Branch to LOOP unless CNT is zero. */ 0133773, /* BNE LOOP Branch to LOOP unless CNT is zero. */
0074023, /* GET 0 XR Makes PC leave Bootstrap Loader. */ 0074023, /* GET 0 XR Makes PC leave Bootstrap Loader. */
0050100, /* JUMP 100 Jump to location 100. */ 0050100, /* JUMP 100 Jump to location 100. */
0040025, /* PUSHJ GETC Get 4 bits and shift into WD. */ 0040025, /* PUSHJ GETC Get 4 bits and shift into WD. */
0040025, /* PUSHJ GETC Get 4 more. */ 0040025, /* PUSHJ GETC Get 4 more. */
0040025, /* PUSHJ GETC Get 4 more. */ 0040025, /* PUSHJ GETC Get 4 more. */
0073320, /* DIS INTS 2 Skip 2 steps if TTY interrupt active. */ 0073320, /* DIS INTS 2 Skip 2 steps if TTY interrupt active. */
0050025, /* JUMP GETC If not, go back and wait. */ 0050025, /* JUMP GETC If not, go back and wait. */
0010000, /* NOP (Skip over this.) */ 0010000, /* NOP (Skip over this.) */
0074424, /* GET CH UART Put the character into CH. */ 0074424, /* GET CH UART Put the character into CH. */
0001444, /* ANDI CH CH Mask out all but last four bits by */ 0001444, /* ANDI CH CH Mask out all but last four bits by */
0000017, /* 17 ANDing with 0 000 000 000 001 111. */ 0000017, /* 17 ANDing with 0 000 000 000 001 111. */
0004114, /* ROT WD 14 Rotate WD four places right. */ 0004114, /* ROT WD 14 Rotate WD four places right. */
0001141, /* ANDI WD WD Zero out last four bits by */ 0001141, /* ANDI WD WD Zero out last four bits by */
0177760, /* 177760 ANDing with 1 111 111 111 110 000. */ 0177760, /* 177760 ANDing with 1 111 111 111 110 000. */
0002104, /* IOR WD CH Finally, OR them together. */ 0002104, /* IOR WD CH Finally, OR them together. */
0075600, /* POPJ Return to calling program. */ 0075600, /* POPJ Return to calling program. */
#endif #endif
}; };