PDP11: Add descriptions to register names and bitfields to the PSW register.
This commit is contained in:
Mark Pizzolato
parent
a729752466
commit
e054a78398
1 changed files with 79 additions and 61 deletions
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@ -385,62 +385,80 @@ int32 trap_clear[TRAP_V_MAX] = { /* trap clears */
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UNIT cpu_unit = { UDATA (NULL, UNIT_FIX|UNIT_BINK, INIMEMSIZE) };
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const char *psw_modes[] = {"K", "E", "S", "U"};
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BITFIELD psw_bits[] = {
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BIT(C), /* Carry */
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BIT(V), /* Overflow */
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BIT(Z), /* Zero */
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BIT(N), /* Negative */
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BIT(TBIT), /* trace trap */
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BITFFMT(IPL,3,%d), /* IPL */
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BIT(FPD), /* First Part Done */
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BITNCF(2), /* MBZ */
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BIT(RS), /* Register Set */
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BITFNAM(PM,2,psw_modes), /* Previous Access Mode */
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BITFNAM(CM,2,psw_modes), /* Current Access Mode */
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ENDBITS
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};
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REG cpu_reg[] = {
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{ ORDATA (PC, saved_PC, 16) },
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{ ORDATA (R0, REGFILE[0][0], 16) },
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{ ORDATA (R1, REGFILE[1][0], 16) },
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{ ORDATA (R2, REGFILE[2][0], 16) },
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{ ORDATA (R3, REGFILE[3][0], 16) },
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{ ORDATA (R4, REGFILE[4][0], 16) },
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{ ORDATA (R5, REGFILE[5][0], 16) },
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{ ORDATA (SP, STACKFILE[MD_KER], 16) },
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{ ORDATA (R00, REGFILE[0][0], 16) },
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{ ORDATA (R01, REGFILE[1][0], 16) },
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{ ORDATA (R02, REGFILE[2][0], 16) },
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{ ORDATA (R03, REGFILE[3][0], 16) },
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{ ORDATA (R04, REGFILE[4][0], 16) },
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{ ORDATA (R05, REGFILE[5][0], 16) },
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{ ORDATA (R10, REGFILE[0][1], 16) },
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{ ORDATA (R11, REGFILE[1][1], 16) },
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{ ORDATA (R12, REGFILE[2][1], 16) },
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{ ORDATA (R13, REGFILE[3][1], 16) },
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{ ORDATA (R14, REGFILE[4][1], 16) },
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{ ORDATA (R15, REGFILE[5][1], 16) },
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{ ORDATA (KSP, STACKFILE[MD_KER], 16) },
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{ ORDATA (SSP, STACKFILE[MD_SUP], 16) },
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{ ORDATA (USP, STACKFILE[MD_USR], 16) },
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{ ORDATA (PSW, PSW, 16) },
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{ GRDATA (CM, PSW, 8, 2, PSW_V_CM) },
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{ GRDATA (PM, PSW, 8, 2, PSW_V_PM) },
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{ FLDATA (RS, PSW, PSW_V_RS) },
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{ FLDATA (FPD, PSW, PSW_V_FPD) },
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{ GRDATA (IPL, PSW, 8, 3, PSW_V_IPL) },
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{ FLDATA (T, PSW, PSW_V_TBIT) },
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{ FLDATA (N, PSW, PSW_V_N) },
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{ FLDATA (Z, PSW, PSW_V_Z) },
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{ FLDATA (V, PSW, PSW_V_V) },
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{ FLDATA (C, PSW, PSW_V_C) },
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{ ORDATA (PIRQ, PIRQ, 16) },
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{ ORDATA (STKLIM, STKLIM, 16) },
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{ ORDATA (FAC0H, FR[0].h, 32) },
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{ ORDATA (FAC0L, FR[0].l, 32) },
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{ ORDATA (FAC1H, FR[1].h, 32) },
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{ ORDATA (FAC1L, FR[1].l, 32) },
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{ ORDATA (FAC2H, FR[2].h, 32) },
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{ ORDATA (FAC2L, FR[2].l, 32) },
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{ ORDATA (FAC3H, FR[3].h, 32) },
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{ ORDATA (FAC3L, FR[3].l, 32) },
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{ ORDATA (FAC4H, FR[4].h, 32) },
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{ ORDATA (FAC4L, FR[4].l, 32) },
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{ ORDATA (FAC5H, FR[5].h, 32) },
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{ ORDATA (FAC5L, FR[5].l, 32) },
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{ ORDATA (FPS, FPS, 16) },
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{ ORDATA (FEA, FEA, 16) },
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{ ORDATA (FEC, FEC, 4) },
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{ ORDATA (MMR0, MMR0, 16) },
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{ ORDATA (MMR1, MMR1, 16) },
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{ ORDATA (MMR2, MMR2, 16) },
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{ ORDATA (MMR3, MMR3, 16) },
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{ ORDATAD (PC, saved_PC, 16, "Program Counter") },
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{ ORDATAD (R0, REGFILE[0][0], 16, "General Purpose R0") },
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{ ORDATAD (R1, REGFILE[1][0], 16, "General Purpose R1") },
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{ ORDATAD (R2, REGFILE[2][0], 16, "General Purpose R2") },
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{ ORDATAD (R3, REGFILE[3][0], 16, "General Purpose R3") },
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{ ORDATAD (R4, REGFILE[4][0], 16, "General Purpose R4") },
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{ ORDATAD (R5, REGFILE[5][0], 16, "General Purpose R5") },
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{ ORDATAD (SP, STACKFILE[MD_KER], 16, "Stack Pointer"), },
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{ ORDATAD (R00, REGFILE[0][0], 16, "Register File R00") },
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{ ORDATAD (R01, REGFILE[1][0], 16, "Register File R01") },
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{ ORDATAD (R02, REGFILE[2][0], 16, "Register File R02") },
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{ ORDATAD (R03, REGFILE[3][0], 16, "Register File R03") },
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{ ORDATAD (R04, REGFILE[4][0], 16, "Register File R04") },
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{ ORDATAD (R05, REGFILE[5][0], 16, "Register File R05") },
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{ ORDATAD (R10, REGFILE[0][1], 16, "Register File R10") },
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{ ORDATAD (R11, REGFILE[1][1], 16, "Register File R11") },
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{ ORDATAD (R12, REGFILE[2][1], 16, "Register File R12") },
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{ ORDATAD (R13, REGFILE[3][1], 16, "Register File R13") },
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{ ORDATAD (R14, REGFILE[4][1], 16, "Register File R14") },
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{ ORDATAD (R15, REGFILE[5][1], 16, "Register File R15") },
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{ ORDATAD (KSP, STACKFILE[MD_KER], 16, "Kernel Stack Pointer" ) },
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{ ORDATAD (SSP, STACKFILE[MD_SUP], 16, "Supervisor Stack Pointer" ) },
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{ ORDATAD (USP, STACKFILE[MD_USR], 16, "User Stack Pointer" ) },
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{ ORDATADF(PSW, PSW, 16, "Processor Status Word", psw_bits) },
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{ GRDATAD (CM, PSW, 8, 2, PSW_V_CM, "Current Mode") },
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{ GRDATAD (PM, PSW, 8, 2, PSW_V_PM, "Previous Mode") },
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{ FLDATAD (RS, PSW, PSW_V_RS, "Register Set") },
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{ FLDATAD (FPD, PSW, PSW_V_FPD, "First Part Done") },
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{ GRDATAD (IPL, PSW, 8, 3, PSW_V_IPL, "Interrupt Priority Level") },
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{ FLDATAD (T, PSW, PSW_V_TBIT, "Trace Trap") },
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{ FLDATAD (N, PSW, PSW_V_N, "Condition Code: Negative") },
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{ FLDATAD (Z, PSW, PSW_V_Z, "Condition Code: Zero") },
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{ FLDATAD (V, PSW, PSW_V_V, "Condition Code: Overflow") },
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{ FLDATAD (C, PSW, PSW_V_C, "Condition Code: Carry") },
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{ ORDATAD (PIRQ, PIRQ, 16, "Programmed Interrupt Request") },
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{ ORDATAD (STKLIM, STKLIM, 16, "Stack Limit") },
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{ ORDATAD (FAC0H, FR[0].h, 32, "Floating Point: R0 High") },
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{ ORDATAD (FAC0L, FR[0].l, 32, "Floating Point: R0 Low") },
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{ ORDATAD (FAC1H, FR[1].h, 32, "Floating Point: R1 High") },
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{ ORDATAD (FAC1L, FR[1].l, 32, "Floating Point: R1 Low") },
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{ ORDATAD (FAC2H, FR[2].h, 32, "Floating Point: R2 High") },
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{ ORDATAD (FAC2L, FR[2].l, 32, "Floating Point: R2 Low") },
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{ ORDATAD (FAC3H, FR[3].h, 32, "Floating Point: R3 High") },
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{ ORDATAD (FAC3L, FR[3].l, 32, "Floating Point: R3 Low") },
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{ ORDATAD (FAC4H, FR[4].h, 32, "Floating Point: R4 High") },
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{ ORDATAD (FAC4L, FR[4].l, 32, "Floating Point: R4 Low") },
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{ ORDATAD (FAC5H, FR[5].h, 32, "Floating Point: R5 High") },
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{ ORDATAD (FAC5L, FR[5].l, 32, "Floating Point: R5 Low") },
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{ ORDATAD (FPS, FPS, 16, "FP Status") },
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{ ORDATAD (FEA, FEA, 16, "FP Exception Code") },
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{ ORDATAD (FEC, FEC, 4, "FP Exception Address") },
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{ ORDATAD (MMR0, MMR0, 16, "MMR0 - Status") },
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{ ORDATAD (MMR1, MMR1, 16, "MMR1 - R+/-R") },
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{ ORDATAD (MMR2, MMR2, 16, "MMR2 - saved PC") },
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{ ORDATAD (MMR3, MMR3, 16, "MMR3 - 22b status") },
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{ GRDATA (KIPAR0, APRFILE[000], 8, 16, 16) },
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{ GRDATA (KIPDR0, APRFILE[000], 8, 16, 0) },
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{ GRDATA (KIPAR1, APRFILE[001], 8, 16, 16) },
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@ -537,13 +555,13 @@ REG cpu_reg[] = {
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{ GRDATA (UDPDR6, APRFILE[076], 8, 16, 0) },
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{ GRDATA (UDPAR7, APRFILE[077], 8, 16, 16) },
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{ GRDATA (UDPDR7, APRFILE[077], 8, 16, 0) },
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{ BRDATA (IREQ, int_req, 8, 32, IPL_HLVL), REG_RO },
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{ ORDATA (TRAPS, trap_req, TRAP_V_MAX) },
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{ FLDATA (WAIT, wait_state, 0) },
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{ BRDATAD (IREQ, int_req, 8, 32, IPL_HLVL, "Interrupt Requests"), REG_RO },
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{ ORDATAD (TRAPS, trap_req, TRAP_V_MAX, "Trap Requests") },
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{ FLDATAD (WAIT, wait_state, 0, "Wait State") },
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{ FLDATA (WAIT_ENABLE, wait_enable, 0), REG_HIDDEN },
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{ ORDATA (STOP_TRAPS, stop_trap, TRAP_V_MAX) },
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{ FLDATA (STOP_VECA, stop_vecabort, 0) },
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{ FLDATA (STOP_SPA, stop_spabort, 0) },
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{ ORDATAD (STOP_TRAPS, stop_trap, TRAP_V_MAX, "Stop on Trap") },
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{ FLDATAD (STOP_VECA, stop_vecabort, 0, "Stop on Vec Abort") },
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{ FLDATAD (STOP_SPA, stop_spabort, 0, "Stop on SP Abort") },
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{ FLDATA (AUTOCON, autcon_enb, 0), REG_HRO },
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{ BRDATA (PCQ, pcq, 8, 16, PCQ_SIZE), REG_RO+REG_CIRC },
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{ ORDATA (PCQP, pcq_p, 6), REG_HRO },
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