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Fixed DZ bug which referenced the wrong dz device when the number of DZ multiplexers configured was not a power of 2 (i.e.3, 5, 7, etc.)

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Mark Pizzolato 2013-05-16 10:18:07 -07:00
parent e8e751c2fd
commit e82507d9c8
1 changed files with 8 additions and 3 deletions
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11
PDP11/pdp11_dz.c
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@ -90,7 +90,7 @@ extern int32 int_req[IPL_HLVL];
#error "Too many DZ multiplexers" #error "Too many DZ multiplexers"
#endif #endif
#define DZ_MNOMASK (dz_desc.lines/DZ_LINES - 1) /* mask for mux no */ #define DZ_MAXMUX (dz_desc.lines/DZ_LINES - 1) /* maximul mux no */
#define DZ_LNOMASK (DZ_LINES - 1) /* mask for lineno */ #define DZ_LNOMASK (DZ_LINES - 1) /* mask for lineno */
#define DZ_LMASK ((1 << DZ_LINES) - 1) /* mask of lines */ #define DZ_LMASK ((1 << DZ_LINES) - 1) /* mask of lines */
#define DZ_SILO_ALM 16 /* silo alarm level */ #define DZ_SILO_ALM 16 /* silo alarm level */
@ -370,8 +370,10 @@ t_stat dz_rd (int32 *data, int32 PA, int32 access)
{ {
int i; int i;
static BITFIELD* bitdefs[] = {dz_csr_bits, dz_rbuf_bits, dz_tcr_bits, dz_msr_bits}; static BITFIELD* bitdefs[] = {dz_csr_bits, dz_rbuf_bits, dz_tcr_bits, dz_msr_bits};
int32 dz = ((PA - dz_dib.ba) >> 3) & DZ_MNOMASK; /* get mux num */ int32 dz = ((PA - dz_dib.ba) >> 3); /* get mux num */
if (dz > DZ_MAXMUX)
return SCPE_IERR;
switch ((PA >> 1) & 03) { /* case on PA<2:1> */ switch ((PA >> 1) & 03) { /* case on PA<2:1> */
case 00: /* CSR */ case 00: /* CSR */
@ -425,12 +427,15 @@ return SCPE_OK;
t_stat dz_wr (int32 data, int32 PA, int32 access) t_stat dz_wr (int32 data, int32 PA, int32 access)
{ {
int32 dz = ((PA - dz_dib.ba) >> 3) & DZ_MNOMASK; /* get mux num */ int32 dz = ((PA - dz_dib.ba) >> 3); /* get mux num */
static BITFIELD* bitdefs[] = {dz_csr_bits, dz_lpr_bits, dz_tcr_bits, dz_tdr_bits}; static BITFIELD* bitdefs[] = {dz_csr_bits, dz_lpr_bits, dz_tcr_bits, dz_tdr_bits};
int32 i, c, line; int32 i, c, line;
char lineconfig[16]; char lineconfig[16];
TMLN *lp; TMLN *lp;
if (dz > DZ_MAXMUX)
return SCPE_IERR;
sim_debug(DBG_REG, &dz_dev, "dz_wr(PA=0x%08X [%s], access=%d, data=0x%X) ", PA, dz_wr_regs[(PA >> 1) & 03], access, data); sim_debug(DBG_REG, &dz_dev, "dz_wr(PA=0x%08X [%s], access=%d, data=0x%X) ", PA, dz_wr_regs[(PA >> 1) & 03], access, data);
sim_debug_bits(DBG_REG, &dz_dev, bitdefs[(PA >> 1) & 03], (uint32)((PA & 1) ? data<<8 : data), (uint32)((PA & 1) ? data<<8 : data), TRUE); sim_debug_bits(DBG_REG, &dz_dev, bitdefs[(PA >> 1) & 03], (uint32)((PA & 1) ? data<<8 : data), (uint32)((PA & 1) ? data<<8 : data), TRUE);