folkert/simh-testsetgenerator
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Replaced printf with sim_printf.

Browse source
This commit is contained in:
Peter Schorn 2014-10-24 23:10:54 +02:00
parent e48cb518e8
commit ebf53c9cda
29 changed files with 303 additions and 304 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

176
AltairZ80/altairz80_cpu.c
View file

@ -1463,9 +1463,9 @@ static void altairz80_print_tables(void) {
for (i = 0; i < 256; i++) { for (i = 0; i < 256; i++) {
v = ((i & 1) + ((i & 2) >> 1) + ((i & 4) >> 2) + ((i & 8) >> 3) + v = ((i & 1) + ((i & 2) >> 1) + ((i & 4) >> 2) + ((i & 8) >> 3) +
((i & 16) >> 4) + ((i & 32) >> 5) + ((i & 64) >> 6) + ((i & 128) >> 7)) % 2 ? 0 : 4; ((i & 16) >> 4) + ((i & 32) >> 5) + ((i & 64) >> 6) + ((i & 128) >> 7)) % 2 ? 0 : 4;
printf("%1d,", v); sim_printf("%1d,", v);
if ( ((i+1) & 0xf) == 0) { if ( ((i+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1474,9 +1474,9 @@ static void altairz80_print_tables(void) {
uint32 temp, v; uint32 temp, v;
for (temp = 0; temp <= 256; temp++) { for (temp = 0; temp <= 256; temp++) {
v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | (((temp & 0xf) == 0) << 4); v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | (((temp & 0xf) == 0) << 4);
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((temp+1) & 0xf) == 0) { if ( ((temp+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1485,9 +1485,9 @@ static void altairz80_print_tables(void) {
uint32 temp, v; uint32 temp, v;
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | (((temp & 0xf) == 0xf) << 4) | 2; v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | (((temp & 0xf) == 0xf) << 4) | 2;
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((temp+1) & 0xf) == 0) { if ( ((temp+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1496,9 +1496,9 @@ static void altairz80_print_tables(void) {
uint32 cbits, v; uint32 cbits, v;
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (cbits & 0x10) | ((cbits >> 8) & 1); v = (cbits & 0x10) | ((cbits >> 8) & 1);
printf("%2d,", v); sim_printf("%2d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1507,9 +1507,9 @@ static void altairz80_print_tables(void) {
uint32 cbits, v; uint32 cbits, v;
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (cbits & 0x10) | ((cbits >> 8) & 1) | ((cbits & 0xff) << 8) | (cbits & 0xa8) | (((cbits & 0xff) == 0) << 6); v = (cbits & 0x10) | ((cbits >> 8) & 1) | ((cbits & 0xff) << 8) | (cbits & 0xa8) | (((cbits & 0xff) == 0) << 6);
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((cbits+1) & 0x7) == 0) { if ( ((cbits+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1518,9 +1518,9 @@ static void altairz80_print_tables(void) {
uint32 cbits, v; uint32 cbits, v;
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (cbits & 0x10) | ((cbits >> 8) & 1) | (cbits & 0x28); v = (cbits & 0x10) | ((cbits >> 8) & 1) | (cbits & 0x28);
printf("%2d,", v); sim_printf("%2d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1529,9 +1529,9 @@ static void altairz80_print_tables(void) {
uint32 cbits, v; uint32 cbits, v;
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (cbits & 0x10) | ((cbits >> 8) & 1) | 2; v = (cbits & 0x10) | ((cbits >> 8) & 1) | 2;
printf("%2d,", v); sim_printf("%2d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1541,9 +1541,9 @@ static void altairz80_print_tables(void) {
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
sum = temp >> 1; sum = temp >> 1;
v = ((temp & 1) << 15) | (sum << 8) | (sum & 0x28) | (temp & 1); v = ((temp & 1) << 15) | (sum << 8) | (sum & 0x28) | (temp & 1);
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((temp+1) & 0x7) == 0) { if ( ((temp+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1553,9 +1553,9 @@ static void altairz80_print_tables(void) {
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
sum = temp >> 1; sum = temp >> 1;
v = (sum << 8) | (sum & 0x28) | (temp & 1); v = (sum << 8) | (sum & 0x28) | (temp & 1);
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((temp+1) & 0x7) == 0) { if ( ((temp+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1564,9 +1564,9 @@ static void altairz80_print_tables(void) {
uint32 sum, v; uint32 sum, v;
for (sum = 0; sum < 512; sum++) { for (sum = 0; sum < 512; sum++) {
v = ((sum & 0xff) << 8) | (sum & 0xa8) | (((sum & 0xff) == 0) << 6); v = ((sum & 0xff) << 8) | (sum & 0xa8) | (((sum & 0xff) == 0) << 6);
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((sum+1) & 0x7) == 0) { if ( ((sum+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1575,9 +1575,9 @@ static void altairz80_print_tables(void) {
uint32 sum, v; uint32 sum, v;
for (sum = 0; sum < 256; sum++) { for (sum = 0; sum < 256; sum++) {
v = ((sum & 0xff) << 8) | (sum & 0xa8) | (((sum & 0xff) == 0) << 6) | 2; v = ((sum & 0xff) << 8) | (sum & 0xa8) | (((sum & 0xff) == 0) << 6) | 2;
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((sum+1) & 0x7) == 0) { if ( ((sum+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1586,9 +1586,9 @@ static void altairz80_print_tables(void) {
uint32 sum, v; uint32 sum, v;
for (sum = 0; sum < 256; sum++) { for (sum = 0; sum < 256; sum++) {
v = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | 0x10 | parityTable[sum]; v = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | 0x10 | parityTable[sum];
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((sum+1) & 0x7) == 0) { if ( ((sum+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1597,9 +1597,9 @@ static void altairz80_print_tables(void) {
uint32 sum, v; uint32 sum, v;
for (sum = 0; sum < 256; sum++) { for (sum = 0; sum < 256; sum++) {
v = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | parityTable[sum]; v = (sum << 8) | (sum & 0xa8) | ((sum == 0) << 6) | parityTable[sum];
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((sum+1) & 0x7) == 0) { if ( ((sum+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1608,9 +1608,9 @@ static void altairz80_print_tables(void) {
uint32 temp, v; uint32 temp, v;
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | PARITY(temp); v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | PARITY(temp);
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((temp+1) & 0xf) == 0) { if ( ((temp+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1620,9 +1620,9 @@ static void altairz80_print_tables(void) {
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0) << 4) | ((temp == 0x80) << 2); (((temp & 0xf) == 0) << 4) | ((temp == 0x80) << 2);
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((temp+1) & 0xf) == 0) { if ( ((temp+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1632,9 +1632,9 @@ static void altairz80_print_tables(void) {
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) | v = (temp & 0xa8) | (((temp & 0xff) == 0) << 6) |
(((temp & 0xf) == 0xf) << 4) | ((temp == 0x7f) << 2) | 2; (((temp & 0xf) == 0xf) << 4) | ((temp == 0x7f) << 2) | 2;
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((temp+1) & 0xf) == 0) { if ( ((temp+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1644,9 +1644,9 @@ static void altairz80_print_tables(void) {
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (cbits & 0x10) | (((cbits >> 6) ^ (cbits >> 5)) & 4) | v = (cbits & 0x10) | (((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1); ((cbits >> 8) & 1);
printf("%2d,", v); sim_printf("%2d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1656,9 +1656,9 @@ static void altairz80_print_tables(void) {
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (cbits & 0x10) | (((cbits >> 6) ^ (cbits >> 5)) & 4) | v = (cbits & 0x10) | (((cbits >> 6) ^ (cbits >> 5)) & 4) |
((cbits >> 8) & 1) | (cbits & 0xa8); ((cbits >> 8) & 1) | (cbits & 0xa8);
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1667,9 +1667,9 @@ static void altairz80_print_tables(void) {
uint32 cbits, v; uint32 cbits, v;
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (((cbits >> 6) ^ (cbits >> 5)) & 4) | (cbits & 0x10) | 2 | ((cbits >> 8) & 1); v = (((cbits >> 6) ^ (cbits >> 5)) & 4) | (cbits & 0x10) | 2 | ((cbits >> 8) & 1);
printf("%2d,", v); sim_printf("%2d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1679,9 +1679,9 @@ static void altairz80_print_tables(void) {
for (cbits = 0; cbits < 512; cbits++) { for (cbits = 0; cbits < 512; cbits++) {
v = (((cbits >> 6) ^ (cbits >> 5)) & 4) | (cbits & 0x10) | 2 | ((cbits >> 8) & 1) | v = (((cbits >> 6) ^ (cbits >> 5)) & 4) | (cbits & 0x10) | 2 | ((cbits >> 8) & 1) |
(cbits & 0xa8); (cbits & 0xa8);
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((cbits+1) & 0xf) == 0) { if ( ((cbits+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1690,9 +1690,9 @@ static void altairz80_print_tables(void) {
uint32 temp, v; uint32 temp, v;
for (temp = 0; temp < 256; temp++) { for (temp = 0; temp < 256; temp++) {
v = (((temp & 0x0f) != 0) << 4) | ((temp == 0x80) << 2) | 2 | (temp != 0); v = (((temp & 0x0f) != 0) << 4) | ((temp == 0x80) << 2) | 2 | (temp != 0);
printf("%2d,", v); sim_printf("%2d,", v);
if ( ((temp+1) & 0xf) == 0) { if ( ((temp+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1701,9 +1701,9 @@ static void altairz80_print_tables(void) {
uint32 acu, v; uint32 acu, v;
for (acu = 0; acu < 256; acu++) { for (acu = 0; acu < 256; acu++) {
v = (acu << 8) | (acu & 0xa8) | (((acu & 0xff) == 0) << 6) | parityTable[acu]; v = (acu << 8) | (acu & 0xa8) | (((acu & 0xff) == 0) << 6) | parityTable[acu];
printf("0x%04x,", v); sim_printf("0x%04x,", v);
if ( ((acu+1) & 0x7) == 0) { if ( ((acu+1) & 0x7) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1712,9 +1712,9 @@ static void altairz80_print_tables(void) {
uint32 sum, v; uint32 sum, v;
for (sum = 0; sum < 256; sum++) { for (sum = 0; sum < 256; sum++) {
v = (sum & 0x80) | (((sum & 0xff) == 0) << 6); v = (sum & 0x80) | (((sum & 0xff) == 0) << 6);
printf("%3d,", v); sim_printf("%3d,", v);
if ( ((sum+1) & 0xf) == 0) { if ( ((sum+1) & 0xf) == 0) {
printf("\n"); sim_printf("\n");
} }
} }
*/ */
@ -1759,7 +1759,7 @@ uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,
addr |= bankSelect << MAXBANKSIZELOG2; addr |= bankSelect << MAXBANKSIZELOG2;
page = addr >> LOG2PAGESIZE; page = addr >> LOG2PAGESIZE;
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("%s memory 0x%05x, handler=%p\n", unmap ? "Unmapping" : " Mapping", sim_printf("%s memory 0x%05x, handler=%p\n", unmap ? "Unmapping" : " Mapping",
addr, routine); addr, routine);
if (unmap) { if (unmap) {
if (mmu_table[page].routine == routine) { /* unmap only if it was mapped */ if (mmu_table[page].routine == routine) { /* unmap only if it was mapped */
@ -1782,17 +1782,17 @@ uint32 sim_map_resource(uint32 baseaddr, uint32 size, uint32 resource_type,
if (unmap) { if (unmap) {
if (dev_table[i & 0xff].routine == routine) { if (dev_table[i & 0xff].routine == routine) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Unmapping IO %04x, handler=%p\n", i, routine); sim_printf("Unmapping IO %04x, handler=%p\n", i, routine);
dev_table[i & 0xff].routine = &nulldev; dev_table[i & 0xff].routine = &nulldev;
} }
} }
else { else {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf(" Mapping IO %04x, handler=%p\n", i, routine); sim_printf(" Mapping IO %04x, handler=%p\n", i, routine);
dev_table[i & 0xff].routine = routine; dev_table[i & 0xff].routine = routine;
} }
} else { } else {
printf("%s: cannot map unknown resource type %d\n", __FUNCTION__, resource_type); sim_printf("%s: cannot map unknown resource type %d\n", __FUNCTION__, resource_type);
return -1; return -1;
} }
return 0; return 0;
@ -1812,9 +1812,9 @@ static void PutBYTE(register uint32 Addr, const register uint32 Value) {
m.routine(Addr, 1, Value); m.routine(Addr, 1, Value);
else if (cpu_unit.flags & UNIT_CPU_VERBOSE) { else if (cpu_unit.flags & UNIT_CPU_VERBOSE) {
if (m.isEmpty) if (m.isEmpty)
printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr);
else else
printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT "." NLP, PCX, Addr); sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT "." NLP, PCX, Addr);
} }
} }
@ -1830,9 +1830,9 @@ void PutBYTEExtended(register uint32 Addr, const register uint32 Value) {
m.routine(Addr, 1, Value); m.routine(Addr, 1, Value);
else if (cpu_unit.flags & UNIT_CPU_VERBOSE) { else if (cpu_unit.flags & UNIT_CPU_VERBOSE) {
if (m.isEmpty) if (m.isEmpty)
printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr);
else else
printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT "." NLP, PCX, Addr); sim_printf("CPU: " ADDRESS_FORMAT " Attempt to write to ROM " ADDRESS_FORMAT "." NLP, PCX, Addr);
} }
} }
@ -1855,7 +1855,7 @@ static uint32 GetBYTE(register uint32 Addr) {
return m.routine(Addr, 0, 0); /* memory mapped I/O */ return m.routine(Addr, 0, 0); /* memory mapped I/O */
if (m.isEmpty) { if (m.isEmpty) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); sim_printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr);
return 0xff; return 0xff;
} }
return M[Addr]; /* ROM */ return M[Addr]; /* ROM */
@ -1873,7 +1873,7 @@ uint32 GetBYTEExtended(register uint32 Addr) {
return m.routine(Addr, 0, 0); return m.routine(Addr, 0, 0);
if (m.isEmpty) { if (m.isEmpty) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr); sim_printf("CPU: " ADDRESS_FORMAT " Attempt to read from non existing memory " ADDRESS_FORMAT "." NLP, PCX, Addr);
return 0xff; return 0xff;
} }
return M[Addr]; return M[Addr];
@ -6810,16 +6810,16 @@ static t_stat cpu_set_noaltairrom(UNIT *uptr, int32 value, char *cptr, void *des
static t_stat cpu_set_nommu(UNIT *uptr, int32 value, char *cptr, void *desc) { static t_stat cpu_set_nommu(UNIT *uptr, int32 value, char *cptr, void *desc) {
if (chiptype == CHIP_TYPE_8086) { if (chiptype == CHIP_TYPE_8086) {
printf("Cannot switch off MMU for 8086 CPU.\n"); sim_printf("Cannot switch off MMU for 8086 CPU.\n");
return SCPE_ARG; return SCPE_ARG;
} }
if (cpu_unit.flags & UNIT_CPU_BANKED) { if (cpu_unit.flags & UNIT_CPU_BANKED) {
printf("Cannot switch off MMU for banked memory.\n"); sim_printf("Cannot switch off MMU for banked memory.\n");
return SCPE_ARG; return SCPE_ARG;
} }
if (((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) && if (((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) &&
(MEMORYSIZE < MAXBANKSIZE)) { (MEMORYSIZE < MAXBANKSIZE)) {
printf("Cannot switch off MMU when memory is %iKB < %iKB.\n", sim_printf("Cannot switch off MMU when memory is %iKB < %iKB.\n",
MEMORYSIZE >> KBLOG2, MAXBANKSIZE >> KBLOG2); MEMORYSIZE >> KBLOG2, MAXBANKSIZE >> KBLOG2);
return SCPE_ARG; return SCPE_ARG;
} }
@ -6835,7 +6835,7 @@ static t_stat cpu_set_banked(UNIT *uptr, int32 value, char *cptr, void *desc) {
cpu_clear(); cpu_clear();
} }
else if (chiptype == CHIP_TYPE_8086) { else if (chiptype == CHIP_TYPE_8086) {
printf("Cannot use banked memory for 8086 CPU.\n"); sim_printf("Cannot use banked memory for 8086 CPU.\n");
return SCPE_ARG; return SCPE_ARG;
} }
return SCPE_OK; return SCPE_OK;
@ -6855,13 +6855,13 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) {
switch(ramtype) { switch(ramtype) {
case 1: case 1:
if (data & 0x40) { if (data & 0x40) {
printf("HRAM: Parity %s" NLP, data & 1 ? "ON" : "OFF"); sim_printf("HRAM: Parity %s" NLP, data & 1 ? "ON" : "OFF");
} else { } else {
printf("HRAM BANKSEL=%02x" NLP, data); sim_printf("HRAM BANKSEL=%02x" NLP, data);
} }
break; break;
case 2: case 2:
/* printf("VRAM BANKSEL=%02x" NLP, data);*/ /* sim_printf("VRAM BANKSEL=%02x" NLP, data);*/
switch(data & 0xFF) { switch(data & 0xFF) {
case 0x01: case 0x01:
/* case 0x41: // OASIS uses this for some reason? */ /* case 0x41: // OASIS uses this for some reason? */
@ -6890,12 +6890,12 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) {
setBankSelect(7); setBankSelect(7);
break; break;
default: default:
/* printf("Invalid bank select 0x%02x for VRAM" NLP, data);*/ /* sim_printf("Invalid bank select 0x%02x for VRAM" NLP, data);*/
break; break;
} }
break; break;
case 3: case 3:
/* printf(ADDRESS_FORMAT " CRAM BANKSEL=%02x" NLP, PCX, data); */ /* sim_printf(ADDRESS_FORMAT " CRAM BANKSEL=%02x" NLP, PCX, data); */
switch(data & 0x7F) { switch(data & 0x7F) {
case 0x01: case 0x01:
setBankSelect(0); setBankSelect(0);
@ -6922,7 +6922,7 @@ static int32 bankseldev(const int32 port, const int32 io, const int32 data) {
/* setBankSelect(7); */ /* setBankSelect(7); */
/* break; */ /* break; */
default: default:
printf("Invalid bank select 0x%02x for CRAM" NLP, data); sim_printf("Invalid bank select 0x%02x for CRAM" NLP, data);
break; break;
} }
@ -6988,27 +6988,27 @@ static int32 switchcpu_io(const int32 port, const int32 io, const int32 data) {
case CHIP_TYPE_8080: case CHIP_TYPE_8080:
case CHIP_TYPE_Z80: case CHIP_TYPE_Z80:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) {
printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8086" NLP, PCX, port); sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8086" NLP, PCX, port);
} }
new_chiptype = CHIP_TYPE_8086; new_chiptype = CHIP_TYPE_8086;
switch_cpu_now = FALSE; /* hharte */ switch_cpu_now = FALSE; /* hharte */
break; break;
case CHIP_TYPE_8086: case CHIP_TYPE_8086:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) { if (cpu_unit.flags & UNIT_CPU_VERBOSE) {
printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8085/Z80" NLP, PCX, port); sim_printf("CPU: " ADDRESS_FORMAT " SWITCH(port=%02x) to 8085/Z80" NLP, PCX, port);
} }
new_chiptype = CHIP_TYPE_Z80; new_chiptype = CHIP_TYPE_Z80;
switch_cpu_now = FALSE; /* hharte */ switch_cpu_now = FALSE; /* hharte */
break; break;
default: default:
printf("%s: invalid chiptype: %d\n", __FUNCTION__, chiptype); sim_printf("%s: invalid chiptype: %d\n", __FUNCTION__, chiptype);
break; break;
} }
cpu_set_chiptype_short(new_chiptype); cpu_set_chiptype_short(new_chiptype);
return(0xFF); /* Return High-Z Data */ return(0xFF); /* Return High-Z Data */
} else { } else {
printf("%s: Set EXT_ADDR=%02x\n", __FUNCTION__, data); sim_printf("%s: Set EXT_ADDR=%02x\n", __FUNCTION__, data);
} }
return 0; return 0;
} }
@ -7026,7 +7026,7 @@ static t_stat cpu_set_switcher(UNIT *uptr, int32 value, char *cptr, void *desc)
switcherPort &= 0xff; switcherPort &= 0xff;
safe = dev_table[switcherPort]; safe = dev_table[switcherPort];
if (sim_map_resource(switcherPort, 1, RESOURCE_TYPE_IO, &switchcpu_io, FALSE)) { if (sim_map_resource(switcherPort, 1, RESOURCE_TYPE_IO, &switchcpu_io, FALSE)) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, switcherPort); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, switcherPort);
return SCPE_ARG; return SCPE_ARG;
} }
oldSwitcherDevice = safe; oldSwitcherDevice = safe;
@ -7035,7 +7035,7 @@ static t_stat cpu_set_switcher(UNIT *uptr, int32 value, char *cptr, void *desc)
static t_stat cpu_reset_switcher(UNIT *uptr, int32 value, char *cptr, void *desc) { static t_stat cpu_reset_switcher(UNIT *uptr, int32 value, char *cptr, void *desc) {
if (sim_map_resource(switcherPort, 1, RESOURCE_TYPE_IO, oldSwitcherDevice.routine, FALSE)) { if (sim_map_resource(switcherPort, 1, RESOURCE_TYPE_IO, oldSwitcherDevice.routine, FALSE)) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, switcherPort); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, switcherPort);
return SCPE_ARG; return SCPE_ARG;
} }
return SCPE_OK; return SCPE_OK;
@ -7045,53 +7045,53 @@ static t_stat cpu_set_ramtype(UNIT *uptr, int32 value, char *cptr, void *desc) {
if (value == ramtype) { if (value == ramtype) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("RAM Selection unchanged\n"); sim_printf("RAM Selection unchanged\n");
return SCPE_OK; return SCPE_OK;
} }
switch(ramtype) { switch(ramtype) {
case 1: case 1:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Unmapping NorthStar HRAM\n"); sim_printf("Unmapping NorthStar HRAM\n");
sim_map_resource(0xC0, 1, RESOURCE_TYPE_IO, &bankseldev, TRUE); sim_map_resource(0xC0, 1, RESOURCE_TYPE_IO, &bankseldev, TRUE);
break; break;
case 2: case 2:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Unmapping Vector RAM\n"); sim_printf("Unmapping Vector RAM\n");
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, TRUE); sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, TRUE);
break; break;
case 3: case 3:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Unmapping Cromemco RAM\n"); sim_printf("Unmapping Cromemco RAM\n");
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, TRUE); sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, TRUE);
break; break;
case 0: case 0:
default: default:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Unmapping AltairZ80 RAM\n"); sim_printf("Unmapping AltairZ80 RAM\n");
break; break;
} }
switch(value) { switch(value) {
case 1: case 1:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("NorthStar HRAM Selected\n"); sim_printf("NorthStar HRAM Selected\n");
sim_map_resource(0xC0, 1, RESOURCE_TYPE_IO, &bankseldev, FALSE); sim_map_resource(0xC0, 1, RESOURCE_TYPE_IO, &bankseldev, FALSE);
break; break;
case 2: case 2:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Vector RAM Selected\n"); sim_printf("Vector RAM Selected\n");
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, FALSE); sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, FALSE);
break; break;
case 3: case 3:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Cromemco RAM Selected\n"); sim_printf("Cromemco RAM Selected\n");
sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, FALSE); sim_map_resource(0x40, 1, RESOURCE_TYPE_IO, &bankseldev, FALSE);
break; break;
case 0: case 0:
default: default:
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("AltairZ80 RAM Selected\n"); sim_printf("AltairZ80 RAM Selected\n");
break; break;
} }
@ -7104,7 +7104,7 @@ static t_stat set_size(uint32 size) {
uint32 maxsize; uint32 maxsize;
if (chiptype == CHIP_TYPE_M68K) { // ignore for M68K if (chiptype == CHIP_TYPE_M68K) { // ignore for M68K
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("Setting memory size to %ikB ignored for M68K.\n", size); sim_printf("Setting memory size to %ikB ignored for M68K.\n", size);
return SCPE_OK; return SCPE_OK;
} }
maxsize = (((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) && maxsize = (((chiptype == CHIP_TYPE_8080) || (chiptype == CHIP_TYPE_Z80)) &&
@ -7177,7 +7177,7 @@ static t_stat sim_load_m68k(FILE *fileref, char *cptr, char *fnam, int flag) {
if (putc(m68k_cpu_read_byte(j), fileref) == EOF) if (putc(m68k_cpu_read_byte(j), fileref) == EOF)
return SCPE_IOERR; return SCPE_IOERR;
} }
printf("%d byte%s dumped [%x - %x] to %s.\n", PLURAL(hi + 1 - lo), lo, hi, fnam); sim_printf("%d byte%s dumped [%x - %x] to %s.\n", PLURAL(hi + 1 - lo), lo, hi, fnam);
} else { } else {
if (*cptr == 0) if (*cptr == 0)
addr = m68k_registers[M68K_REG_PC]; addr = m68k_registers[M68K_REG_PC];
@ -7192,7 +7192,7 @@ static t_stat sim_load_m68k(FILE *fileref, char *cptr, char *fnam, int flag) {
m68k_cpu_write_byte(addr++, i); m68k_cpu_write_byte(addr++, i);
cnt++; cnt++;
} }
printf("%d byte%s [%d page%s] loaded at %x.\n", sim_printf("%d byte%s [%d page%s] loaded at %x.\n",
PLURAL(cnt), PLURAL((cnt + 0xff) >> 8), org); PLURAL(cnt), PLURAL((cnt + 0xff) >> 8), org);
} }
return SCPE_OK; return SCPE_OK;
@ -7215,7 +7215,7 @@ t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) {
if (putc(GetBYTEExtended(j), fileref) == EOF) if (putc(GetBYTEExtended(j), fileref) == EOF)
return SCPE_IOERR; return SCPE_IOERR;
} }
printf("%d byte%s dumped [%x - %x] to %s.\n", PLURAL(hi + 1 - lo), lo, hi, fnam); sim_printf("%d byte%s dumped [%x - %x] to %s.\n", PLURAL(hi + 1 - lo), lo, hi, fnam);
} }
else { else {
if (*cptr == 0) if (*cptr == 0)
@ -7257,10 +7257,10 @@ t_stat sim_load(FILE *fileref, char *cptr, char *fnam, int flag) {
addr++; addr++;
cnt++; cnt++;
} /* end while */ } /* end while */
printf("%d byte%s [%d page%s] loaded at %x%s.\n", PLURAL(cnt), sim_printf("%d byte%s [%d page%s] loaded at %x%s.\n", PLURAL(cnt),
PLURAL((cnt + 0xff) >> 8), org, makeROM ? " [ROM]" : ""); PLURAL((cnt + 0xff) >> 8), org, makeROM ? " [ROM]" : "");
if (pagesModified) if (pagesModified)
printf("Warning: %d page%s modified.\n", PLURAL(pagesModified)); sim_printf("Warning: %d page%s modified.\n", PLURAL(pagesModified));
} }
return SCPE_OK; return SCPE_OK;
} }
@ -7271,7 +7271,7 @@ void cpu_raise_interrupt(uint32 irq) {
if (chiptype == CHIP_TYPE_8086) { if (chiptype == CHIP_TYPE_8086) {
cpu8086_intr(irq); cpu8086_intr(irq);
} else if (cpu_unit.flags & UNIT_CPU_VERBOSE) { } else if (cpu_unit.flags & UNIT_CPU_VERBOSE) {
printf("Interrupts not fully supported for chiptype: %s\n", sim_printf("Interrupts not fully supported for chiptype: %s\n",
(chiptype < NUM_CHIP_TYPE) ? cpu_mod[chiptype].mstring : "????"); (chiptype < NUM_CHIP_TYPE) ? cpu_mod[chiptype].mstring : "????");
} }
} }

2
AltairZ80/altairz80_dsk.c
View file

@ -438,7 +438,7 @@ static t_stat dsk_boot(int32 unitno, DEVICE *dptr) {
bootrom_dsk[UNIT_NO_OFFSET_2] = 0x80 | (unitno & 0xff); /* LD a,80h | <unitno> */ bootrom_dsk[UNIT_NO_OFFSET_2] = 0x80 | (unitno & 0xff); /* LD a,80h | <unitno> */
} }
else { /* Attempt to modify non LD A,<> instructions is refused. */ else { /* Attempt to modify non LD A,<> instructions is refused. */
printf("Incorrect boot ROM offsets detected.\n"); sim_printf("Incorrect boot ROM offsets detected.\n");
return SCPE_IERR; return SCPE_IERR;
} }
install_ALTAIRbootROM(); /* install modified ROM */ install_ALTAIRbootROM(); /* install modified ROM */

32
AltairZ80/altairz80_hdsk.c
View file

@ -372,7 +372,7 @@ static t_stat hdsk_reset(DEVICE *dptr) {
} else { } else {
/* Connect HDSK at base address */ /* Connect HDSK at base address */
if (sim_map_resource(pnp -> io_base, pnp -> io_size, RESOURCE_TYPE_IO, &hdsk_io, FALSE) != 0) { if (sim_map_resource(pnp -> io_base, pnp -> io_size, RESOURCE_TYPE_IO, &hdsk_io, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp -> mem_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp -> mem_base);
dptr -> flags |= DEV_DIS; dptr -> flags |= DEV_DIS;
return SCPE_ARG; return SCPE_ARG;
} }
@ -402,23 +402,23 @@ static void assignFormat(UNIT *uptr) {
static void verifyDiskInfo(const DISK_INFO *info, const char unitChar) { static void verifyDiskInfo(const DISK_INFO *info, const char unitChar) {
uint32 track, head; uint32 track, head;
if (info->ntracks < 1) if (info->ntracks < 1)
printf("HDSK%c (IMD): WARNING: Number of tracks is 0.\n", unitChar); sim_printf("HDSK%c (IMD): WARNING: Number of tracks is 0.\n", unitChar);
if (info->nsides < 1) { if (info->nsides < 1) {
printf("HDSK%c (IMD): WARNING: Number of sides is 0.\n", unitChar); sim_printf("HDSK%c (IMD): WARNING: Number of sides is 0.\n", unitChar);
return; return;
} }
for (track = 0; track < info->ntracks / info->nsides; track++) for (track = 0; track < info->ntracks / info->nsides; track++)
for (head = 0; head < info->nsides; head++) { for (head = 0; head < info->nsides; head++) {
if (info->track[track][head].nsects != info->track[1][0].nsects) if (info->track[track][head].nsects != info->track[1][0].nsects)
printf("HDSK%c (IMD): WARNING: For track %i and head %i expected number of sectors " sim_printf("HDSK%c (IMD): WARNING: For track %i and head %i expected number of sectors "
"%i but got %i.\n", unitChar, track, head, "%i but got %i.\n", unitChar, track, head,
info->track[1][0].nsects, info->track[track][head].nsects); info->track[1][0].nsects, info->track[track][head].nsects);
if (info->track[track][head].sectsize != info->track[1][0].sectsize) if (info->track[track][head].sectsize != info->track[1][0].sectsize)
printf("HDSK%c (IMD): WARNING: For track %i and head %i expected sector size " sim_printf("HDSK%c (IMD): WARNING: For track %i and head %i expected sector size "
"%i but got %i.\n", unitChar, track, head, "%i but got %i.\n", unitChar, track, head,
info->track[1][0].sectsize, info->track[track][head].sectsize); info->track[1][0].sectsize, info->track[track][head].sectsize);
if (info->track[track][head].start_sector != info->track[1][0].start_sector) if (info->track[track][head].start_sector != info->track[1][0].start_sector)
printf("HDSK%c (IMD): WARNING: For track %i and head %i expected start sector " sim_printf("HDSK%c (IMD): WARNING: For track %i and head %i expected start sector "
"%i but got %i.\n", unitChar, track, head, "%i but got %i.\n", unitChar, track, head,
info->track[1][0].start_sector, info->track[track][head].start_sector); info->track[1][0].start_sector, info->track[track][head].start_sector);
} }
@ -440,7 +440,7 @@ static t_stat hdsk_attach(UNIT *uptr, char *cptr) {
if (is_imd(uptr)) { if (is_imd(uptr)) {
if ((sim_fsize(uptr -> fileref) == 0) && if ((sim_fsize(uptr -> fileref) == 0) &&
(diskCreate(uptr -> fileref, "$Id: SIMH hdsk.c $") != SCPE_OK)) { (diskCreate(uptr -> fileref, "$Id: SIMH hdsk.c $") != SCPE_OK)) {
printf("HDSK%c (IMD): Failed to create IMD disk.\n", unitChar); sim_printf("HDSK%c (IMD): Failed to create IMD disk.\n", unitChar);
detach_unit(uptr); detach_unit(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -459,10 +459,10 @@ static t_stat hdsk_attach(UNIT *uptr, char *cptr) {
assignFormat(uptr); assignFormat(uptr);
if (uptr -> HDSK_FORMAT_TYPE == -1) { /* Case 1: no disk parameter block found*/ if (uptr -> HDSK_FORMAT_TYPE == -1) { /* Case 1: no disk parameter block found*/
uptr -> HDSK_FORMAT_TYPE = 0; uptr -> HDSK_FORMAT_TYPE = 0;
printf("HDSK%c (IMD): WARNING: Unsupported disk capacity, assuming HDSK type " sim_printf("HDSK%c (IMD): WARNING: Unsupported disk capacity, assuming HDSK type "
"with capacity %iKB.\n", unitChar, uptr -> capac / 1000); "with capacity %iKB.\n", unitChar, uptr -> capac / 1000);
uptr -> flags |= UNIT_HDSK_WLK; uptr -> flags |= UNIT_HDSK_WLK;
printf("HDSK%c (IMD): WARNING: Forcing WRTLCK.\n", unitChar); sim_printf("HDSK%c (IMD): WARNING: Forcing WRTLCK.\n", unitChar);
} }
return SCPE_OK; return SCPE_OK;
} }
@ -483,14 +483,14 @@ static t_stat hdsk_attach(UNIT *uptr, char *cptr) {
/* Step 3: Set number of sectors per track and sector size */ /* Step 3: Set number of sectors per track and sector size */
if (uptr -> HDSK_FORMAT_TYPE == -1) { /* Case 1: no disk parameter block found */ if (uptr -> HDSK_FORMAT_TYPE == -1) { /* Case 1: no disk parameter block found */
uptr -> HDSK_FORMAT_TYPE = 0; uptr -> HDSK_FORMAT_TYPE = 0;
printf("HDSK%c: WARNING: Unsupported disk capacity, assuming HDSK type with capacity %iKB.\n", sim_printf("HDSK%c: WARNING: Unsupported disk capacity, assuming HDSK type with capacity %iKB.\n",
unitChar, uptr -> capac / 1000); unitChar, uptr -> capac / 1000);
uptr -> flags |= UNIT_HDSK_WLK; uptr -> flags |= UNIT_HDSK_WLK;
printf("HDSK%c: WARNING: Forcing WRTLCK.\n", unitChar); sim_printf("HDSK%c: WARNING: Forcing WRTLCK.\n", unitChar);
/* check whether capacity corresponds to setting of tracks, sectors per track and sector size */ /* check whether capacity corresponds to setting of tracks, sectors per track and sector size */
if (uptr -> capac != (uint32)(uptr -> HDSK_NUMBER_OF_TRACKS * if (uptr -> capac != (uint32)(uptr -> HDSK_NUMBER_OF_TRACKS *
uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE)) { uptr -> HDSK_SECTORS_PER_TRACK * uptr -> HDSK_SECTOR_SIZE)) {
printf("HDSK%c: WARNING: Fixing geometry.\n", unitChar); sim_printf("HDSK%c: WARNING: Fixing geometry.\n", unitChar);
if (uptr -> HDSK_SECTORS_PER_TRACK == 0) if (uptr -> HDSK_SECTORS_PER_TRACK == 0)
uptr -> HDSK_SECTORS_PER_TRACK = 32; uptr -> HDSK_SECTORS_PER_TRACK = 32;
if (uptr -> HDSK_SECTOR_SIZE == 0) if (uptr -> HDSK_SECTOR_SIZE == 0)
@ -545,7 +545,7 @@ static t_stat set_geom(UNIT *uptr, int32 val, char *cptr, void *desc) {
if (uptr == NULL) if (uptr == NULL)
return SCPE_IERR; return SCPE_IERR;
if (((uptr -> flags) & UNIT_ATT) == 0) { if (((uptr -> flags) & UNIT_ATT) == 0) {
printf("Cannot set geometry for not attached unit %i.\n", find_unit_index(uptr)); sim_printf("Cannot set geometry for not attached unit %i.\n", find_unit_index(uptr));
return SCPE_ARG; return SCPE_ARG;
} }
result = sscanf(cptr, "%d/%d/%d%n", &numberOfTracks, &numberOfSectors, &sectorSize, &n); result = sscanf(cptr, "%d/%d/%d%n", &numberOfTracks, &numberOfSectors, &sectorSize, &n);
@ -584,7 +584,7 @@ static t_stat set_format(UNIT *uptr, int32 val, char *cptr, void *desc) {
if (sscanf(cptr, "%" QUOTE2(DPB_NAME_LENGTH) "s", fmtname) == 0) if (sscanf(cptr, "%" QUOTE2(DPB_NAME_LENGTH) "s", fmtname) == 0)
return SCPE_ARG; return SCPE_ARG;
if (((uptr -> flags) & UNIT_ATT) == 0) { if (((uptr -> flags) & UNIT_ATT) == 0) {
printf("Cannot set format for not attached unit %i.\n", find_unit_index(uptr)); sim_printf("Cannot set format for not attached unit %i.\n", find_unit_index(uptr));
return SCPE_ARG; return SCPE_ARG;
} }
for (i = 0; dpb[i].capac != 0; i++) { for (i = 0; dpb[i].capac != 0; i++) {
@ -653,7 +653,7 @@ static t_stat hdsk_boot(int32 unitno, DEVICE *dptr) {
if (chiptype == CHIP_TYPE_M68K) if (chiptype == CHIP_TYPE_M68K)
return m68k_hdsk_boot(unitno, dptr, VERBOSE_MSG, HDSK_NUMBER); return m68k_hdsk_boot(unitno, dptr, VERBOSE_MSG, HDSK_NUMBER);
if (MEMORYSIZE < 24 * KB) { if (MEMORYSIZE < 24 * KB) {
printf("Need at least 24KB RAM to boot from hard disk.\n"); sim_printf("Need at least 24KB RAM to boot from hard disk.\n");
return SCPE_ARG; return SCPE_ARG;
} }
if (cpu_unit.flags & (UNIT_CPU_ALTAIRROM | UNIT_CPU_BANKED)) { if (cpu_unit.flags & (UNIT_CPU_ALTAIRROM | UNIT_CPU_BANKED)) {
@ -661,7 +661,7 @@ static t_stat hdsk_boot(int32 unitno, DEVICE *dptr) {
if (bootrom_dsk[UNIT_NO_OFFSET_1 - 1] == LDA_INSTRUCTION) if (bootrom_dsk[UNIT_NO_OFFSET_1 - 1] == LDA_INSTRUCTION)
bootrom_dsk[UNIT_NO_OFFSET_1] = (unitno + NUM_OF_DSK) & 0xff; /* LD A,<unitno> */ bootrom_dsk[UNIT_NO_OFFSET_1] = (unitno + NUM_OF_DSK) & 0xff; /* LD A,<unitno> */
else { /* Attempt to modify non LD A,<> instructions is refused. */ else { /* Attempt to modify non LD A,<> instructions is refused. */
printf("Incorrect boot ROM offset detected.\n"); sim_printf("Incorrect boot ROM offset detected.\n");
return SCPE_IERR; return SCPE_IERR;
} }
install_ALTAIRbootROM(); /* install modified ROM */ install_ALTAIRbootROM(); /* install modified ROM */

8
AltairZ80/altairz80_net.c
View file

@ -216,7 +216,7 @@ static t_stat net_svc(UNIT *uptr) {
serviceDescriptor[0].ioSocket = sim_connect_sock(net_unit.filename, "localhost", "3000"); serviceDescriptor[0].ioSocket = sim_connect_sock(net_unit.filename, "localhost", "3000");
if (serviceDescriptor[0].ioSocket == INVALID_SOCKET) if (serviceDescriptor[0].ioSocket == INVALID_SOCKET)
return SCPE_IOERR; return SCPE_IOERR;
printf("\rWaiting for server ... Type g<return> (possibly twice) when ready" NLP); sim_printf("\rWaiting for server ... Type g<return> (possibly twice) when ready" NLP);
return SCPE_STOP; return SCPE_STOP;
} }
for (i = 0; i <= MAX_CONNECTIONS; i++) for (i = 0; i <= MAX_CONNECTIONS; i++)
@ -255,7 +255,7 @@ static t_stat net_svc(UNIT *uptr) {
serviceDescriptor[i].outputPosRead -= BUFFER_LENGTH; serviceDescriptor[i].outputPosRead -= BUFFER_LENGTH;
} }
else else
printf("write %i" NLP, r); sim_printf("write %i" NLP, r);
} }
} }
} }
@ -285,7 +285,7 @@ int32 netData(const int32 port, const int32 io, const int32 data) {
if (serviceDescriptor[i].Z80DataPort == port) { if (serviceDescriptor[i].Z80DataPort == port) {
if (io == 0) { /* IN */ if (io == 0) { /* IN */
if (serviceDescriptor[i].inputSize == 0) { if (serviceDescriptor[i].inputSize == 0) {
printf("re-read from %i" NLP, port); sim_printf("re-read from %i" NLP, port);
result = serviceDescriptor[i].inputBuffer[serviceDescriptor[i].inputPosRead > 0 ? result = serviceDescriptor[i].inputBuffer[serviceDescriptor[i].inputPosRead > 0 ?
serviceDescriptor[i].inputPosRead - 1 : BUFFER_LENGTH - 1]; serviceDescriptor[i].inputPosRead - 1 : BUFFER_LENGTH - 1];
} }
@ -300,7 +300,7 @@ int32 netData(const int32 port, const int32 io, const int32 data) {
} }
else { /* OUT */ else { /* OUT */
if (serviceDescriptor[i].outputSize == BUFFER_LENGTH) { if (serviceDescriptor[i].outputSize == BUFFER_LENGTH) {
printf("over-write %i to %i" NLP, data, port); sim_printf("over-write %i to %i" NLP, data, port);
serviceDescriptor[i].outputBuffer[serviceDescriptor[i].outputPosWrite > 0 ? serviceDescriptor[i].outputBuffer[serviceDescriptor[i].outputPosWrite > 0 ?
serviceDescriptor[i].outputPosWrite - 1 : BUFFER_LENGTH - 1] = data; serviceDescriptor[i].outputPosWrite - 1 : BUFFER_LENGTH - 1] = data;
} }

28
AltairZ80/altairz80_sio.c
View file

@ -965,7 +965,7 @@ static t_stat sio_dev_set_port(UNIT *uptr, int32 value, char *cptr, void *desc)
if ((result == 1) && (cptr[n] == 0)) { if ((result == 1) && (cptr[n] == 0)) {
old = lookupPortInfo(sip.port, &position); old = lookupPortInfo(sip.port, &position);
if (old.port == -1) { if (old.port == -1) {
printf("No mapping for port 0x%02x exists - cannot remove.\n", sip.port); sim_printf("No mapping for port 0x%02x exists - cannot remove.\n", sip.port);
return SCPE_ARG; return SCPE_ARG;
} }
do { do {
@ -974,7 +974,7 @@ static t_stat sio_dev_set_port(UNIT *uptr, int32 value, char *cptr, void *desc)
} while (port_table[position].port != -1); } while (port_table[position].port != -1);
sim_map_resource(sip.port, 1, RESOURCE_TYPE_IO, &nulldev, FALSE); sim_map_resource(sip.port, 1, RESOURCE_TYPE_IO, &nulldev, FALSE);
if (sio_unit.flags & UNIT_SIO_VERBOSE) { if (sio_unit.flags & UNIT_SIO_VERBOSE) {
printf("Removing mapping for port 0x%02x.\n\t", sip.port); sim_printf("Removing mapping for port 0x%02x.\n\t", sip.port);
show_sio_port_info(stdout, old); show_sio_port_info(stdout, old);
} }
return SCPE_OK; return SCPE_OK;
@ -991,29 +991,29 @@ static t_stat sio_dev_set_port(UNIT *uptr, int32 value, char *cptr, void *desc)
if (result != SCPE_OK) if (result != SCPE_OK)
return result; return result;
if (sip.port != (sip.port & 0xff)) { if (sip.port != (sip.port & 0xff)) {
printf("Truncating port 0x%x to 0x%02x.\n", sip.port, sip.port & 0xff); sim_printf("Truncating port 0x%x to 0x%02x.\n", sip.port, sip.port & 0xff);
sip.port &= 0xff; sip.port &= 0xff;
} }
old = lookupPortInfo(sip.port, &position); old = lookupPortInfo(sip.port, &position);
if (old.port == sip.port) { if (old.port == sip.port) {
if (sio_unit.flags & UNIT_SIO_VERBOSE) { if (sio_unit.flags & UNIT_SIO_VERBOSE) {
printf("Replacing mapping for port 0x%02x.\n\t", sip.port); sim_printf("Replacing mapping for port 0x%02x.\n\t", sip.port);
show_sio_port_info(stdout, old); show_sio_port_info(stdout, old);
printf("-> "); sim_printf("-> ");
show_sio_port_info(stdout, sip); show_sio_port_info(stdout, sip);
if (equalSIP(sip, old)) if (equalSIP(sip, old))
printf("[identical]"); sim_printf("[identical]");
} }
} }
else { else {
port_table[position + 1] = old; port_table[position + 1] = old;
if (sio_unit.flags & UNIT_SIO_VERBOSE) { if (sio_unit.flags & UNIT_SIO_VERBOSE) {
printf("Adding mapping for port 0x%02x.\n\t", sip.port); sim_printf("Adding mapping for port 0x%02x.\n\t", sip.port);
show_sio_port_info(stdout, sip); show_sio_port_info(stdout, sip);
} }
} }
if (sio_unit.flags & UNIT_SIO_VERBOSE) if (sio_unit.flags & UNIT_SIO_VERBOSE)
printf("\n"); sim_printf("\n");
port_table[position] = sip; port_table[position] = sip;
sim_map_resource(sip.port, 1, RESOURCE_TYPE_IO, (sip.hasOUT || sim_map_resource(sip.port, 1, RESOURCE_TYPE_IO, (sip.hasOUT ||
((sip.sio_can_read == 0) && (sip.sio_cannot_read == 0) && ((sip.sio_can_read == 0) && (sip.sio_cannot_read == 0) &&
@ -1744,7 +1744,7 @@ static int32 simh_out(const int32 port, const int32 data) {
case printTimeCmd: /* print time */ case printTimeCmd: /* print time */
if (rtc_avail) if (rtc_avail)
printf("SIMH: " ADDRESS_FORMAT " Current time in milliseconds = %d." NLP, PCX, sim_os_msec()); sim_printf("SIMH: " ADDRESS_FORMAT " Current time in milliseconds = %d." NLP, PCX, sim_os_msec());
else else
warnNoRealTimeClock(); warnNoRealTimeClock();
break; break;
@ -1754,7 +1754,7 @@ static int32 simh_out(const int32 port, const int32 data) {
if (markTimeSP < TIMER_STACK_LIMIT) if (markTimeSP < TIMER_STACK_LIMIT)
markTime[markTimeSP++] = sim_os_msec(); markTime[markTimeSP++] = sim_os_msec();
else else
printf("SIMH: " ADDRESS_FORMAT " Timer stack overflow." NLP, PCX); sim_printf("SIMH: " ADDRESS_FORMAT " Timer stack overflow." NLP, PCX);
else else
warnNoRealTimeClock(); warnNoRealTimeClock();
break; break;
@ -1763,10 +1763,10 @@ static int32 simh_out(const int32 port, const int32 data) {
if (rtc_avail) if (rtc_avail)
if (markTimeSP > 0) { if (markTimeSP > 0) {
uint32 delta = sim_os_msec() - markTime[--markTimeSP]; uint32 delta = sim_os_msec() - markTime[--markTimeSP];
printf("SIMH: " ADDRESS_FORMAT " Timer stopped. Elapsed time in milliseconds = %d." NLP, PCX, delta); sim_printf("SIMH: " ADDRESS_FORMAT " Timer stopped. Elapsed time in milliseconds = %d." NLP, PCX, delta);
} }
else else
printf("SIMH: " ADDRESS_FORMAT " No timer active." NLP, PCX); sim_printf("SIMH: " ADDRESS_FORMAT " No timer active." NLP, PCX);
else else
warnNoRealTimeClock(); warnNoRealTimeClock();
break; break;
@ -1852,10 +1852,10 @@ static int32 simh_out(const int32 port, const int32 data) {
if (rtc_avail) if (rtc_avail)
if (markTimeSP > 0) { if (markTimeSP > 0) {
uint32 delta = sim_os_msec() - markTime[markTimeSP - 1]; uint32 delta = sim_os_msec() - markTime[markTimeSP - 1];
printf("SIMH: " ADDRESS_FORMAT " Timer running. Elapsed in milliseconds = %d." NLP, PCX, delta); sim_printf("SIMH: " ADDRESS_FORMAT " Timer running. Elapsed in milliseconds = %d." NLP, PCX, delta);
} }
else else
printf("SIMH: " ADDRESS_FORMAT " No timer active." NLP, PCX); sim_printf("SIMH: " ADDRESS_FORMAT " No timer active." NLP, PCX);
else else
warnNoRealTimeClock(); warnNoRealTimeClock();
break; break;

6
AltairZ80/altairz80_sys.c
View file

@ -756,7 +756,7 @@ static int32 parse_X80(const char *cptr, const int32 addr, uint32 *val, char *co
if (at > -129) if (at > -129)
val[2] = (int8) (at); val[2] = (int8) (at);
else { else {
printf("Offset expected.\n"); sim_printf("Offset expected.\n");
return SCPE_ARG; return SCPE_ARG;
} }
val[3] = op; val[3] = op;
@ -833,7 +833,7 @@ t_stat set_membase(UNIT *uptr, int32 val, char *cptr, void *desc)
return SCPE_ARG; return SCPE_ARG;
if (dptr->flags & DEV_DIS) { if (dptr->flags & DEV_DIS) {
printf("device not enabled yet.\n"); sim_printf("device not enabled yet.\n");
pnp->mem_base = newba & ~(pnp->mem_size-1); pnp->mem_base = newba & ~(pnp->mem_size-1);
} else { } else {
dptr->flags |= DEV_DIS; dptr->flags |= DEV_DIS;
@ -893,7 +893,7 @@ t_stat set_iobase(UNIT *uptr, int32 val, char *cptr, void *desc)
return SCPE_ARG; return SCPE_ARG;
if (dptr->flags & DEV_DIS) { if (dptr->flags & DEV_DIS) {
printf("device not enabled yet.\n"); sim_printf("device not enabled yet.\n");
pnp->io_base = newba & ~(pnp->io_size-1); pnp->io_base = newba & ~(pnp->io_size-1);
} else { } else {
dptr->flags |= DEV_DIS; dptr->flags |= DEV_DIS;

12
AltairZ80/flashwriter2.c
View file

@ -44,7 +44,7 @@
#include "altairz80_defs.h" #include "altairz80_defs.h"
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -126,7 +126,7 @@ static t_stat fw2_attach(UNIT *uptr, char *cptr)
for(i = 0; i < FW2_MAX_BOARDS; i++) { for(i = 0; i < FW2_MAX_BOARDS; i++) {
if(&fw2_dev.units[i] == uptr) { if(&fw2_dev.units[i] == uptr) {
if(uptr->flags & UNIT_FW2_VERBOSE) { if(uptr->flags & UNIT_FW2_VERBOSE) {
printf("Attaching unit %d at %04x\n", i, baseaddr); sim_printf("Attaching unit %d at %04x\n", i, baseaddr);
} }
break; break;
} }
@ -137,17 +137,17 @@ static t_stat fw2_attach(UNIT *uptr, char *cptr)
fw2_info[i]->uptr->u3 = baseaddr; fw2_info[i]->uptr->u3 = baseaddr;
if(sim_map_resource(baseaddr, FW2_CAPACITY, RESOURCE_TYPE_MEMORY, &fw2dev, FALSE) != 0) { if(sim_map_resource(baseaddr, FW2_CAPACITY, RESOURCE_TYPE_MEMORY, &fw2dev, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, baseaddr); sim_printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, baseaddr);
return SCPE_ARG; return SCPE_ARG;
} }
if(sim_map_resource(0x00, 1, RESOURCE_TYPE_IO, &sio0s, FALSE) != 0) { if(sim_map_resource(0x00, 1, RESOURCE_TYPE_IO, &sio0s, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, 0x00); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, 0x00);
return SCPE_ARG; return SCPE_ARG;
} }
if(sim_map_resource(0x01, 1, RESOURCE_TYPE_IO, &sio0d, FALSE) != 0) { if(sim_map_resource(0x01, 1, RESOURCE_TYPE_IO, &sio0d, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, 0x01); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, 0x01);
return SCPE_ARG; return SCPE_ARG;
} }
@ -197,7 +197,7 @@ static t_stat get_base_address(char *cptr, uint32 *baseaddr)
uint32 b; uint32 b;
sscanf(cptr, "%x", &b); sscanf(cptr, "%x", &b);
if(b & (FW2_CAPACITY-1)) { if(b & (FW2_CAPACITY-1)) {
printf("FWII must be on a %d-byte boundary.\n", FW2_CAPACITY); sim_printf("FWII must be on a %d-byte boundary.\n", FW2_CAPACITY);
return SCPE_ARG; return SCPE_ARG;
} }
*baseaddr = b & ~(FW2_CAPACITY-1); *baseaddr = b & ~(FW2_CAPACITY-1);

20
AltairZ80/i8272.c
View file

@ -57,7 +57,7 @@
#include "i8272.h" #include "i8272.h"
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -239,7 +239,7 @@ static t_stat i8272_reset(DEVICE *dptr)
} else { } else {
/* Connect I/O Ports at base address */ /* Connect I/O Ports at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &i8272dev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &i8272dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -302,14 +302,14 @@ t_stat i8272_attach(UNIT *uptr, char *cptr)
if(uptr->capac > 0) { if(uptr->capac > 0) {
char *rtn = fgets(header, 4, uptr->fileref); char *rtn = fgets(header, 4, uptr->fileref);
if((rtn != NULL) && strncmp(header, "IMD", 3)) { if((rtn != NULL) && strncmp(header, "IMD", 3)) {
printf("I8272: Only IMD disk images are supported\n"); sim_printf("I8272: Only IMD disk images are supported\n");
i8272_info->drive[i].uptr = NULL; i8272_info->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
} else { } else {
/* create a disk image file in IMD format. */ /* create a disk image file in IMD format. */
if (diskCreate(uptr->fileref, "$Id: i8272.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) { if (diskCreate(uptr->fileref, "$Id: i8272.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) {
printf("I8272: Failed to create IMD disk.\n"); sim_printf("I8272: Failed to create IMD disk.\n");
i8272_info->drive[i].uptr = NULL; i8272_info->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -319,20 +319,20 @@ t_stat i8272_attach(UNIT *uptr, char *cptr)
uptr->u3 = IMAGE_TYPE_IMD; uptr->u3 = IMAGE_TYPE_IMD;
if (uptr->flags & UNIT_I8272_VERBOSE) { if (uptr->flags & UNIT_I8272_VERBOSE) {
printf("I8272%d: attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("I8272%d: attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
} }
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if (uptr->flags & UNIT_I8272_VERBOSE) if (uptr->flags & UNIT_I8272_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
i8272_info->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_I8272_VERBOSE, i8272_info->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_I8272_VERBOSE,
&i8272_dev, VERBOSE_MSG, VERBOSE_MSG); &i8272_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_I8272_VERBOSE) if (uptr->flags & UNIT_I8272_VERBOSE)
printf("\n"); sim_printf("\n");
if (i8272_info->drive[i].imd == NULL) { if (i8272_info->drive[i].imd == NULL) {
printf("I8272: IMD disk corrupt.\n"); sim_printf("I8272: IMD disk corrupt.\n");
i8272_info->drive[i].uptr = NULL; i8272_info->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -777,7 +777,7 @@ uint8 I8272_Write(const uint32 Addr, uint8 cData)
if(i8272_info->fdc_phase == EXEC_PHASE) { if(i8272_info->fdc_phase == EXEC_PHASE) {
switch(i8272_info->cmd[0] & 0x1F) { switch(i8272_info->cmd[0] & 0x1F) {
case I8272_READ_TRACK: case I8272_READ_TRACK:
printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX); sim_printf("I8272: " ADDRESS_FORMAT " Read a track (untested.)" NLP, PCX);
i8272_info->fdc_sector = 1; /* Read entire track from sector 1...eot */ i8272_info->fdc_sector = 1; /* Read entire track from sector 1...eot */
case I8272_READ_DATA: case I8272_READ_DATA:
case I8272_READ_DELETED_DATA: case I8272_READ_DELETED_DATA:
@ -792,7 +792,7 @@ uint8 I8272_Write(const uint32 Addr, uint8 cData)
128 << i8272_info->fdc_sec_len); 128 << i8272_info->fdc_sec_len);
if(pDrive->imd == NULL) { if(pDrive->imd == NULL) {
printf(".imd is NULL!" NLP); sim_printf(".imd is NULL!" NLP);
} }
if(disk_read) { /* Read sector */ if(disk_read) { /* Read sector */
sectRead(pDrive->imd, sectRead(pDrive->imd,

20
AltairZ80/i86_decode.c
View file

@ -159,7 +159,7 @@ static void setCPURegisters(void) {
void cpu8086reset(void) { void cpu8086reset(void) {
cpu8086.R_AX = 0x1961; cpu8086.R_AX = 0x1961;
if ((cpu8086.R_AH != 0x19) || (cpu8086.R_AL != 0x61)) { if ((cpu8086.R_AH != 0x19) || (cpu8086.R_AL != 0x61)) {
printf("Fatal endian error - make sure to compile with '#define LOWFIRST %i'\n", 1 - LOWFIRST); sim_printf("Fatal endian error - make sure to compile with '#define LOWFIRST %i'\n", 1 - LOWFIRST);
exit(1); exit(1);
} }
/* 16 bit registers */ /* 16 bit registers */
@ -202,7 +202,7 @@ t_stat sim_instr_8086(void) {
if (CS_S != ((PCX_S & 0xf0000) >> 4)) { if (CS_S != ((PCX_S & 0xf0000) >> 4)) {
cpu8086.R_CS = (PCX_S & 0xf0000) >> 4; cpu8086.R_CS = (PCX_S & 0xf0000) >> 4;
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("CPU: " ADDRESS_FORMAT " Segment register CS set to %04x" NLP, PCX, cpu8086.R_CS); sim_printf("CPU: " ADDRESS_FORMAT " Segment register CS set to %04x" NLP, PCX, cpu8086.R_CS);
} }
cpu8086.R_IP = PCX_S & 0xffff; cpu8086.R_IP = PCX_S & 0xffff;
} }
@ -287,14 +287,14 @@ void halt_sys(PC_ENV *m)
/* this code generated the following table */ /* this code generated the following table */
main() main()
{ int i; { int i;
printf("\n\nstruct modrm{ uint8 mod,rh,rl;} modrmtab[] = {\n"); sim_printf("\n\nstruct modrm{ uint8 mod,rh,rl;} modrmtab[] = {\n");
for (i=0; i<256; i++) for (i=0; i<256; i++)
{ {
printf("{%d,%d,%d}, ",((i&0xc0)>>6),((i&0x38)>>3),(i&0x07)); sim_printf("{%d,%d,%d}, ",((i&0xc0)>>6),((i&0x38)>>3),(i&0x07));
if (i%4==3) if (i%4==3)
printf("/* %d to %d */\n",i&0xfc,i); sim_printf("/* %d to %d */\n",i&0xfc,i);
} }
printf("};\n\n"); sim_printf("};\n\n");
} }
#endif #endif
@ -729,7 +729,7 @@ uint8 fetch_data_byte(PC_ENV *m, uint16 offset)
value = GetBYTEExtended((((uint32)m->R_SS << 4) + offset) & 0xFFFFF); value = GetBYTEExtended((((uint32)m->R_SS << 4) + offset) & 0xFFFFF);
break; break;
default: default:
printf("error: should not happen: multiple overrides. " NLP); sim_printf("error: should not happen: multiple overrides. " NLP);
value = 0; value = 0;
halt_sys(m); halt_sys(m);
} }
@ -809,7 +809,7 @@ uint16 fetch_data_word(PC_ENV *m, uint16 offset)
+ (uint16)(offset + 1)) & 0xFFFFF) << 8); + (uint16)(offset + 1)) & 0xFFFFF) << 8);
break; break;
default: default:
printf("error: should not happen: multiple overrides. " NLP); sim_printf("error: should not happen: multiple overrides. " NLP);
value = 0; value = 0;
halt_sys(m); halt_sys(m);
} }
@ -873,7 +873,7 @@ void store_data_byte(PC_ENV *m, uint16 offset, uint8 val)
segment = m->R_SS; segment = m->R_SS;
break; break;
default: default:
printf("error: should not happen: multiple overrides. " NLP); sim_printf("error: should not happen: multiple overrides. " NLP);
segment = 0; segment = 0;
halt_sys(m); halt_sys(m);
} }
@ -935,7 +935,7 @@ void store_data_word(PC_ENV *m, uint16 offset, uint16 val)
segment = m->R_SS; segment = m->R_SS;
break; break;
default: default:
printf("error: should not happen: multiple overrides." NLP); sim_printf("error: should not happen: multiple overrides." NLP);
segment = 0; segment = 0;
halt_sys(m); halt_sys(m);
} }

2
AltairZ80/i86_ops.c
View file

@ -4287,7 +4287,7 @@ static void i86op_jump_byte_IMM(PC_ENV *m)
int8 offset; int8 offset;
uint16 target; uint16 target;
offset = (int8) fetch_byte_imm(m); /* CHECK */ offset = (int8) fetch_byte_imm(m); /* CHECK */
/* printf("jump byte imm offset=%d\n",offset);*/ /* sim_printf("jump byte imm offset=%d\n",offset);*/
target = (int16) m->R_IP + offset; target = (int16) m->R_IP + offset;
m->R_IP = target; m->R_IP = target;
DECODE_CLEAR_SEGOVR(m); DECODE_CLEAR_SEGOVR(m);

2
AltairZ80/i86_prim_ops.c
View file

@ -1513,7 +1513,7 @@ void div_word(PC_ENV *m, uint16 s)
} }
div = dvd / dvs; div = dvd / dvs;
mod = dvd % dvs; mod = dvd % dvs;
/* printf("dvd=%x dvs=%x -> div=%x mod=%x\n",dvd, dvs,div, mod);*/ /* sim_printf("dvd=%x dvs=%x -> div=%x mod=%x\n",dvd, dvs,div, mod);*/
if (abs(div) > 0xffff) if (abs(div) > 0xffff)
{ {
i86_intr_raise(m,0); i86_intr_raise(m,0);

16
AltairZ80/m68ksim.c
View file

@ -338,7 +338,7 @@ static void MC6850_control_write(uint32 val) {
unsigned int m68k_cpu_read_byte_raw(unsigned int address) { unsigned int m68k_cpu_read_byte_raw(unsigned int address) {
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP,
PCX, address); PCX, address);
return 0xff; return 0xff;
} }
@ -356,7 +356,7 @@ unsigned int m68k_cpu_read_byte(unsigned int address) {
} }
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to read byte from non existing memory 0x%08x." NLP,
PCX, address); PCX, address);
return 0xff; return 0xff;
} }
@ -372,7 +372,7 @@ unsigned int m68k_cpu_read_word(unsigned int address) {
} }
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to read word from non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to read word from non existing memory 0x%08x." NLP,
PCX, address); PCX, address);
return 0xffff; return 0xffff;
} }
@ -390,7 +390,7 @@ unsigned int m68k_cpu_read_long(unsigned int address) {
} }
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to read long from non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to read long from non existing memory 0x%08x." NLP,
PCX, address); PCX, address);
return 0xffffffff; return 0xffffffff;
} }
@ -402,7 +402,7 @@ unsigned int m68k_cpu_read_long(unsigned int address) {
void m68k_cpu_write_byte_raw(unsigned int address, unsigned int value) { void m68k_cpu_write_byte_raw(unsigned int address, unsigned int value) {
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP,
PCX, value & 0xff, address); PCX, value & 0xff, address);
return; return;
} }
@ -422,7 +422,7 @@ void m68k_cpu_write_byte(unsigned int address, unsigned int value) {
} }
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to write byte 0x%02x to non existing memory 0x%08x." NLP,
PCX, value & 0xff, address); PCX, value & 0xff, address);
return; return;
} }
@ -432,7 +432,7 @@ void m68k_cpu_write_byte(unsigned int address, unsigned int value) {
void m68k_cpu_write_word(unsigned int address, unsigned int value) { void m68k_cpu_write_word(unsigned int address, unsigned int value) {
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to write word 0x%04x to non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to write word 0x%04x to non existing memory 0x%08x." NLP,
PCX, value & 0xffff, address); PCX, value & 0xffff, address);
return; return;
} }
@ -482,7 +482,7 @@ void m68k_cpu_write_long(unsigned int address, unsigned int value) {
} }
if (address > M68K_MAX_RAM) { if (address > M68K_MAX_RAM) {
if (cpu_unit.flags & UNIT_CPU_VERBOSE) if (cpu_unit.flags & UNIT_CPU_VERBOSE)
printf("M68K: 0x%08x Attempt to write long 0x%08x to non existing memory 0x%08x." NLP, sim_printf("M68K: 0x%08x Attempt to write long 0x%08x to non existing memory 0x%08x." NLP,
PCX, value, address); PCX, value, address);
return; return;
} }

42
AltairZ80/mfdc.c
View file

@ -53,7 +53,7 @@
#endif #endif
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -224,7 +224,7 @@ static t_stat mfdc_reset(DEVICE *dptr)
mfdc_info->drive[i].uptr = &mfdc_dev.units[i]; mfdc_info->drive[i].uptr = &mfdc_dev.units[i];
} }
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &mdskdev, FALSE) != 0) { if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &mdskdev, FALSE) != 0) {
printf("%s: error mapping resource at 0x%04x\n", __FUNCTION__, pnp->mem_base); sim_printf("%s: error mapping resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS; dptr->flags |= DEV_DIS;
return SCPE_ARG; return SCPE_ARG;
} }
@ -263,23 +263,23 @@ static t_stat mfdc_attach(UNIT *uptr, char *cptr)
} }
if (uptr->flags & UNIT_MFDC_VERBOSE) if (uptr->flags & UNIT_MFDC_VERBOSE)
printf("MDSK%d, attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("MDSK%d, attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if(uptr->capac < 318000) { if(uptr->capac < 318000) {
printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n"); sim_printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n");
mfdc_detach(uptr); mfdc_detach(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
} }
if (uptr->flags & UNIT_MFDC_VERBOSE) if (uptr->flags & UNIT_MFDC_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
mfdc_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_MFDC_VERBOSE), mfdc_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_MFDC_VERBOSE),
&mfdc_dev, VERBOSE_MSG, VERBOSE_MSG); &mfdc_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_MFDC_VERBOSE) if (uptr->flags & UNIT_MFDC_VERBOSE)
printf("\n"); sim_printf("\n");
} else { } else {
mfdc_info->drive[i].imd = NULL; mfdc_info->drive[i].imd = NULL;
} }
@ -353,7 +353,7 @@ static int32 mdskdev(const int32 Addr, const int32 rw, const int32 data)
if(rw == 0) { /* Read boot ROM */ if(rw == 0) { /* Read boot ROM */
return(mfdc_rom[Addr & 0xFF]); return(mfdc_rom[Addr & 0xFF]);
} else { } else {
printf("MFDC: Attempt to write to boot ROM." NLP); sim_printf("MFDC: Attempt to write to boot ROM." NLP);
return (-1); return (-1);
} }
break; break;
@ -445,7 +445,7 @@ static uint8 MFDC_Read(const uint32 Addr)
if (!(pDrive->uptr->flags & UNIT_ATT)) { if (!(pDrive->uptr->flags & UNIT_ATT)) {
if (pDrive->uptr->flags & UNIT_MFDC_VERBOSE) if (pDrive->uptr->flags & UNIT_MFDC_VERBOSE)
printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached." NLP, PCX, sim_printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached." NLP, PCX,
mfdc_info->sel_drive); mfdc_info->sel_drive);
return 0x00; return 0x00;
} }
@ -454,9 +454,9 @@ static uint8 MFDC_Read(const uint32 Addr)
{ {
case IMAGE_TYPE_IMD: case IMAGE_TYPE_IMD:
if(pDrive->imd == NULL) { if(pDrive->imd == NULL) {
printf(".imd is NULL!" NLP); sim_printf(".imd is NULL!" NLP);
} }
/* printf("%s: Read: imd=%p" NLP, __FUNCTION__, pDrive->imd); */ /* sim_printf("%s: Read: imd=%p" NLP, __FUNCTION__, pDrive->imd); */
sectRead(pDrive->imd, sectRead(pDrive->imd,
pDrive->track, pDrive->track,
mfdc_info->head, mfdc_info->head,
@ -468,7 +468,7 @@ static uint8 MFDC_Read(const uint32 Addr)
break; break;
case IMAGE_TYPE_DSK: case IMAGE_TYPE_DSK:
if(pDrive->uptr->fileref == NULL) { if(pDrive->uptr->fileref == NULL) {
printf(".fileref is NULL!" NLP); sim_printf(".fileref is NULL!" NLP);
} else { } else {
sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET); sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET);
#ifdef USE_VGI #ifdef USE_VGI
@ -478,18 +478,18 @@ static uint8 MFDC_Read(const uint32 Addr)
rtn = sim_fread(sdata.u.data, 1, 256, (pDrive->uptr)->fileref); rtn = sim_fread(sdata.u.data, 1, 256, (pDrive->uptr)->fileref);
if (rtn != 256) if (rtn != 256)
#endif /* USE_VGI */ #endif /* USE_VGI */
printf("%s: sim_fread error. Result = %d." NLP, __FUNCTION__, rtn); sim_printf("%s: sim_fread error. Result = %d." NLP, __FUNCTION__, rtn);
} }
break; break;
case IMAGE_TYPE_CPT: case IMAGE_TYPE_CPT:
printf("%s: CPT Format not supported" NLP, __FUNCTION__); sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__);
break; break;
default: default:
printf("%s: Unknown image Format" NLP, __FUNCTION__); sim_printf("%s: Unknown image Format" NLP, __FUNCTION__);
break; break;
} }
/* printf("%d/%d @%04x Len=%04x" NLP, sdata.u.header[0], sdata.u.header[1], sdata.u.header[9]<<8|sdata.u.header[8], sdata.u.header[11]<<8|sdata.u.header[10]); */ /* sim_printf("%d/%d @%04x Len=%04x" NLP, sdata.u.header[0], sdata.u.header[1], sdata.u.header[9]<<8|sdata.u.header[8], sdata.u.header[11]<<8|sdata.u.header[10]); */
adc(0,0); /* clear Carry bit */ adc(0,0); /* clear Carry bit */
checksum = 0; checksum = 0;
@ -537,7 +537,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData)
case 3: case 3:
/* DBG_PRINT(("MFDC: " ADDRESS_FORMAT " WR Data" NLP, PCX)); */ /* DBG_PRINT(("MFDC: " ADDRESS_FORMAT " WR Data" NLP, PCX)); */
if(mfdc_info->wr_latch == 0) { if(mfdc_info->wr_latch == 0) {
printf("MFDC: " ADDRESS_FORMAT " Error, attempt to write data when write latch is not set." NLP, PCX); sim_printf("MFDC: " ADDRESS_FORMAT " Error, attempt to write data when write latch is not set." NLP, PCX);
} else { } else {
#ifdef USE_VGI #ifdef USE_VGI
sec_offset = (pDrive->track * MFDC_SECTOR_LEN * 16) + \ sec_offset = (pDrive->track * MFDC_SECTOR_LEN * 16) + \
@ -566,7 +566,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData)
if (!(pDrive->uptr->flags & UNIT_ATT)) { if (!(pDrive->uptr->flags & UNIT_ATT)) {
if (pDrive->uptr->flags & UNIT_MFDC_VERBOSE) if (pDrive->uptr->flags & UNIT_MFDC_VERBOSE)
printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached." NLP, PCX, sim_printf("MFDC: " ADDRESS_FORMAT " MDSK%i not attached." NLP, PCX,
mfdc_info->sel_drive); mfdc_info->sel_drive);
return 0x00; return 0x00;
} }
@ -575,7 +575,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData)
{ {
case IMAGE_TYPE_IMD: case IMAGE_TYPE_IMD:
if(pDrive->imd == NULL) { if(pDrive->imd == NULL) {
printf(".imd is NULL!" NLP); sim_printf(".imd is NULL!" NLP);
} }
sectWrite(pDrive->imd, sectWrite(pDrive->imd,
pDrive->track, pDrive->track,
@ -588,7 +588,7 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData)
break; break;
case IMAGE_TYPE_DSK: case IMAGE_TYPE_DSK:
if(pDrive->uptr->fileref == NULL) { if(pDrive->uptr->fileref == NULL) {
printf(".fileref is NULL!" NLP); sim_printf(".fileref is NULL!" NLP);
} else { } else {
sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET); sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET);
#ifdef USE_VGI #ifdef USE_VGI
@ -599,10 +599,10 @@ static uint8 MFDC_Write(const uint32 Addr, uint8 cData)
} }
break; break;
case IMAGE_TYPE_CPT: case IMAGE_TYPE_CPT:
printf("%s: CPT Format not supported" NLP, __FUNCTION__); sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__);
break; break;
default: default:
printf("%s: Unknown image Format" NLP, __FUNCTION__); sim_printf("%s: Unknown image Format" NLP, __FUNCTION__);
break; break;
} }
} }

6
AltairZ80/n8vem.c
View file

@ -49,7 +49,7 @@
#endif #endif
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -176,12 +176,12 @@ static t_stat n8vem_reset(DEVICE *dptr)
} else { } else {
/* Connect N8VEM at base address */ /* Connect N8VEM at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &n8vemdev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &n8vemdev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect N8VEM Memory (512K RAM, 1MB FLASH) */ /* Connect N8VEM Memory (512K RAM, 1MB FLASH) */
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &n8vem_mem, FALSE) != 0) { if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &n8vem_mem, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base); sim_printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
return SCPE_ARG; return SCPE_ARG;
} }

26
AltairZ80/s100_64fdc.c
View file

@ -53,7 +53,7 @@
#include "wd179x.h" #include "wd179x.h"
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -191,7 +191,7 @@ static uint8 ipend_to_rst_opcode(uint8 ipend)
active_intr = cromfdc_info->imask & cromfdc_info->ipend; active_intr = cromfdc_info->imask & cromfdc_info->ipend;
for(i=1;i != 0;i <<= 1) { for(i=1;i != 0;i <<= 1) {
/* printf("%d: %d" NLP, i, active_intr & i); */ /* sim_printf("%d: %d" NLP, i, active_intr & i); */
if (active_intr & i) { if (active_intr & i) {
return(cromfdc_irq_table[j]); return(cromfdc_irq_table[j]);
} }
@ -1487,38 +1487,38 @@ static t_stat cromfdc_reset(DEVICE *dptr)
if (cromfdc_hasProperty(UNIT_CROMFDC_ROM)) { if (cromfdc_hasProperty(UNIT_CROMFDC_ROM)) {
sim_debug(VERBOSE_MSG, &cromfdc_dev, "CROMFDC: ROM Enabled.\n"); sim_debug(VERBOSE_MSG, &cromfdc_dev, "CROMFDC: ROM Enabled.\n");
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &cromfdcrom, FALSE) != 0) { if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &cromfdcrom, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping MEM resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} else } else
sim_debug(VERBOSE_MSG, &cromfdc_dev, "CROMFDC: ROM Disabled.\n"); sim_debug(VERBOSE_MSG, &cromfdc_dev, "CROMFDC: ROM Disabled.\n");
/* Connect CROMFDC Interrupt, and Aux Disk Registers */ /* Connect CROMFDC Interrupt, and Aux Disk Registers */
if(sim_map_resource(0x03, 0x02, RESOURCE_TYPE_IO, &cromfdc_ext, FALSE) != 0) { if(sim_map_resource(0x03, 0x02, RESOURCE_TYPE_IO, &cromfdc_ext, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect CROMFDC Timer Registers */ /* Connect CROMFDC Timer Registers */
if(sim_map_resource(0x05, 0x05, RESOURCE_TYPE_IO, &cromfdc_timer, FALSE) != 0) { if(sim_map_resource(0x05, 0x05, RESOURCE_TYPE_IO, &cromfdc_timer, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect CROMFDC Disk Flags and Control Register */ /* Connect CROMFDC Disk Flags and Control Register */
if(sim_map_resource(0x34, 0x01, RESOURCE_TYPE_IO, &cromfdc_control, FALSE) != 0) { if(sim_map_resource(0x34, 0x01, RESOURCE_TYPE_IO, &cromfdc_control, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect CROMFDC Bank Select Register */ /* Connect CROMFDC Bank Select Register */
if(sim_map_resource(0x40, 0x1, RESOURCE_TYPE_IO, &cromfdc_banksel, FALSE) != 0) { if(sim_map_resource(0x40, 0x1, RESOURCE_TYPE_IO, &cromfdc_banksel, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect CCS 2810 UART Status Register (needed by MOSS 2.2 Monitor */ /* Connect CCS 2810 UART Status Register (needed by MOSS 2.2 Monitor */
if(sim_map_resource(0x26, 0x01, RESOURCE_TYPE_IO, &ccs2810_uart_status, FALSE) != 0) { if(sim_map_resource(0x26, 0x01, RESOURCE_TYPE_IO, &ccs2810_uart_status, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x" NLP, __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} else { } else {
sim_debug(VERBOSE_MSG, &cromfdc_dev, "Mapped CCS2810 UART Status at 0x26\n"); sim_debug(VERBOSE_MSG, &cromfdc_dev, "Mapped CCS2810 UART Status at 0x26\n");
@ -1534,7 +1534,7 @@ static t_stat cromfdc_reset(DEVICE *dptr)
static t_stat cromfdc_boot(int32 unitno, DEVICE *dptr) static t_stat cromfdc_boot(int32 unitno, DEVICE *dptr)
{ {
if((crofdc_type != 4) && (crofdc_type != 16) && (crofdc_type != 64) && (crofdc_type != 50)) { if((crofdc_type != 4) && (crofdc_type != 16) && (crofdc_type != 64) && (crofdc_type != 50)) {
printf("Invalid fdc_type: %d, must be 4, 16, or 64 (or 50 for CCS2422.)" NLP, crofdc_type); sim_printf("Invalid fdc_type: %d, must be 4, 16, or 64 (or 50 for CCS2422.)" NLP, crofdc_type);
return SCPE_ARG; return SCPE_ARG;
} }
@ -1645,7 +1645,7 @@ static int32 cromfdc_control(const int32 port, const int32 io, const int32 data)
break; break;
} }
/* printf("CCS2422FDC: " ADDRESS_FORMAT " Read STATUS1=0x%02x" NLP, PCX, result); */ /* sim_printf("CCS2422FDC: " ADDRESS_FORMAT " Read STATUS1=0x%02x" NLP, PCX, result); */
} }
sim_debug(STATUS_MSG, &cromfdc_dev, "CROMFDC: " ADDRESS_FORMAT sim_debug(STATUS_MSG, &cromfdc_dev, "CROMFDC: " ADDRESS_FORMAT
" Read DISK FLAGS, Port 0x%02x Result 0x%02x\n", PCX, port, result); " Read DISK FLAGS, Port 0x%02x Result 0x%02x\n", PCX, port, result);
@ -1675,13 +1675,13 @@ static int32 cromfdc_ext(const int32 port, const int32 io, const int32 data)
} }
#if 0 /* hharte - nothing implemented for these */ #if 0 /* hharte - nothing implemented for these */
if((data & CROMFDC_AUX_EJECT) == 0) { if((data & CROMFDC_AUX_EJECT) == 0) {
printf("CROMFDC: Eject" NLP); sim_printf("CROMFDC: Eject" NLP);
} }
if((data & CROMFDC_AUX_SEL_OVERRIDE) == 0) { if((data & CROMFDC_AUX_SEL_OVERRIDE) == 0) {
printf("CROMFDC: Sel Override" NLP); sim_printf("CROMFDC: Sel Override" NLP);
} }
if((data & CROMFDC_AUX_CTRL_OUT) == 0) { if((data & CROMFDC_AUX_CTRL_OUT) == 0) {
printf("CROMFDC: Ctrl Out" NLP); sim_printf("CROMFDC: Ctrl Out" NLP);
} }
#endif /* 0 */ #endif /* 0 */
if(crofdc_type < 64) { if(crofdc_type < 64) {

15
AltairZ80/s100_adcs6.c
View file

@ -44,7 +44,6 @@
*************************************************************************/ *************************************************************************/
/*#define DBG_MSG */ /*#define DBG_MSG */
#define DBG_MSG
#include "altairz80_defs.h" #include "altairz80_defs.h"
#if defined (_WIN32) #if defined (_WIN32)
@ -55,7 +54,7 @@
#include "wd179x.h" #include "wd179x.h"
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -384,7 +383,7 @@ static t_stat adcs6_svc (UNIT *uptr)
adcs6_info->rtc ++; adcs6_info->rtc ++;
printf("Timer IRQ\n"); sim_printf("Timer IRQ\n");
adcs6_info->ipend |= ADCS6_IRQ_TIMER3; adcs6_info->ipend |= ADCS6_IRQ_TIMER3;
/* sim_activate (adcs6_unit, adcs6_unit->wait); */ /* requeue! */ /* sim_activate (adcs6_unit, adcs6_unit->wait); */ /* requeue! */
@ -412,7 +411,7 @@ static t_stat adcs6_reset(DEVICE *dptr)
if (adcs6_hasProperty(UNIT_ADCS6_ROM)) { if (adcs6_hasProperty(UNIT_ADCS6_ROM)) {
sim_debug(VERBOSE_MSG, &adcs6_dev, "ADCS6: ROM Enabled.\n"); sim_debug(VERBOSE_MSG, &adcs6_dev, "ADCS6: ROM Enabled.\n");
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &adcs6rom, FALSE) != 0) { if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &adcs6rom, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
adcs6_info->rom_disabled = FALSE; adcs6_info->rom_disabled = FALSE;
@ -423,7 +422,7 @@ static t_stat adcs6_reset(DEVICE *dptr)
/* Connect ADCS6 FDC Synchronization / Drive / Density Register */ /* Connect ADCS6 FDC Synchronization / Drive / Density Register */
if(sim_map_resource(0x14, 0x01, RESOURCE_TYPE_IO, &adcs6_control, FALSE) != 0) { if(sim_map_resource(0x14, 0x01, RESOURCE_TYPE_IO, &adcs6_control, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/*#define ADCS6 */ /*#define ADCS6 */
@ -431,19 +430,19 @@ static t_stat adcs6_reset(DEVICE *dptr)
/* Connect ADCS6 Interrupt, and Aux Disk Registers */ /* Connect ADCS6 Interrupt, and Aux Disk Registers */
if(sim_map_resource(0x10, 0x04, RESOURCE_TYPE_IO, &adcs6_dma, FALSE) != 0) { if(sim_map_resource(0x10, 0x04, RESOURCE_TYPE_IO, &adcs6_dma, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect ADCS6 Timer Registers */ /* Connect ADCS6 Timer Registers */
if(sim_map_resource(0x04, 0x08, RESOURCE_TYPE_IO, &adcs6_timer, FALSE) != 0) { if(sim_map_resource(0x04, 0x08, RESOURCE_TYPE_IO, &adcs6_timer, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
#endif #endif
/* Connect ADCS6 Memory Management / Bank Select Register */ /* Connect ADCS6 Memory Management / Bank Select Register */
if(sim_map_resource(0x15, 0x7, RESOURCE_TYPE_IO, &adcs6_banksel, FALSE) != 0) { if(sim_map_resource(0x15, 0x7, RESOURCE_TYPE_IO, &adcs6_banksel, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }

6
AltairZ80/s100_disk1a.c
View file

@ -53,7 +53,7 @@
#include "i8272.h" #include "i8272.h"
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -725,13 +725,13 @@ static t_stat disk1a_reset(DEVICE *dptr)
/* Connect DISK1A ROM at base address */ /* Connect DISK1A ROM at base address */
if (disk1a_hasProperty(UNIT_DISK1A_ROM)) if (disk1a_hasProperty(UNIT_DISK1A_ROM))
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &disk1arom, FALSE) != 0) { if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &disk1arom, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base); sim_printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect DISK1A at base address */ /* Connect DISK1A at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk1adev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk1adev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }

32
AltairZ80/s100_disk2.c
View file

@ -214,7 +214,7 @@ static t_stat disk2_reset(DEVICE *dptr)
} else { } else {
/* Connect DISK2 at base address */ /* Connect DISK2 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk2dev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk2dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -268,23 +268,23 @@ static t_stat disk2_attach(UNIT *uptr, char *cptr)
} }
if (uptr->flags & UNIT_DISK2_VERBOSE) if (uptr->flags & UNIT_DISK2_VERBOSE)
printf("DISK2%d, attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("DISK2%d, attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if(uptr->capac < 318000) { if(uptr->capac < 318000) {
printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n"); sim_printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n");
disk2_detach(uptr); disk2_detach(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
} }
if (uptr->flags & UNIT_DISK2_VERBOSE) if (uptr->flags & UNIT_DISK2_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
disk2_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_DISK2_VERBOSE), disk2_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_DISK2_VERBOSE),
&disk2_dev, VERBOSE_MSG, VERBOSE_MSG); &disk2_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_DISK2_VERBOSE) if (uptr->flags & UNIT_DISK2_VERBOSE)
printf("\n"); sim_printf("\n");
} else { } else {
disk2_info->drive[i].imd = NULL; disk2_info->drive[i].imd = NULL;
} }
@ -306,7 +306,7 @@ static t_stat disk2_detach(UNIT *uptr)
} }
if (uptr->flags & UNIT_DISK2_VERBOSE) if (uptr->flags & UNIT_DISK2_VERBOSE)
printf("Detach DISK2%d\n", i); sim_printf("Detach DISK2%d\n", i);
r = detach_unit(uptr); /* detach unit */ r = detach_unit(uptr); /* detach unit */
if ( r != SCPE_OK) if ( r != SCPE_OK)
@ -440,7 +440,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
sim_debug(RD_DATA_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT sim_debug(RD_DATA_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT
" READ_DATA: (C:%d/H:%d/S:%d)\n", PCX, disk2_info->cyl, disk2_info->head, disk2_info->sector); " READ_DATA: (C:%d/H:%d/S:%d)\n", PCX, disk2_info->cyl, disk2_info->head, disk2_info->sector);
if(disk2_info->head_sel != disk2_info->head) { if(disk2_info->head_sel != disk2_info->head) {
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" READ_DATA: head_sel != head" NLP, PCX); " READ_DATA: head_sel != head" NLP, PCX);
} }
/* See FIXME above... that might be why this does not work properly... */ /* See FIXME above... that might be why this does not work properly... */
@ -459,12 +459,12 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
} }
if(sdata.u.header[2] == disk2_info->sector) { if(sdata.u.header[2] == disk2_info->sector) {
if(sdata.u.header[0] != disk2_info->cyl) { /*pDrive->track) { */ if(sdata.u.header[0] != disk2_info->cyl) { /*pDrive->track) { */
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" READ_DATA Incorrect header: track" NLP, PCX); " READ_DATA Incorrect header: track" NLP, PCX);
disk2_info->timeout = 1; disk2_info->timeout = 1;
} }
if(sdata.u.header[1] != disk2_info->head) { if(sdata.u.header[1] != disk2_info->head) {
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" READ_DATA Incorrect header: head" NLP, PCX); " READ_DATA Incorrect header: head" NLP, PCX);
disk2_info->timeout = 1; disk2_info->timeout = 1;
} }
@ -473,7 +473,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
break; break;
} }
if(i == pDrive->nsectors) { if(i == pDrive->nsectors) {
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" Sector not found" NLP, PCX); " Sector not found" NLP, PCX);
disk2_info->timeout = 1; disk2_info->timeout = 1;
} }
@ -484,7 +484,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
sim_debug(WR_DATA_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT sim_debug(WR_DATA_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT
" WRITE_DATA: (C:%d/H:%d/S:%d)\n", PCX, disk2_info->cyl, disk2_info->head, disk2_info->sector); " WRITE_DATA: (C:%d/H:%d/S:%d)\n", PCX, disk2_info->cyl, disk2_info->head, disk2_info->sector);
if(disk2_info->head_sel != disk2_info->head) { if(disk2_info->head_sel != disk2_info->head) {
printf("DISK2: " ADDRESS_FORMAT " WRITE_DATA: head_sel != head" NLP, PCX); sim_printf("DISK2: " ADDRESS_FORMAT " WRITE_DATA: head_sel != head" NLP, PCX);
} }
if(disk2_info->cyl != pDrive->track) { /* problem, should not happen, see above */ if(disk2_info->cyl != pDrive->track) { /* problem, should not happen, see above */
sim_debug(ERROR_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT sim_debug(ERROR_MSG, &disk2_dev, "DISK2: " ADDRESS_FORMAT
@ -503,12 +503,12 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
} }
if(sdata.u.header[2] == disk2_info->sector) { if(sdata.u.header[2] == disk2_info->sector) {
if(sdata.u.header[0] != disk2_info->cyl) { if(sdata.u.header[0] != disk2_info->cyl) {
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" WRITE_DATA Incorrect header: track" NLP, PCX); " WRITE_DATA Incorrect header: track" NLP, PCX);
disk2_info->timeout = 1; disk2_info->timeout = 1;
} }
if(sdata.u.header[1] != disk2_info->head) { if(sdata.u.header[1] != disk2_info->head) {
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" WRITE_DATA Incorrect header: head" NLP, PCX); " WRITE_DATA Incorrect header: head" NLP, PCX);
disk2_info->timeout = 1; disk2_info->timeout = 1;
} }
@ -524,7 +524,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
" WRITE_DATA: sim_fread error.\n", PCX); " WRITE_DATA: sim_fread error.\n", PCX);
} }
if(i == pDrive->nsectors) { if(i == pDrive->nsectors) {
printf("DISK2: " ADDRESS_FORMAT " Sector not found" NLP, PCX); sim_printf("DISK2: " ADDRESS_FORMAT " Sector not found" NLP, PCX);
disk2_info->timeout = 1; disk2_info->timeout = 1;
} }
} }
@ -561,7 +561,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
break; break;
default: default:
printf("DISK2: " ADDRESS_FORMAT " Unknown CMD=%d" NLP, PCX, disk2_info->ctl_op); sim_printf("DISK2: " ADDRESS_FORMAT " Unknown CMD=%d" NLP, PCX, disk2_info->ctl_op);
break; break;
} }
@ -587,7 +587,7 @@ static uint8 DISK2_Write(const uint32 Addr, uint8 cData)
disk2_info->sel_drive = 3; disk2_info->sel_drive = 3;
break; break;
default: default:
printf("DISK2: " ADDRESS_FORMAT sim_printf("DISK2: " ADDRESS_FORMAT
" Error, invalid drive select=0x%x" NLP, PCX, cData >> 4); " Error, invalid drive select=0x%x" NLP, PCX, cData >> 4);
break; break;
} }

12
AltairZ80/s100_disk3.c
View file

@ -279,7 +279,7 @@ static t_stat disk3_reset(DEVICE *dptr)
} else { } else {
/* Connect DISK3 at base address */ /* Connect DISK3 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk3dev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &disk3dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -335,23 +335,23 @@ static t_stat disk3_attach(UNIT *uptr, char *cptr)
} }
if (uptr->flags & UNIT_DISK3_VERBOSE) if (uptr->flags & UNIT_DISK3_VERBOSE)
printf("DISK3%d, attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("DISK3%d, attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if(uptr->capac < 318000) { if(uptr->capac < 318000) {
printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n"); sim_printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n");
disk3_detach(uptr); disk3_detach(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
} }
if (uptr->flags & UNIT_DISK3_VERBOSE) if (uptr->flags & UNIT_DISK3_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
disk3_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_DISK3_VERBOSE), disk3_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_DISK3_VERBOSE),
&disk3_dev, VERBOSE_MSG, VERBOSE_MSG); &disk3_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_DISK3_VERBOSE) if (uptr->flags & UNIT_DISK3_VERBOSE)
printf("\n"); sim_printf("\n");
} else { } else {
disk3_info->drive[i].imd = NULL; disk3_info->drive[i].imd = NULL;
} }
@ -378,7 +378,7 @@ static t_stat disk3_detach(UNIT *uptr)
pDrive->ready = 0; pDrive->ready = 0;
if (uptr->flags & UNIT_DISK3_VERBOSE) if (uptr->flags & UNIT_DISK3_VERBOSE)
printf("Detach DISK3%d\n", i); sim_printf("Detach DISK3%d\n", i);
r = detach_unit(uptr); /* detach unit */ r = detach_unit(uptr); /* detach unit */
if ( r != SCPE_OK) if ( r != SCPE_OK)

16
AltairZ80/s100_fif.c
View file

@ -154,7 +154,7 @@ static t_stat fif_reset(DEVICE *dptr)
} else { } else {
/* Connect HDSK at base address */ /* Connect HDSK at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &fif_io, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &fif_io, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->mem_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS; dptr->flags |= DEV_DIS;
return SCPE_ARG; return SCPE_ARG;
} }
@ -201,7 +201,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val)
int32 rtn; int32 rtn;
#if 0 #if 0
printf("%02x %02x %02x %02x %02x %02x %02x %02x \n", sim_printf("%02x %02x %02x %02x %02x %02x %02x %02x \n",
val, val,
dsc->cmd_unit, dsc->cmd_unit,
dsc->result, dsc->result,
@ -216,7 +216,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val)
if (current_disk >= NUM_OF_DSK) { if (current_disk >= NUM_OF_DSK) {
if (hasVerbose() && (warnDSK11 < warnLevelDSK)) { if (hasVerbose() && (warnDSK11 < warnLevelDSK)) {
warnDSK11++; warnDSK11++;
/*03*/ printf("FIF%i: " ADDRESS_FORMAT " Attempt disk io on illegal disk %d - ignored." NLP, current_disk, PCX, current_disk); /*03*/ sim_printf("FIF%i: " ADDRESS_FORMAT " Attempt disk io on illegal disk %d - ignored." NLP, current_disk, PCX, current_disk);
} }
return 0; /* no drive selected - can do nothing */ return 0; /* no drive selected - can do nothing */
} }
@ -224,7 +224,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val)
if ((current_disk_flags & UNIT_ATT) == 0) { /* nothing attached? */ if ((current_disk_flags & UNIT_ATT) == 0) { /* nothing attached? */
if ( (current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK) ) { if ( (current_disk_flags & UNIT_DSK_VERBOSE) && (warnAttached[current_disk] < warnLevelDSK) ) {
warnAttached[current_disk]++; warnAttached[current_disk]++;
/*02*/printf("FIF%i: " ADDRESS_FORMAT " Attempt to select unattached FIF%d - ignored." NLP, current_disk, PCX, current_disk); /*02*/sim_printf("FIF%i: " ADDRESS_FORMAT " Attempt to select unattached FIF%d - ignored." NLP, current_disk, PCX, current_disk);
} }
current_disk = NUM_OF_DSK; current_disk = NUM_OF_DSK;
return 2; return 2;
@ -236,7 +236,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val)
/* decode request: */ /* decode request: */
switch (dsc->cmd_unit >> 4) { switch (dsc->cmd_unit >> 4) {
case FMT_TRACK: case FMT_TRACK:
/*printf("%c", dsc->track % 10 ? '*' : '0' + + dsc->track / 10); */ /*sim_printf("%c", dsc->track % 10 ? '*' : '0' + + dsc->track / 10); */
/*Sleep(250); */ /*Sleep(250); */
memset(blanksec, 0, SEC_SZ); memset(blanksec, 0, SEC_SZ);
addr = dsc->track * SPT; addr = dsc->track * SPT;
@ -255,7 +255,7 @@ static int DoDiskOperation(desc_t *dsc, uint8 val)
if ( (rtn != SEC_SZ) && (current_disk_flags & UNIT_DSK_VERBOSE) && if ( (rtn != SEC_SZ) && (current_disk_flags & UNIT_DSK_VERBOSE) &&
(warnAttached[current_disk] < warnLevelDSK) ) { (warnAttached[current_disk] < warnLevelDSK) ) {
warnAttached[current_disk]++; warnAttached[current_disk]++;
printf("FIF%i: " ADDRESS_FORMAT " sim_fread error." NLP, current_disk, PCX); sim_printf("FIF%i: " ADDRESS_FORMAT " sim_fread error." NLP, current_disk, PCX);
} }
addr = dsc->addr_l + (dsc->addr_h << 8); /* no assumption on endianness */ addr = dsc->addr_l + (dsc->addr_h << 8); /* no assumption on endianness */
for (kt = 0; kt < SEC_SZ; kt++) { for (kt = 0; kt < SEC_SZ; kt++) {
@ -327,13 +327,13 @@ static int32 fif_io(const int32 port, const int32 io, const int32 data) {
break; break;
case 1: case 1:
/*printf("D1 %02x %02x\n", desc, data); */ /*sim_printf("D1 %02x %02x\n", desc, data); */
fdAdr[desc] = data; /* LSB of descriptor address */ fdAdr[desc] = data; /* LSB of descriptor address */
fdstate++; fdstate++;
break; break;
case 2: case 2:
/*printf("D2 %02x %02x\n", desc, data); */ /*sim_printf("D2 %02x %02x\n", desc, data); */
fdAdr[desc] |= data << 8; /* MSB of descriptor address */ fdAdr[desc] |= data << 8; /* MSB of descriptor address */
fdstate = 0; fdstate = 0;
break; break;

12
AltairZ80/s100_hdc1001.c
View file

@ -173,7 +173,7 @@ static t_stat hdc1001_reset(DEVICE *dptr)
} else { } else {
/* Connect HDC1001 at base address */ /* Connect HDC1001 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &hdc1001dev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &hdc1001dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -229,23 +229,23 @@ static t_stat hdc1001_attach(UNIT *uptr, char *cptr)
} }
if (uptr->flags & UNIT_HDC1001_VERBOSE) if (uptr->flags & UNIT_HDC1001_VERBOSE)
printf("HDC1001%d, attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("HDC1001%d, attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if(uptr->capac < 318000) { if(uptr->capac < 318000) {
printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n"); sim_printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n");
hdc1001_detach(uptr); hdc1001_detach(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
} }
if (uptr->flags & UNIT_HDC1001_VERBOSE) if (uptr->flags & UNIT_HDC1001_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
hdc1001_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_HDC1001_VERBOSE), hdc1001_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_HDC1001_VERBOSE),
&hdc1001_dev, VERBOSE_MSG, VERBOSE_MSG); &hdc1001_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_HDC1001_VERBOSE) if (uptr->flags & UNIT_HDC1001_VERBOSE)
printf("\n"); sim_printf("\n");
} else { } else {
hdc1001_info->drive[i].imd = NULL; hdc1001_info->drive[i].imd = NULL;
} }
@ -272,7 +272,7 @@ static t_stat hdc1001_detach(UNIT *uptr)
pDrive->ready = 0; pDrive->ready = 0;
if (uptr->flags & UNIT_HDC1001_VERBOSE) if (uptr->flags & UNIT_HDC1001_VERBOSE)
printf("Detach HDC1001%d\n", i); sim_printf("Detach HDC1001%d\n", i);
r = detach_unit(uptr); /* detach unit */ r = detach_unit(uptr); /* detach unit */
if ( r != SCPE_OK) if ( r != SCPE_OK)

4
AltairZ80/s100_if3.c
View file

@ -51,7 +51,7 @@
#include <time.h> #include <time.h>
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -181,7 +181,7 @@ static t_stat if3_reset(DEVICE *dptr)
} else { } else {
/* Connect IF3 at base address */ /* Connect IF3 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &if3dev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &if3dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }

12
AltairZ80/s100_mdriveh.c
View file

@ -48,7 +48,7 @@
#endif #endif
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -154,7 +154,7 @@ static t_stat mdriveh_reset(DEVICE *dptr)
} else { } else {
/* Connect MDRIVEH at base address */ /* Connect MDRIVEH at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &mdrivehdev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -163,21 +163,21 @@ static t_stat mdriveh_reset(DEVICE *dptr)
mdriveh_info->uptr[i] = dptr->units[i]; mdriveh_info->uptr[i] = dptr->units[i];
if((dptr->flags & DEV_DIS) || (dptr->units[i].flags & UNIT_DIS)) { if((dptr->flags & DEV_DIS) || (dptr->units[i].flags & UNIT_DIS)) {
if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)
printf("MDRIVEH: Unit %d disabled", i); sim_printf("MDRIVEH: Unit %d disabled", i);
if(mdriveh_info->storage[i] != NULL) { if(mdriveh_info->storage[i] != NULL) {
if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)
printf(", freed 0x%p\n", mdriveh_info->storage[i]); sim_printf(", freed 0x%p\n", mdriveh_info->storage[i]);
free(mdriveh_info->storage[i]); free(mdriveh_info->storage[i]);
mdriveh_info->storage[i] = NULL; mdriveh_info->storage[i] = NULL;
} else if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) { } else if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) {
printf(".\n"); sim_printf(".\n");
} }
} else { } else {
if(mdriveh_info->storage[i] == NULL) { if(mdriveh_info->storage[i] == NULL) {
mdriveh_info->storage[i] = calloc(1, 524288); mdriveh_info->storage[i] = calloc(1, 524288);
} }
if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE) if (dptr->units[i].flags & UNIT_MDRIVEH_VERBOSE)
printf("MDRIVEH: Unit %d enabled, 512K at 0x%p\n", i, mdriveh_info->storage[i]); sim_printf("MDRIVEH: Unit %d enabled, 512K at 0x%p\n", i, mdriveh_info->storage[i]);
} }
} }

28
AltairZ80/s100_mdsad.c
View file

@ -49,7 +49,7 @@
#endif #endif
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -277,7 +277,7 @@ static t_stat mdsad_reset(DEVICE *dptr)
/* Connect MDSAD at base address */ /* Connect MDSAD at base address */
if(sim_map_resource(pnp->mem_base, pnp->mem_size, if(sim_map_resource(pnp->mem_base, pnp->mem_size,
RESOURCE_TYPE_MEMORY, &mdsaddev, FALSE) != 0) { RESOURCE_TYPE_MEMORY, &mdsaddev, FALSE) != 0) {
printf("%s: error mapping resource at 0x%04x\n", sim_printf("%s: error mapping resource at 0x%04x\n",
__FUNCTION__, pnp->mem_base); __FUNCTION__, pnp->mem_base);
dptr->flags |= DEV_DIS; dptr->flags |= DEV_DIS;
return SCPE_ARG; return SCPE_ARG;
@ -320,7 +320,7 @@ static t_stat mdsad_attach(UNIT *uptr, char *cptr)
if(uptr->capac > 0) { if(uptr->capac > 0) {
char *rtn = fgets(header, 4, uptr->fileref); char *rtn = fgets(header, 4, uptr->fileref);
if((rtn != NULL) && (strncmp(header, "CPT", 3) == 0)) { if((rtn != NULL) && (strncmp(header, "CPT", 3) == 0)) {
printf("CPT images not yet supported\n"); sim_printf("CPT images not yet supported\n");
uptr->u3 = IMAGE_TYPE_CPT; uptr->u3 = IMAGE_TYPE_CPT;
mdsad_detach(uptr); mdsad_detach(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
@ -330,7 +330,7 @@ static t_stat mdsad_attach(UNIT *uptr, char *cptr)
} }
if (uptr->flags & UNIT_MDSAD_VERBOSE) if (uptr->flags & UNIT_MDSAD_VERBOSE)
printf("MDSAD%d, attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("MDSAD%d, attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
@ -415,13 +415,13 @@ static uint8 mdsad_rom[] = {
static void showdata(int32 isRead) { static void showdata(int32 isRead) {
int32 i; int32 i;
printf("MDSAD: " ADDRESS_FORMAT " %s Sector =" NLP "\t", PCX, isRead ? "Read" : "Write"); sim_printf("MDSAD: " ADDRESS_FORMAT " %s Sector =" NLP "\t", PCX, isRead ? "Read" : "Write");
for(i=0; i < MDSAD_SECTOR_LEN; i++) { for(i=0; i < MDSAD_SECTOR_LEN; i++) {
printf("%02X ", sdata.u.data[i]); sim_printf("%02X ", sdata.u.data[i]);
if(((i+1) & 0xf) == 0) if(((i+1) & 0xf) == 0)
printf(NLP "\t"); sim_printf(NLP "\t");
} }
printf(NLP); sim_printf(NLP);
} }
static int checksum; static int checksum;
@ -489,7 +489,7 @@ static uint8 MDSAD_Read(const uint32 Addr)
{ {
case IMAGE_TYPE_DSK: case IMAGE_TYPE_DSK:
if(pDrive->uptr->fileref == NULL) { if(pDrive->uptr->fileref == NULL) {
printf(".fileref is NULL!" NLP); sim_printf(".fileref is NULL!" NLP);
} else { } else {
sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET); sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET);
sim_fwrite(sdata.u.data, 1, MDSAD_SECTOR_LEN, sim_fwrite(sdata.u.data, 1, MDSAD_SECTOR_LEN,
@ -497,10 +497,10 @@ static uint8 MDSAD_Read(const uint32 Addr)
} }
break; break;
case IMAGE_TYPE_CPT: case IMAGE_TYPE_CPT:
printf("%s: CPT Format not supported" NLP, __FUNCTION__); sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__);
break; break;
default: default:
printf("%s: Unknown image Format" NLP, __FUNCTION__); sim_printf("%s: Unknown image Format" NLP, __FUNCTION__);
break; break;
} }
} }
@ -720,7 +720,7 @@ static uint8 MDSAD_Read(const uint32 Addr)
{ {
case IMAGE_TYPE_DSK: case IMAGE_TYPE_DSK:
if(pDrive->uptr->fileref == NULL) { if(pDrive->uptr->fileref == NULL) {
printf(".fileref is NULL!" NLP); sim_printf(".fileref is NULL!" NLP);
} else { } else {
sim_fseek((pDrive->uptr)->fileref, sim_fseek((pDrive->uptr)->fileref,
sec_offset, SEEK_SET); sec_offset, SEEK_SET);
@ -733,11 +733,11 @@ static uint8 MDSAD_Read(const uint32 Addr)
} }
break; break;
case IMAGE_TYPE_CPT: case IMAGE_TYPE_CPT:
printf("%s: CPT Format not supported" sim_printf("%s: CPT Format not supported"
NLP, __FUNCTION__); NLP, __FUNCTION__);
break; break;
default: default:
printf("%s: Unknown image Format" sim_printf("%s: Unknown image Format"
NLP, __FUNCTION__); NLP, __FUNCTION__);
break; break;
} }

6
AltairZ80/s100_scp300f.c
View file

@ -48,7 +48,7 @@
#endif #endif
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -142,12 +142,12 @@ static t_stat scp300f_reset(DEVICE *dptr)
} else { } else {
/* Connect SCP300F at base address */ /* Connect SCP300F at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &scp300fdev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &scp300fdev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
/* Connect SCP300F Memory (512K RAM, 1MB FLASH) */ /* Connect SCP300F Memory (512K RAM, 1MB FLASH) */
if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &scp300f_mem, FALSE) != 0) { if(sim_map_resource(pnp->mem_base, pnp->mem_size, RESOURCE_TYPE_MEMORY, &scp300f_mem, FALSE) != 0) {
printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base); sim_printf("%s: error mapping MEM resource at 0x%04x\n", __FUNCTION__, pnp->mem_base);
return SCPE_ARG; return SCPE_ARG;
} }

8
AltairZ80/s100_selchan.c
View file

@ -48,7 +48,7 @@
#endif #endif
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -128,7 +128,7 @@ static t_stat selchan_reset(DEVICE *dptr)
} else { } else {
/* Connect SELCHAN at base address */ /* Connect SELCHAN at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &selchandev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &selchandev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -171,14 +171,14 @@ int32 selchan_dma(uint8 *buf, uint32 len)
uint32 i; uint32 i;
if(selchan_info->reg_cnt != 4) { if(selchan_info->reg_cnt != 4) {
printf("SELCHAN: " ADDRESS_FORMAT " Programming error: selector channel disabled." NLP, sim_printf("SELCHAN: " ADDRESS_FORMAT " Programming error: selector channel disabled." NLP,
PCX); PCX);
return (-1); return (-1);
} }
if(selchan_info->dma_mode & SELCHAN_MODE_IO) if(selchan_info->dma_mode & SELCHAN_MODE_IO)
{ {
printf("SELCHAN: " ADDRESS_FORMAT " I/O Not supported" NLP, PCX); sim_printf("SELCHAN: " ADDRESS_FORMAT " I/O Not supported" NLP, PCX);
return (-1); return (-1);
} else { } else {
sim_debug(DMA_MSG, &selchan_dev, "SELCHAN: " ADDRESS_FORMAT " DMA %s Transfer, len=%d\n", PCX, (selchan_info->dma_mode & SELCHAN_MODE_WRITE) ? "WR" : "RD", len); sim_debug(DMA_MSG, &selchan_dev, "SELCHAN: " ADDRESS_FORMAT " DMA %s Transfer, len=%d\n", PCX, (selchan_info->dma_mode & SELCHAN_MODE_WRITE) ? "WR" : "RD", len);

4
AltairZ80/s100_ss1.c
View file

@ -51,7 +51,7 @@
#include <time.h> #include <time.h>
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -240,7 +240,7 @@ static t_stat ss1_reset(DEVICE *dptr)
} else { } else {
/* Connect SS1 at base address */ /* Connect SS1 at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &ss1dev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &ss1dev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} else { } else {
DBG_PRINT(("SS1: Mapped I/O resource at 0x%04x, len=%d\n", pnp->io_base, pnp->io_size)); DBG_PRINT(("SS1: Mapped I/O resource at 0x%04x, len=%d\n", pnp->io_base, pnp->io_size));

36
AltairZ80/vfdhd.c
View file

@ -53,7 +53,7 @@
/* #define DBG_MSG */ /* #define DBG_MSG */
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -213,7 +213,7 @@ static t_stat vfdhd_reset(DEVICE *dptr)
} else { } else {
/* Connect MFDC at base address */ /* Connect MFDC at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &vfdhddev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &vfdhddev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -256,23 +256,23 @@ static t_stat vfdhd_attach(UNIT *uptr, char *cptr)
} }
if (uptr->flags & UNIT_VFDHD_VERBOSE) if (uptr->flags & UNIT_VFDHD_VERBOSE)
printf("VFDHD%d: attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("VFDHD%d: attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if(uptr->capac < 318000) { if(uptr->capac < 318000) {
printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n"); sim_printf("Cannot create IMD files with SIMH.\nCopy an existing file and format it with CP/M.\n");
vfdhd_detach(uptr); vfdhd_detach(uptr);
return SCPE_OPENERR; return SCPE_OPENERR;
} }
if (uptr->flags & UNIT_VFDHD_VERBOSE) if (uptr->flags & UNIT_VFDHD_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
vfdhd_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_VFDHD_VERBOSE), vfdhd_info->drive[i].imd = diskOpenEx((uptr->fileref), (uptr->flags & UNIT_VFDHD_VERBOSE),
&vfdhd_dev, VERBOSE_MSG, VERBOSE_MSG); &vfdhd_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_VFDHD_VERBOSE) if (uptr->flags & UNIT_VFDHD_VERBOSE)
printf("\n"); sim_printf("\n");
} else { } else {
vfdhd_info->drive[i].imd = NULL; vfdhd_info->drive[i].imd = NULL;
} }
@ -288,17 +288,17 @@ static t_stat vfdhd_attach(UNIT *uptr, char *cptr)
vfdhd_info->drive[i].ntracks = 153; /* number of tracks */ vfdhd_info->drive[i].ntracks = 153; /* number of tracks */
vfdhd_info->drive[i].nheads = 6; /* number of heads */ vfdhd_info->drive[i].nheads = 6; /* number of heads */
vfdhd_info->hdsk_type = 1; vfdhd_info->hdsk_type = 1;
printf("10MB\n"); sim_printf("10MB\n");
} else if (hdSize == 5) { } else if (hdSize == 5) {
vfdhd_info->drive[i].ntracks = 153; /* number of tracks */ vfdhd_info->drive[i].ntracks = 153; /* number of tracks */
vfdhd_info->drive[i].nheads = 4; /* number of heads */ vfdhd_info->drive[i].nheads = 4; /* number of heads */
vfdhd_info->hdsk_type = 0; vfdhd_info->hdsk_type = 0;
printf("5MB\n"); sim_printf("5MB\n");
} else { } else {
vfdhd_info->drive[i].ntracks = 512; /* number of tracks */ vfdhd_info->drive[i].ntracks = 512; /* number of tracks */
vfdhd_info->drive[i].nheads = 8; /* number of heads */ vfdhd_info->drive[i].nheads = 8; /* number of heads */
vfdhd_info->hdsk_type = 1; vfdhd_info->hdsk_type = 1;
printf("32MB\n"); sim_printf("32MB\n");
} }
vfdhd_info->drive[i].nheads = 4; /* number of heads */ vfdhd_info->drive[i].nheads = 4; /* number of heads */
@ -551,9 +551,9 @@ static void VFDHD_Command(void)
{ {
case IMAGE_TYPE_IMD: case IMAGE_TYPE_IMD:
if(pDrive->imd == NULL) { if(pDrive->imd == NULL) {
printf(".imd is NULL!" NLP); sim_printf(".imd is NULL!" NLP);
} }
printf("%s: Read: imd=%p" NLP, __FUNCTION__, pDrive->imd); sim_printf("%s: Read: imd=%p" NLP, __FUNCTION__, pDrive->imd);
sectRead(pDrive->imd, sectRead(pDrive->imd,
pDrive->track, pDrive->track,
vfdhd_info->head, vfdhd_info->head,
@ -576,7 +576,7 @@ static void VFDHD_Command(void)
break; break;
case IMAGE_TYPE_DSK: case IMAGE_TYPE_DSK:
if(pDrive->uptr->fileref == NULL) { if(pDrive->uptr->fileref == NULL) {
printf(".fileref is NULL!" NLP); sim_printf(".fileref is NULL!" NLP);
} else { } else {
sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET); sim_fseek((pDrive->uptr)->fileref, sec_offset, SEEK_SET);
rtn = sim_fread(&sdata.u.sync, 1, 274, /*VFDHD_SECTOR_LEN,*/ (pDrive->uptr)->fileref); rtn = sim_fread(&sdata.u.sync, 1, 274, /*VFDHD_SECTOR_LEN,*/ (pDrive->uptr)->fileref);
@ -595,10 +595,10 @@ static void VFDHD_Command(void)
} }
break; break;
case IMAGE_TYPE_CPT: case IMAGE_TYPE_CPT:
printf("%s: CPT Format not supported" NLP, __FUNCTION__); sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__);
break; break;
default: default:
printf("%s: Unknown image Format" NLP, __FUNCTION__); sim_printf("%s: Unknown image Format" NLP, __FUNCTION__);
break; break;
} }
@ -620,7 +620,7 @@ static void VFDHD_Command(void)
{ {
case IMAGE_TYPE_IMD: case IMAGE_TYPE_IMD:
if(pDrive->imd == NULL) { if(pDrive->imd == NULL) {
printf(".imd is NULL!" NLP); sim_printf(".imd is NULL!" NLP);
} }
sectWrite(pDrive->imd, sectWrite(pDrive->imd,
pDrive->track, pDrive->track,
@ -633,7 +633,7 @@ static void VFDHD_Command(void)
break; break;
case IMAGE_TYPE_DSK: case IMAGE_TYPE_DSK:
if(pDrive->uptr->fileref == NULL) { if(pDrive->uptr->fileref == NULL) {
printf(".fileref is NULL!" NLP); sim_printf(".fileref is NULL!" NLP);
} else { } else {
DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR drive=%d, track=%d, head=%d, sector=%d" NLP, DBG_PRINT(("VFDHD: " ADDRESS_FORMAT " WR drive=%d, track=%d, head=%d, sector=%d" NLP,
PCX, PCX,
@ -650,10 +650,10 @@ static void VFDHD_Command(void)
} }
break; break;
case IMAGE_TYPE_CPT: case IMAGE_TYPE_CPT:
printf("%s: CPT Format not supported" NLP, __FUNCTION__); sim_printf("%s: CPT Format not supported" NLP, __FUNCTION__);
break; break;
default: default:
printf("%s: Unknown image Format" NLP, __FUNCTION__); sim_printf("%s: Unknown image Format" NLP, __FUNCTION__);
break; break;
} }
} }

18
AltairZ80/wd179x.c
View file

@ -51,7 +51,7 @@
#include "wd179x.h" #include "wd179x.h"
#ifdef DBG_MSG #ifdef DBG_MSG
#define DBG_PRINT(args) printf args #define DBG_PRINT(args) sim_printf args
#else #else
#define DBG_PRINT(args) #define DBG_PRINT(args)
#endif #endif
@ -272,7 +272,7 @@ static t_stat wd179x_reset(DEVICE *dptr)
} else { } else {
/* Connect I/O Ports at base address */ /* Connect I/O Ports at base address */
if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &wd179xdev, FALSE) != 0) { if(sim_map_resource(pnp->io_base, pnp->io_size, RESOURCE_TYPE_IO, &wd179xdev, FALSE) != 0) {
printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base); sim_printf("%s: error mapping I/O resource at 0x%04x\n", __FUNCTION__, pnp->io_base);
return SCPE_ARG; return SCPE_ARG;
} }
} }
@ -333,14 +333,14 @@ t_stat wd179x_attach(UNIT *uptr, char *cptr)
if(uptr->capac > 0) { if(uptr->capac > 0) {
char *rtn = fgets(header, 4, uptr->fileref); char *rtn = fgets(header, 4, uptr->fileref);
if ((rtn != NULL) && strncmp(header, "IMD", 3)) { if ((rtn != NULL) && strncmp(header, "IMD", 3)) {
printf("WD179X: Only IMD disk images are supported\n"); sim_printf("WD179X: Only IMD disk images are supported\n");
wd179x_info->drive[i].uptr = NULL; wd179x_info->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
} else { } else {
/* create a disk image file in IMD format. */ /* create a disk image file in IMD format. */
if (diskCreate(uptr->fileref, "$Id: wd179x.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) { if (diskCreate(uptr->fileref, "$Id: wd179x.c 1999 2008-07-22 04:25:28Z hharte $") != SCPE_OK) {
printf("WD179X: Failed to create IMD disk.\n"); sim_printf("WD179X: Failed to create IMD disk.\n");
wd179x_info->drive[i].uptr = NULL; wd179x_info->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -350,19 +350,19 @@ t_stat wd179x_attach(UNIT *uptr, char *cptr)
uptr->u3 = IMAGE_TYPE_IMD; uptr->u3 = IMAGE_TYPE_IMD;
if (uptr->flags & UNIT_WD179X_VERBOSE) if (uptr->flags & UNIT_WD179X_VERBOSE)
printf("WD179X%d: attached to '%s', type=%s, len=%d\n", i, cptr, sim_printf("WD179X%d: attached to '%s', type=%s, len=%d\n", i, cptr,
uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK", uptr->u3 == IMAGE_TYPE_IMD ? "IMD" : uptr->u3 == IMAGE_TYPE_CPT ? "CPT" : "DSK",
uptr->capac); uptr->capac);
if(uptr->u3 == IMAGE_TYPE_IMD) { if(uptr->u3 == IMAGE_TYPE_IMD) {
if (uptr->flags & UNIT_WD179X_VERBOSE) if (uptr->flags & UNIT_WD179X_VERBOSE)
printf("--------------------------------------------------------\n"); sim_printf("--------------------------------------------------------\n");
wd179x_info->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_WD179X_VERBOSE, wd179x_info->drive[i].imd = diskOpenEx(uptr->fileref, uptr->flags & UNIT_WD179X_VERBOSE,
&wd179x_dev, VERBOSE_MSG, VERBOSE_MSG); &wd179x_dev, VERBOSE_MSG, VERBOSE_MSG);
if (uptr->flags & UNIT_WD179X_VERBOSE) if (uptr->flags & UNIT_WD179X_VERBOSE)
printf("\n"); sim_printf("\n");
if (wd179x_info->drive[i].imd == NULL) { if (wd179x_info->drive[i].imd == NULL) {
printf("WD179X: IMD disk corrupt.\n"); sim_printf("WD179X: IMD disk corrupt.\n");
wd179x_info->drive[i].uptr = NULL; wd179x_info->drive[i].uptr = NULL;
return SCPE_OPENERR; return SCPE_OPENERR;
} }
@ -882,7 +882,7 @@ static uint8 Do1793Command(uint8 cCommand)
wd179x_info->index_pulse_wait = TRUE; wd179x_info->index_pulse_wait = TRUE;
if(wd179x_info->sel_drive < WD179X_MAX_DRIVES) { if(wd179x_info->sel_drive < WD179X_MAX_DRIVES) {
sim_activate (wd179x_unit, ((wd179x_info->drive[wd179x_info->sel_drive].imd->ntracks % 77) == 0) ? CROMFDC_8IN_ROT : CROMFDC_5IN_ROT); /* Generate INDEX pulse */ sim_activate (wd179x_unit, ((wd179x_info->drive[wd179x_info->sel_drive].imd->ntracks % 77) == 0) ? CROMFDC_8IN_ROT : CROMFDC_5IN_ROT); /* Generate INDEX pulse */
/* printf("Drive %d Num tracks=%d\n", wd179x_info->sel_drive, wd179x_info->drive[wd179x_info->sel_drive].imd->ntracks); */ /* sim_printf("Drive %d Num tracks=%d\n", wd179x_info->sel_drive, wd179x_info->drive[wd179x_info->sel_drive].imd->ntracks); */
} }
} else { } else {
wd179x_info->intrq = 1; wd179x_info->intrq = 1;