TMXR Properly select the delay time considering all the lines on a mux.
A multiplexer may have a combination of speed limited behaviors on different lines, and there may be lines which are idle and lines which are actively receiving input. Some of the problems described in #252 are fixed by this.
This commit is contained in:
parent
ac9e19e250
commit
ed5353b4f4
1 changed files with 14 additions and 5 deletions
17
sim_tmxr.c
17
sim_tmxr.c
|
@ -1565,8 +1565,12 @@ if ((lp->conn && lp->rcve) && /* conn & enb & */
|
||||||
} /* end if conn */
|
} /* end if conn */
|
||||||
if (lp->rxbpi == lp->rxbpr) /* empty? zero ptrs */
|
if (lp->rxbpi == lp->rxbpr) /* empty? zero ptrs */
|
||||||
lp->rxbpi = lp->rxbpr = 0;
|
lp->rxbpi = lp->rxbpr = 0;
|
||||||
if (val && lp->rxbps)
|
if (lp->rxbps) {
|
||||||
|
if (val)
|
||||||
lp->rxnexttime = floor (sim_gtime () + ((lp->rxdelta * sim_timer_inst_per_sec ())/lp->rxbpsfactor));
|
lp->rxnexttime = floor (sim_gtime () + ((lp->rxdelta * sim_timer_inst_per_sec ())/lp->rxbpsfactor));
|
||||||
|
else
|
||||||
|
lp->rxnexttime = 0.0;
|
||||||
|
}
|
||||||
tmxr_debug_return(lp, val);
|
tmxr_debug_return(lp, val);
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
@ -2231,7 +2235,7 @@ if (*cptr == '*') {
|
||||||
lp->rxbpsfactor = TMXR_RX_BPS_UNIT_SCALE * rxbpsfactor;
|
lp->rxbpsfactor = TMXR_RX_BPS_UNIT_SCALE * rxbpsfactor;
|
||||||
}
|
}
|
||||||
lp->rxdelta = _tmln_speed_delta (speed);
|
lp->rxdelta = _tmln_speed_delta (speed);
|
||||||
lp->rxnexttime = 0;
|
lp->rxnexttime = 0.0;
|
||||||
uptr = lp->uptr;
|
uptr = lp->uptr;
|
||||||
if ((!uptr) && (lp->mp))
|
if ((!uptr) && (lp->mp))
|
||||||
uptr = lp->mp->uptr;
|
uptr = lp->mp->uptr;
|
||||||
|
@ -3801,16 +3805,21 @@ if (mp) {
|
||||||
if (tmxr_rqln_bare (lp, FALSE)) {
|
if (tmxr_rqln_bare (lp, FALSE)) {
|
||||||
int32 due;
|
int32 due;
|
||||||
|
|
||||||
if (lp->rxbps)
|
if ((lp->rxbps) && (lp->rxnexttime != 0.0))
|
||||||
due = (int32)(lp->rxnexttime - sim_gtime_now);
|
due = (int32)(lp->rxnexttime - sim_gtime_now);
|
||||||
else
|
else
|
||||||
due = (int32)((uptr->wait * sim_timer_inst_per_sec ())/TMXR_RX_BPS_UNIT_SCALE);
|
due = (int32)((uptr->wait * sim_timer_inst_per_sec ())/TMXR_RX_BPS_UNIT_SCALE);
|
||||||
soon = MIN(soon, due);
|
soon = MIN(soon, due);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (soon != interval)
|
if (soon != interval) {
|
||||||
|
if (soon < 0)
|
||||||
|
soon = 0;
|
||||||
|
sim_debug (TIMER_DBG_MUX, &sim_timer_dev, "scheduling %s after %d instructions\n", sim_uname (uptr), soon);
|
||||||
return _sim_activate (uptr, soon);
|
return _sim_activate (uptr, soon);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
sim_debug (TIMER_DBG_MUX, &sim_timer_dev, "scheduling %s after interval %d instructions\n", sim_uname (uptr), interval);
|
||||||
return sim_clock_coschedule_tmr (uptr, tmr, interval);
|
return sim_clock_coschedule_tmr (uptr, tmr, interval);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
Loading…
Add table
Reference in a new issue