VAX, VAX750, VAX780, VAX8600: Properly coschedule console input with TMXR_MULT

The timer specific coscheduling routines take ticks as the delay argument
This commit is contained in:
Mark Pizzolato 2016-12-12 01:53:49 -08:00
parent 180b03107e
commit eea394422e
4 changed files with 4 additions and 4 deletions

View file

@ -535,7 +535,7 @@ t_stat tti_svc (UNIT *uptr)
{ {
int32 c; int32 c;
sim_clock_coschedule_tmr (uptr, TMR_CLK, tmxr_poll); /* continue poll */ sim_clock_coschedule_tmr (uptr, TMR_CLK, TMXR_MULT); /* continue poll */
if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */ if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */
((sim_os_msec () - tti_buftime) < 500)) ((sim_os_msec () - tti_buftime) < 500))

View file

@ -503,7 +503,7 @@ t_stat tti_svc (UNIT *uptr)
{ {
int32 c; int32 c;
sim_clock_coschedule_tmr (uptr, TMR_CLK, tmxr_poll); /* continue poll */ sim_clock_coschedule_tmr (uptr, TMR_CLK, TMXR_MULT); /* continue poll */
if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */ if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */
((sim_os_msec () - tti_buftime) < 500)) ((sim_os_msec () - tti_buftime) < 500))

View file

@ -591,7 +591,7 @@ int32 line = uptr - tti_dev.units;
switch (line) { switch (line) {
case ID_CT: /* console terminal */ case ID_CT: /* console terminal */
sim_clock_coschedule_tmr (uptr, TMR_CLK, tmxr_poll);/* continue poll */ sim_clock_coschedule_tmr (uptr, TMR_CLK, TMXR_MULT);/* continue poll */
if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */ if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */
((sim_os_msec () - tti_buftime) < 500)) ((sim_os_msec () - tti_buftime) < 500))
return SCPE_OK; return SCPE_OK;

View file

@ -345,7 +345,7 @@ t_stat tti_svc (UNIT *uptr)
{ {
int32 c; int32 c;
sim_clock_coschedule_tmr (uptr, TMR_CLK, tmxr_poll); /* continue poll */ sim_clock_coschedule_tmr (uptr, TMR_CLK, TMXR_MULT); /* continue poll */
if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */ if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */
((sim_os_msec () - tti_buftime) < 500)) ((sim_os_msec () - tti_buftime) < 500))