PDP11: Update 11/40 and 11/45 models to reflect MMU was an option
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3bf02304da
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3 changed files with 4 additions and 2 deletions
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@ -623,6 +623,8 @@ MTAB cpu_mod[] = {
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{ MTAB_XTD|MTAB_VDV, OPT_FPP, NULL, "NOFPP", &cpu_clr_opt, NULL, NULL, "disable FPP instructions" },
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{ MTAB_XTD|MTAB_VDV, OPT_CIS, NULL, "CIS", &cpu_set_opt, NULL, NULL, "enable CIS instructions" },
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{ MTAB_XTD|MTAB_VDV, OPT_CIS, NULL, "NOCIS", &cpu_clr_opt, NULL, NULL, "disable CIS instructions" },
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{ MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "MMU", &cpu_set_opt, NULL, NULL, "enable MMU functionality" },
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{ MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "NOMMU", &cpu_clr_opt, NULL, NULL, "disable MMU functionality" },
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{ MTAB_XTD|MTAB_VDV, OPT_BVT, NULL, "BEVENT", &cpu_set_opt, NULL, NULL, "Enable BEVENT line (11/03, 11/23 only)" },
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{ MTAB_XTD|MTAB_VDV, OPT_BVT, NULL, "NOBEVENT", &cpu_clr_opt, NULL, NULL, "Disable BEVENT line (11/03, 11/23 only)" },
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{ UNIT_MSIZE, 8192, NULL, "8K", &cpu_set_size, NULL, NULL, "Set memory size to 8Kb"},
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@ -69,7 +69,7 @@
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#define MM0_1134 0160557
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#define SOP_1140 (BUS_U|OPT_EIS|OPT_MMU)
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#define OPT_1140 (OPT_FIS)
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#define OPT_1140 (OPT_FIS|OPT_MMU)
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#define PSW_1140 0170377
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#define PAR_1140 0007777
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#define PDR_1140 0077516
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@ -84,7 +84,7 @@
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#define MM3_1144 0000077
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#define SOP_1145 (BUS_U|OPT_EIS|OPT_FPP|OPT_MMU|OPT_RH11)
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#define OPT_1145 (OPT_FPP)
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#define OPT_1145 (OPT_FPP|OPT_MMU)
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#define PSW_1145 0174377
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#define PAR_1145 0007777
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#define PDR_1145 0077717
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