From f6e63892b41ac11577c652bcbd2b20206a9e4f69 Mon Sep 17 00:00:00 2001 From: Seth Morabito Date: Thu, 23 Nov 2017 17:07:08 -0800 Subject: [PATCH] 3b2: Preserve opcode values in history --- 3B2/3b2_cpu.c | 42 ++++++++++++++++++++++++------------------ 3B2/3b2_defs.h | 2 +- 3B2/3b2_sys.c | 4 ++-- 3 files changed, 27 insertions(+), 21 deletions(-) diff --git a/3B2/3b2_cpu.c b/3B2/3b2_cpu.c index edd06337..4eacb2ed 100644 --- a/3B2/3b2_cpu.c +++ b/3B2/3b2_cpu.c @@ -45,8 +45,8 @@ uint32 *RAM = NULL; jmp_buf save_env; volatile uint32 abort_context; -/* The last decoded instruction */ -instr cpu_instr; +/* Pointer to the last decoded instruction */ +instr *cpu_instr; /* Circular buffer of instructions */ instr *INST = NULL; @@ -1368,6 +1368,8 @@ t_stat sim_instr(void) uint32 width, offset; t_uint64 mask; + instr inst; + operand *src1, *src2, *src3, *dst; stop_reason = 0; @@ -1497,40 +1499,44 @@ t_stat sim_instr(void) R[NUM_PSW] &= ~PSW_TM; R[NUM_PSW] |= PSW_TM_MASK; - /* Decode the instruction */ - memset(&cpu_instr, 0, sizeof(instr)); - cpu_ilen = decode_instruction(&cpu_instr); - /* Record the instruction for history */ if (cpu_hist_size > 0) { - /* Shallow copy */ - INST[cpu_hist_p] = cpu_instr; - INST[cpu_hist_p].valid = TRUE; + cpu_instr = &INST[cpu_hist_p]; cpu_hist_p = (cpu_hist_p + 1) % cpu_hist_size; + } else { + cpu_instr = &inst; } + /* Decode the instruction */ + memset(cpu_instr, 0, sizeof(instr)); + cpu_ilen = decode_instruction(cpu_instr); + + /* Make sure to update the valid bit for history keeping (if + * enabled) */ + cpu_instr->valid = TRUE; + /* * Operate on the decoded instruction. */ /* Get the operands */ - if (cpu_instr.mn->src_op1 >= 0) { - src1 = &cpu_instr.operands[cpu_instr.mn->src_op1]; + if (cpu_instr->mn->src_op1 >= 0) { + src1 = &cpu_instr->operands[cpu_instr->mn->src_op1]; } - if (cpu_instr.mn->src_op2 >= 0) { - src2 = &cpu_instr.operands[cpu_instr.mn->src_op2]; + if (cpu_instr->mn->src_op2 >= 0) { + src2 = &cpu_instr->operands[cpu_instr->mn->src_op2]; } - if (cpu_instr.mn->src_op3 >= 0) { - src3 = &cpu_instr.operands[cpu_instr.mn->src_op3]; + if (cpu_instr->mn->src_op3 >= 0) { + src3 = &cpu_instr->operands[cpu_instr->mn->src_op3]; } - if (cpu_instr.mn->dst_op >= 0) { - dst = &cpu_instr.operands[cpu_instr.mn->dst_op]; + if (cpu_instr->mn->dst_op >= 0) { + dst = &cpu_instr->operands[cpu_instr->mn->dst_op]; } - switch (cpu_instr.mn->opcode) { + switch (cpu_instr->mn->opcode) { case ADDW2: case ADDH2: case ADDB2: diff --git a/3B2/3b2_defs.h b/3B2/3b2_defs.h index 7eee2fc6..4d1fc795 100644 --- a/3B2/3b2_defs.h +++ b/3B2/3b2_defs.h @@ -53,7 +53,7 @@ noret __libc_longjmp (jmp_buf buf, int val); /* -v flag for examine routine */ #define EX_V_FLAG 1 << 21 -#define MAX_HIST_SIZE 1000000 +#define MAX_HIST_SIZE 10000000 #define MIN_HIST_SIZE 64 #define MAXMEMSIZE (1 << 22) /* 4 MB */ #define MEM_SIZE (cpu_unit.capac) /* actual memory size */ diff --git a/3B2/3b2_sys.c b/3B2/3b2_sys.c index 986ea394..5ae8704c 100644 --- a/3B2/3b2_sys.c +++ b/3B2/3b2_sys.c @@ -45,7 +45,7 @@ REG *sim_PC = &cpu_reg[0]; there may be up to 3 operands, for a maximum of 20 bytes */ int32 sim_emax = 20; -extern instr cpu_instr; +extern instr *cpu_instr; DEVICE *sim_devices[] = { &cpu_dev, @@ -153,7 +153,7 @@ t_stat fprint_sym(FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw) } if (sw & (int32) SWMASK('M')) { - fprint_sym_m(of, &cpu_instr); + fprint_sym_m(of, cpu_instr); return SCPE_OK; }