B5500: Added save restore support. Updated for new sim_tape.
This commit is contained in:
Richard Cornwell
parent
97ea1cf463
commit
f70875d8b2
8 changed files with 91 additions and 57 deletions
|
|
@ -266,10 +266,9 @@ t_stat cpu_ex(t_value * vptr, t_addr addr, UNIT * uptr,
|
|||
t_stat cpu_dep(t_value val, t_addr addr, UNIT * uptr,
|
||||
int32 sw);
|
||||
t_stat cpu_reset(DEVICE * dptr);
|
||||
t_stat cpu_msize(UNIT *up, int32 v, CONST char *cp, void *dp);
|
||||
t_stat cpu_set_size(UNIT * uptr, int32 val, CONST char *cptr,
|
||||
void *desc);
|
||||
t_stat cpu_show_size(FILE * st, UNIT * uptr, int32 val,
|
||||
CONST void *desc);
|
||||
t_stat cpu_show_hist(FILE * st, UNIT * uptr, int32 val,
|
||||
CONST void *desc);
|
||||
t_stat cpu_set_hist(UNIT * uptr, int32 val, CONST char *cptr,
|
||||
|
|
@ -290,7 +289,7 @@ int32 rtc_tps = 60 ;
|
|||
*/
|
||||
|
||||
UNIT cpu_unit[] =
|
||||
{{ UDATA(rtc_srv, MEMAMOUNT(7)|UNIT_IDLE, MAXMEMSIZE ), 16667 },
|
||||
{{ UDATA(rtc_srv, MEMAMOUNT(7)|UNIT_IDLE|UNIT_FIX, MAXMEMSIZE ), 16667 },
|
||||
{ UDATA(0, UNIT_DISABLE|UNIT_DIS, 0 ), 0 }};
|
||||
|
||||
REG cpu_reg[] = {
|
||||
|
|
@ -299,6 +298,7 @@ REG cpu_reg[] = {
|
|||
{BRDATA(A, a_reg, 8,48,2), REG_FIT},
|
||||
{BRDATA(B, b_reg, 8,48,2), REG_FIT},
|
||||
{BRDATA(X, x_reg, 8,39,2), REG_FIT},
|
||||
{BRDATA(Y, x_reg, 8,39,2), REG_FIT},
|
||||
{BRDATA(GH, gh_reg, 8,6,2)},
|
||||
{BRDATA(KV, kv_reg, 8,6,2)},
|
||||
{BRDATAD(MA, ma_reg, 8,15,2, "Memory address")},
|
||||
|
|
@ -319,8 +319,12 @@ REG cpu_reg[] = {
|
|||
{BRDATA(VARF, varf_reg, 2,1,2)},
|
||||
{BRDATA(HLTF, hltf, 2,1,2)},
|
||||
{ORDATAD(IAR, IAR, 15, "Interrupt pending")},
|
||||
{ORDATAD(TUS, iostatus, 32, "Perpherial ready status")},
|
||||
{ORDATAD(TUS, iostatus, 32, "Perpherial ready status"), REG_RO},
|
||||
{FLDATA(HALT, HALT, 0)},
|
||||
{FLDATA(P1RUN, P1_run, 0), REG_HRO},
|
||||
{FLDATA(P2RUN, P2_run, 0), REG_HRO},
|
||||
{DRDATA(IDLE_ENAB, sim_idle_enab, 4), REG_HRO},
|
||||
{ORDATAD(RTC, RTC, 8, "Real Time Counter"), REG_HRO},
|
||||
{NULL}
|
||||
};
|
||||
|
||||
|
|
@ -333,7 +337,6 @@ MTAB cpu_mod[] = {
|
|||
{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(5), NULL, "24K", &cpu_set_size},
|
||||
{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(6), NULL, "28K", &cpu_set_size},
|
||||
{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(7), NULL, "32K", &cpu_set_size},
|
||||
{MTAB_VDV, 0, "MEMORY", NULL, NULL, &cpu_show_size},
|
||||
{MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &sim_set_idle, &sim_show_idle },
|
||||
{MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL },
|
||||
{MTAB_XTD | MTAB_VDV | MTAB_NMO | MTAB_SHP, 0, "HISTORY", "HISTORY",
|
||||
|
|
@ -345,8 +348,8 @@ DEVICE cpu_dev = {
|
|||
"CPU", cpu_unit, cpu_reg, cpu_mod,
|
||||
2, 8, 15, 1, 8, 48,
|
||||
&cpu_ex, &cpu_dep, &cpu_reset, NULL, NULL, NULL,
|
||||
NULL, DEV_DEBUG, 0, dev_debug,
|
||||
NULL, NULL, &cpu_help
|
||||
NULL, DEV_DEBUG|DEV_DYNM, 0, dev_debug,
|
||||
cpu_msize, NULL, &cpu_help
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -3856,7 +3859,6 @@ cpu_ex(t_value * vptr, t_addr addr, UNIT * uptr, int32 sw)
|
|||
return SCPE_NXM;
|
||||
if (vptr != NULL)
|
||||
*vptr = (t_value)(M[addr] & (FLAG|FWORD));
|
||||
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
|
@ -3872,9 +3874,17 @@ cpu_dep(t_value val, t_addr addr, UNIT * uptr, int32 sw)
|
|||
}
|
||||
|
||||
t_stat
|
||||
cpu_show_size(FILE *st, UNIT *uptr, int32 val, CONST void *desc)
|
||||
cpu_msize(UNIT *uptr, int32 v, CONST char *cptr, void *dptr)
|
||||
{
|
||||
fprintf(st, "%dK", MEMSIZE/1024);
|
||||
int32 val;
|
||||
if ((v < 0) || (v > MAXMEMSIZE))
|
||||
return SCPE_ARG;
|
||||
val = ((v / 4096) - 1) << UNIT_V_MSIZE;
|
||||
cpu_unit[0].flags &= ~UNIT_MSIZE;
|
||||
cpu_unit[0].flags |= val;
|
||||
cpu_unit[1].flags &= ~UNIT_MSIZE;
|
||||
cpu_unit[1].flags |= val;
|
||||
MEMSIZE = v;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
|
@ -4015,6 +4025,7 @@ t_stat cpu_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, con
|
|||
fprintf(st, " sim> SET CPU1 ENABLE enable second CPU\n");
|
||||
fprintf(st, "The primary CPU can't be disabled. Memory is shared between the two\n");
|
||||
fprintf(st, "CPU's. Memory can be configured in 4K increments up to 32K total.\n");
|
||||
fprint_reg_help (st, dptr);
|
||||
fprint_set_help(st, dptr);
|
||||
fprint_show_help(st, dptr);
|
||||
return SCPE_OK;
|
||||
|
|
|
|||
|
|
@ -129,6 +129,10 @@ MTAB dsk_mod[] = {
|
|||
{0}
|
||||
};
|
||||
|
||||
REG dsk_reg[] = {
|
||||
{BRDATA(BUFF, dsk_buffer, 16, 8, sizeof(dsk_buffer)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
UNIT dsk_unit[] = {
|
||||
{UDATA(&dsk_srv, UNIT_DISABLE, 0)}, /* DKA */
|
||||
|
|
@ -136,7 +140,7 @@ UNIT dsk_unit[] = {
|
|||
};
|
||||
|
||||
DEVICE dsk_dev = {
|
||||
"DK", dsk_unit, NULL, dsk_mod,
|
||||
"DK", dsk_unit, dsk_reg, dsk_mod,
|
||||
NUM_DEVS_DSK, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, NULL, &dsk_boot, NULL, NULL,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG, 0, dev_debug,
|
||||
|
|
|
|||
|
|
@ -180,7 +180,8 @@ drm_attach(UNIT * uptr, CONST char *file)
|
|||
|
||||
if ((r = attach_unit(uptr, file)) != SCPE_OK)
|
||||
return r;
|
||||
uptr->CMD |= DR_RDY;
|
||||
if ((sim_switches & SIM_SW_REST) == 0)
|
||||
uptr->CMD |= DR_RDY;
|
||||
uptr->hwmark = uptr->capac;
|
||||
if (u)
|
||||
iostatus |= DRUM2_FLAG;
|
||||
|
|
|
|||
|
|
@ -192,6 +192,17 @@ MTAB dtc_mod[] = {
|
|||
{0}
|
||||
};
|
||||
|
||||
REG dtc_reg[] = {
|
||||
{ORDATAD(BUFSIZE, dtc_bufsize, 8, "Buffer size"), REG_HRO},
|
||||
{ORDATAD(NLINES, dtc_desc.lines, 8, "Buffer size"), REG_HRO},
|
||||
{BRDATA(BUF, dtc_buf, 16, 8, sizeof(dtc_buf)), REG_HRO},
|
||||
{BRDATA(LSTAT, dtc_lstatus, 16, 8, sizeof(dtc_lstatus)), REG_HRO},
|
||||
{BRDATA(BUFPTR, dtc_bufptr, 16, 16, sizeof(dtc_bufptr)), REG_HRO},
|
||||
{BRDATA(BUFSIZ, dtc_bsize, 16, 16, sizeof(dtc_bsize)), REG_HRO},
|
||||
{BRDATA(BUFLIM, dtc_blimit, 16, 16, sizeof(dtc_blimit)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
|
||||
UNIT dtc_unit[] = {
|
||||
{UDATA(&dtc_srv, UNIT_DTC, 0)}, /* DTC */
|
||||
|
|
@ -199,7 +210,7 @@ UNIT dtc_unit[] = {
|
|||
};
|
||||
|
||||
DEVICE dtc_dev = {
|
||||
"DTC", dtc_unit, NULL, dtc_mod,
|
||||
"DTC", dtc_unit, dtc_reg, dtc_mod,
|
||||
2, 8, 15, 1, 8, 64,
|
||||
NULL, NULL, &dtc_reset, NULL, &dtc_attach, &dtc_detach,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG | DEV_MUX, 0, dev_debug,
|
||||
|
|
|
|||
|
|
@ -58,6 +58,8 @@ REG chan_reg[] = {
|
|||
{BRDATA(D, D, 8, 48, NUM_CHAN), REG_RO},
|
||||
{BRDATA(CC, CC, 7, 6, NUM_CHAN), REG_RO},
|
||||
{BRDATA(W, W, 8, 48, NUM_CHAN), REG_RO},
|
||||
{BRDATA(status, status, 8, 8, NUM_CHAN), REG_HRO},
|
||||
{ORDATA(cstatus, cstatus, 8), REG_HRO},
|
||||
{NULL}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -89,11 +89,6 @@ t_stat mt_reset(DEVICE *);
|
|||
t_stat mt_help(FILE *, DEVICE *, UNIT *, int32, const char *);
|
||||
const char *mt_description(DEVICE *dptr);
|
||||
|
||||
/* Channel level activity */
|
||||
uint8 mt_chan[NUM_CHAN];
|
||||
|
||||
uint16 mt_busy = 0; /* Busy bits */
|
||||
|
||||
/* One buffer per channel */
|
||||
uint8 mt_buffer[NUM_CHAN][BUFFSIZE];
|
||||
|
||||
|
|
@ -125,6 +120,11 @@ UNIT mt_unit[] = {
|
|||
#endif
|
||||
};
|
||||
|
||||
REG mt_reg[] = {
|
||||
{BRDATA(BUFF, mt_buffer, 16, 8, sizeof(mt_buffer)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
MTAB mt_mod[] = {
|
||||
{MTUF_WLK, 0, "write enabled", "WRITEENABLED", NULL, NULL, NULL,
|
||||
"Write ring in place"},
|
||||
|
|
@ -143,7 +143,7 @@ MTAB mt_mod[] = {
|
|||
|
||||
|
||||
DEVICE mt_dev = {
|
||||
"MT", mt_unit, NULL, mt_mod,
|
||||
"MT", mt_unit, mt_reg, mt_mod,
|
||||
NUM_DEVS_MT, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &mt_reset, NULL, &mt_attach, &mt_detach,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG | DEV_TAPE, 0, dev_debug,
|
||||
|
|
@ -575,7 +575,8 @@ mt_attach(UNIT * uptr, CONST char *file)
|
|||
|
||||
if ((r = sim_tape_attach_ex(uptr, file, 0, 0)) != SCPE_OK)
|
||||
return r;
|
||||
uptr->CMD |= MT_LOADED|MT_BOT;
|
||||
if ((sim_switches & SIM_SW_REST) == 0)
|
||||
uptr->CMD |= MT_LOADED|MT_BOT;
|
||||
sim_activate(uptr, 50000);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
|
@ -599,7 +600,6 @@ mt_reset(DEVICE *dptr)
|
|||
at later. Also disconnect all devices no
|
||||
longer connected. */
|
||||
for ( i = 0; i < NUM_DEVS_MT; i++) {
|
||||
mt_unit[i].dynflags = MT_DENS_556 << UNIT_V_DF_TAPE;
|
||||
if ((mt_unit[i].flags & UNIT_ATT) == 0)
|
||||
iostatus &= ~(1 << i);
|
||||
else if (mt_unit[i].CMD & (MT_LOADED|MT_RDY)) {
|
||||
|
|
|
|||
|
|
@ -40,7 +40,6 @@
|
|||
#define LINENUM u3
|
||||
#define POS u4
|
||||
#define CMD u5
|
||||
#define CARDIMG up7
|
||||
|
||||
|
||||
/* std devices. data structures
|
||||
|
|
@ -91,6 +90,7 @@ t_stat cdr_attach(UNIT *, CONST char *);
|
|||
t_stat cdr_detach(UNIT *);
|
||||
t_stat cdr_help(FILE *, DEVICE *, UNIT *, int32, const char *);
|
||||
const char *cdr_description(DEVICE *dptr);
|
||||
uint16 cdr_buffer[NUM_DEVS_CDR][80];
|
||||
#endif
|
||||
|
||||
#if NUM_DEVS_CDP > 0
|
||||
|
|
@ -100,15 +100,10 @@ t_stat cdp_attach(UNIT *, CONST char *);
|
|||
t_stat cdp_detach(UNIT *);
|
||||
t_stat cdp_help(FILE *, DEVICE *, UNIT *, int32, const char *);
|
||||
const char *cdp_description(DEVICE *dptr);
|
||||
uint16 cdp_buffer[NUM_DEVS_CDP][80];
|
||||
#endif
|
||||
|
||||
#if NUM_DEVS_LPR > 0
|
||||
struct _lpr_data
|
||||
{
|
||||
uint8 lbuff[145]; /* Output line buffer */
|
||||
}
|
||||
lpr_data[NUM_DEVS_LPR];
|
||||
|
||||
t_stat lpr_ini(DEVICE *);
|
||||
t_stat lpr_srv(UNIT *);
|
||||
t_stat lpr_attach(UNIT *, CONST char *);
|
||||
|
|
@ -117,6 +112,7 @@ t_stat lpr_setlpp(UNIT *, int32, CONST char *, void *);
|
|||
t_stat lpr_getlpp(FILE *, UNIT *, int32, CONST void *);
|
||||
t_stat lpr_help(FILE *, DEVICE *, UNIT *, int32, const char *);
|
||||
const char *lpr_description(DEVICE *dptr);
|
||||
uint8 lpr_buffer[NUM_DEVS_LPR][145]; /* Output line buffer */
|
||||
#endif
|
||||
|
||||
#if NUM_DEVS_CON > 0
|
||||
|
|
@ -153,8 +149,13 @@ MTAB cdr_mod[] = {
|
|||
{0}
|
||||
};
|
||||
|
||||
REG cdr_reg[] = {
|
||||
{BRDATA(BUFF, cdr_buffer, 16, 16, sizeof(cdr_buffer)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
DEVICE cdr_dev = {
|
||||
"CR", cdr_unit, NULL, cdr_mod,
|
||||
"CR", cdr_unit, cdr_reg, cdr_mod,
|
||||
NUM_DEVS_CDR, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &cdr_ini, &cdr_boot, &cdr_attach, &cdr_detach,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG | DEV_CARD, 0, cdr_debug,
|
||||
|
|
@ -175,8 +176,13 @@ MTAB cdp_mod[] = {
|
|||
{0}
|
||||
};
|
||||
|
||||
REG cdp_reg[] = {
|
||||
{BRDATA(BUFF, cdp_buffer, 16, 16, sizeof(cdp_buffer)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
DEVICE cdp_dev = {
|
||||
"CP", cdp_unit, NULL, cdp_mod,
|
||||
"CP", cdp_unit, cdp_reg, cdp_mod,
|
||||
NUM_DEVS_CDP, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &cdp_ini, NULL, &cdp_attach, &cdp_detach,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG | DEV_CARD, 0, cdr_debug,
|
||||
|
|
@ -201,8 +207,13 @@ MTAB lpr_mod[] = {
|
|||
{0}
|
||||
};
|
||||
|
||||
REG lpr_reg[] = {
|
||||
{BRDATA(BUFF, lpr_buffer, 16, 8, sizeof(lpr_buffer)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
DEVICE lpr_dev = {
|
||||
"LP", lpr_unit, NULL, lpr_mod,
|
||||
"LP", lpr_unit, lpr_reg, lpr_mod,
|
||||
NUM_DEVS_LPR, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &lpr_ini, NULL, &lpr_attach, &lpr_detach,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG, 0, dev_debug,
|
||||
|
|
@ -216,8 +227,13 @@ UNIT con_unit[] = {
|
|||
{UDATA(con_srv, UNIT_IDLE, 0), 0}, /* A */
|
||||
};
|
||||
|
||||
REG con_reg[] = {
|
||||
{BRDATA(BUFF, con_data, 16, 8, sizeof(con_data)), REG_HRO},
|
||||
{0}
|
||||
};
|
||||
|
||||
DEVICE con_dev = {
|
||||
"CON", con_unit, NULL, NULL,
|
||||
"CON", con_unit, con_reg, NULL,
|
||||
NUM_DEVS_CON, 8, 15, 1, 8, 8,
|
||||
NULL, NULL, &con_ini, NULL, NULL, NULL,
|
||||
NULL, DEV_DISABLE | DEV_DEBUG, 0, dev_debug,
|
||||
|
|
@ -318,7 +334,7 @@ t_stat
|
|||
cdr_srv(UNIT *uptr) {
|
||||
int chan = URCSTA_CHMASK & uptr->CMD;
|
||||
int u = (uptr - cdr_unit);
|
||||
uint16 *image = (uint16 *)(uptr->CARDIMG);
|
||||
uint16 *image = &cdr_buffer[u][0];
|
||||
|
||||
if (uptr->CMD & URCSTA_EOF) {
|
||||
sim_debug(DEBUG_DETAIL, &cdr_dev, "cdr %d %d unready\n", u, chan);
|
||||
|
|
@ -475,10 +491,6 @@ cdr_attach(UNIT * uptr, CONST char *file)
|
|||
|
||||
if ((r = sim_card_attach(uptr, file)) != SCPE_OK)
|
||||
return r;
|
||||
if (uptr->CARDIMG == 0)
|
||||
uptr->CARDIMG = malloc(sizeof(uint16)*80);
|
||||
uptr->CMD &= URCSTA_BUSY;
|
||||
uptr->POS = 0;
|
||||
iostatus |= (CARD1_FLAG << u);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
|
@ -488,9 +500,6 @@ cdr_detach(UNIT * uptr)
|
|||
{
|
||||
int u = uptr-cdr_unit;
|
||||
|
||||
if (uptr->CARDIMG != 0)
|
||||
free(uptr->CARDIMG);
|
||||
uptr->CARDIMG = 0;
|
||||
iostatus &= ~(CARD1_FLAG << u);
|
||||
return sim_card_detach(uptr);
|
||||
}
|
||||
|
|
@ -535,7 +544,7 @@ t_stat
|
|||
cdp_srv(UNIT *uptr) {
|
||||
int chan = URCSTA_CHMASK & uptr->CMD;
|
||||
int u = (uptr - cdp_unit);
|
||||
uint16 *image = (uint16 *)(uptr->CARDIMG);
|
||||
uint16 *image = &cdp_buffer[u][0];
|
||||
|
||||
if (uptr->CMD & URCSTA_BUSY) {
|
||||
/* Done waiting, punch card */
|
||||
|
|
@ -609,24 +618,18 @@ cdp_attach(UNIT * uptr, CONST char *file)
|
|||
|
||||
if ((r = sim_card_attach(uptr, file)) != SCPE_OK)
|
||||
return r;
|
||||
if (uptr->CARDIMG == 0) {
|
||||
uptr->CARDIMG = calloc(80, sizeof(uint16));
|
||||
uptr->CMD = 0;
|
||||
iostatus |= PUNCH_FLAG;
|
||||
}
|
||||
iostatus |= PUNCH_FLAG;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
t_stat
|
||||
cdp_detach(UNIT * uptr)
|
||||
{
|
||||
uint16 *image = (uint16 *)(uptr->CARDIMG);
|
||||
int u = uptr-cdr_unit;
|
||||
uint16 *image = &cdp_buffer[u][0];
|
||||
|
||||
if (uptr->CMD & URCSTA_FULL)
|
||||
sim_punch_card(uptr, image);
|
||||
if (uptr->CARDIMG != 0)
|
||||
free(uptr->CARDIMG);
|
||||
uptr->CARDIMG = 0;
|
||||
iostatus &= ~PUNCH_FLAG;
|
||||
return sim_card_detach(uptr);
|
||||
}
|
||||
|
|
@ -716,7 +719,7 @@ print_line(UNIT * uptr, int unit)
|
|||
|
||||
/* Scan each column */
|
||||
for (i = 0; i < uptr->POS; i++) {
|
||||
int bcd = lpr_data[unit].lbuff[i] & 077;
|
||||
int bcd = lpr_buffer[unit][i] & 077;
|
||||
|
||||
out[i] = con_to_ascii[bcd];
|
||||
}
|
||||
|
|
@ -868,10 +871,10 @@ lpr_srv(UNIT *uptr) {
|
|||
|
||||
/* Copy next column over */
|
||||
if ((uptr->CMD & URCSTA_BUSY) != 0) {
|
||||
if(chan_read_char(chan, &lpr_data[u].lbuff[uptr->POS], 0)) {
|
||||
if(chan_read_char(chan, &lpr_buffer[u][uptr->POS], 0)) {
|
||||
/* Done waiting, print line */
|
||||
print_line(uptr, u);
|
||||
memset(&lpr_data[u].lbuff[0], 0, 144);
|
||||
memset(&lpr_buffer[u][0], 0, 144);
|
||||
uptr->CMD |= URCSTA_FULL;
|
||||
uptr->CMD &= ~URCSTA_BUSY;
|
||||
chan_set_wc(chan, (uptr->POS/8));
|
||||
|
|
@ -880,7 +883,7 @@ lpr_srv(UNIT *uptr) {
|
|||
return SCPE_OK;
|
||||
} else {
|
||||
sim_debug(DEBUG_DATA, &lpr_dev, "lpr %d: Char < %02o\n", u,
|
||||
lpr_data[u].lbuff[uptr->POS]);
|
||||
lpr_buffer[u][uptr->POS]);
|
||||
uptr->POS++;
|
||||
}
|
||||
sim_activate(uptr, 50);
|
||||
|
|
@ -896,9 +899,11 @@ lpr_attach(UNIT * uptr, CONST char *file)
|
|||
|
||||
if ((r = attach_unit(uptr, file)) != SCPE_OK)
|
||||
return r;
|
||||
uptr->CMD = 0;
|
||||
uptr->LINENUM = 0;
|
||||
uptr->POS = 0;
|
||||
if ((sim_switches & SIM_SW_REST) == 0) {
|
||||
uptr->CMD = 0;
|
||||
uptr->LINENUM = 0;
|
||||
uptr->POS = 0;
|
||||
}
|
||||
iostatus |= PRT1_FLAG << u;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
|
|
|||
Binary file not shown.
Loading…
Add table
Reference in a new issue