diff --git a/VAX/vax730_stddev.c b/VAX/vax730_stddev.c index 0075493d..0f30c54e 100644 --- a/VAX/vax730_stddev.c +++ b/VAX/vax730_stddev.c @@ -199,6 +199,7 @@ int32 td_regval; /* temp location used in t_stat tti_svc (UNIT *uptr); t_stat tto_svc (UNIT *uptr); t_stat tmr_svc (UNIT *uptr); +t_stat clk_svc (UNIT *uptr); t_stat tti_reset (DEVICE *dptr); t_stat tto_reset (DEVICE *dptr); t_stat clk_reset (DEVICE *dptr); @@ -292,7 +293,7 @@ DEVICE tto_dev = { /* TODR and TMR data structures */ -UNIT clk_unit = { UDATA (NULL, UNIT_IDLE+UNIT_FIX, sizeof(TOY))}; +UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE+UNIT_FIX, sizeof(TOY))}; REG clk_reg[] = { { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, @@ -662,7 +663,6 @@ if ((val & TMR_CSR_RUN) == 0) { /* clearing run? */ if (tmr_iccs & TMR_CSR_RUN) { /* run 1 -> 0? */ tmr_icr = icr_rd (); /* update icr */ sim_debug (TMR_DB_REG, &tmr_dev, "iccs_wr() - stopped clock with remaining ICR=0x%08X\n", tmr_icr); - sim_rtcn_calb (0, TMR_CLK); /* stop timer */ } sim_cancel (&tmr_unit); /* cancel timer */ } @@ -676,10 +676,8 @@ if (val & TMR_CSR_XFR) /* xfr set? */ if (val & TMR_CSR_RUN) { /* run? */ if (val & TMR_CSR_XFR) /* new tir? */ sim_cancel (&tmr_unit); /* stop prev */ - if (!sim_is_active (&tmr_unit)) { /* not running? */ - sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ + if (!sim_is_active (&tmr_unit)) /* not running? */ tmr_sched (tmr_icr); /* activate */ - } } else { if (val & TMR_CSR_XFR) /* xfr set? */ @@ -763,10 +761,7 @@ void tmr_sched (uint32 nicr) { uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF; -clk_tps = (int32)((1000000.0 / usecs) + 0.5); - sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps); -tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); sim_activate_after (&tmr_unit, usecs); } @@ -780,6 +775,16 @@ if (clk_unit.filebuf == NULL) { /* make sure the TODR is return SCPE_MEM; } todr_resync (); +sim_activate_after (&clk_unit, 10000); +tmr_poll = sim_rtcn_init_unit (&clk_unit, CLK_DELAY, TMR_CLK); /* init timer */ +return SCPE_OK; +} + +t_stat clk_svc (UNIT *uptr) +{ +sim_activate_after (uptr, 10000); +tmr_poll = sim_rtcn_calb (100, TMR_CLK); +tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ return SCPE_OK; } @@ -878,8 +883,6 @@ return r; t_stat tmr_reset (DEVICE *dptr) { -tmr_poll = sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ -tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ tmr_iccs = 0; tmr_nicr = 0; tmr_int = 0; diff --git a/VAX/vax750_stddev.c b/VAX/vax750_stddev.c index 1621b912..824a551a 100644 --- a/VAX/vax750_stddev.c +++ b/VAX/vax750_stddev.c @@ -189,6 +189,7 @@ int32 td_regval; /* temp location used in t_stat tti_svc (UNIT *uptr); t_stat tto_svc (UNIT *uptr); t_stat tmr_svc (UNIT *uptr); +t_stat clk_svc (UNIT *uptr); t_stat tti_reset (DEVICE *dptr); t_stat tto_reset (DEVICE *dptr); t_stat clk_reset (DEVICE *dptr); @@ -285,7 +286,7 @@ DEVICE tto_dev = { /* TODR and TMR data structures */ -UNIT clk_unit = { UDATA (NULL, UNIT_IDLE+UNIT_FIX, sizeof(TOY))}; +UNIT clk_unit = { UDATA (&clk_svc, UNIT_IDLE+UNIT_FIX, sizeof(TOY))}; REG clk_reg[] = { { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, @@ -658,7 +659,6 @@ if ((val & TMR_CSR_RUN) == 0) { /* clearing run? */ if (tmr_iccs & TMR_CSR_RUN) { /* run 1 -> 0? */ tmr_icr = icr_rd (); /* update icr */ sim_debug (TMR_DB_REG, &tmr_dev, "iccs_wr() - stopped clock with remaining ICR=0x%08X\n", tmr_icr); - sim_rtcn_calb (0, TMR_CLK); /* stop timer */ } sim_cancel (&tmr_unit); /* cancel timer */ } @@ -672,10 +672,8 @@ if (val & TMR_CSR_XFR) /* xfr set? */ if (val & TMR_CSR_RUN) { /* run? */ if (val & TMR_CSR_XFR) /* new tir? */ sim_cancel (&tmr_unit); /* stop prev */ - if (!sim_is_active (&tmr_unit)) { /* not running? */ - sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ + if (!sim_is_active (&tmr_unit)) /* not running? */ tmr_sched (tmr_icr); /* activate */ - } } else { if (val & TMR_CSR_XFR) /* xfr set? */ @@ -759,10 +757,7 @@ void tmr_sched (uint32 nicr) { uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF; -clk_tps = (int32)((1000000.0 / usecs) + 0.5); - sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps); -tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); sim_activate_after (&tmr_unit, usecs); } @@ -776,6 +771,16 @@ if (clk_unit.filebuf == NULL) { /* make sure the TODR is return SCPE_MEM; } todr_resync (); +sim_activate_after (&clk_unit, 10000); +tmr_poll = sim_rtcn_init_unit (&clk_unit, CLK_DELAY, TMR_CLK); /* init timer */ +return SCPE_OK; +} + +t_stat clk_svc (UNIT *uptr) +{ +sim_activate_after (uptr, 10000); +tmr_poll = sim_rtcn_calb (100, TMR_CLK); +tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ return SCPE_OK; } @@ -875,8 +880,6 @@ return r; t_stat tmr_reset (DEVICE *dptr) { -tmr_poll = sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ -tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ tmr_iccs = 0; tmr_nicr = 0; tmr_int = 0; diff --git a/VAX/vax780_stddev.c b/VAX/vax780_stddev.c index 717ad785..8a4ea5cf 100644 --- a/VAX/vax780_stddev.c +++ b/VAX/vax780_stddev.c @@ -234,6 +234,7 @@ uint8 comm_region[COMM_LNT] = { 0 }; /* comm region */ t_stat tti_svc (UNIT *uptr); t_stat tto_svc (UNIT *uptr); t_stat tmr_svc (UNIT *uptr); +t_stat clk_svc (UNIT *uptr); t_stat tti_reset (DEVICE *dptr); t_stat tto_reset (DEVICE *dptr); t_stat clk_reset (DEVICE *dptr); @@ -332,7 +333,7 @@ DEVICE tto_dev = { /* TODR and TMR data structures */ -UNIT clk_unit = { UDATA (NULL, UNIT_FIX, sizeof(TOY))}; +UNIT clk_unit = { UDATA (&clk_svc, UNIT_FIX, sizeof(TOY))}; REG clk_reg[] = { { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, @@ -628,7 +629,6 @@ if ((val & TMR_CSR_RUN) == 0) { /* clearing run? */ if (tmr_iccs & TMR_CSR_RUN) { /* run 1 -> 0? */ tmr_icr = icr_rd (); /* update icr */ sim_debug (TMR_DB_REG, &tmr_dev, "iccs_wr() - stopped clock with remaining ICR=0x%08X\n", tmr_icr); - sim_rtcn_calb (0, TMR_CLK); /* stop timer */ } sim_cancel (&tmr_unit); /* cancel timer */ } @@ -642,10 +642,8 @@ if (val & TMR_CSR_XFR) /* xfr set? */ if (val & TMR_CSR_RUN) { /* run? */ if (val & TMR_CSR_XFR) /* new tir? */ sim_cancel (&tmr_unit); /* stop prev */ - if (!sim_is_active (&tmr_unit)) { /* not running? */ - sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ + if (!sim_is_active (&tmr_unit)) /* not running? */ tmr_sched (tmr_icr); /* activate */ - } } else { if (val & TMR_CSR_XFR) /* xfr set? */ @@ -729,10 +727,7 @@ void tmr_sched (uint32 nicr) { double usecs = (nicr) ? (double)(~nicr + 1) : (double)0x100000000LL; -clk_tps = (int32)((1000000.0 / usecs) + 0.5); - sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=%.0f) - tps=%d\n", nicr, usecs, clk_tps); -tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); sim_activate_after_d (&tmr_unit, usecs); } @@ -746,6 +741,16 @@ if (clk_unit.filebuf == NULL) { /* make sure the TODR is return SCPE_MEM; } todr_resync (); +sim_activate_after (&clk_unit, 10000); +tmr_poll = sim_rtcn_init_unit (&clk_unit, CLK_DELAY, TMR_CLK); /* init timer */ +return SCPE_OK; +} + +t_stat clk_svc (UNIT *uptr) +{ +sim_activate_after (uptr, 10000); +tmr_poll = sim_rtcn_calb (100, TMR_CLK); +tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ return SCPE_OK; } @@ -845,8 +850,6 @@ return r; t_stat tmr_reset (DEVICE *dptr) { -tmr_poll = sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ -tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ tmr_iccs = 0; tmr_nicr = 0; tmr_int = 0; diff --git a/VAX/vax820_stddev.c b/VAX/vax820_stddev.c index 0807abe2..7d1839b4 100644 --- a/VAX/vax820_stddev.c +++ b/VAX/vax820_stddev.c @@ -229,6 +229,7 @@ extern int32 cur_cpu; t_stat tti_svc (UNIT *uptr); t_stat tto_svc (UNIT *uptr); t_stat tmr_svc (UNIT *uptr); +t_stat clk_svc (UNIT *uptr); t_stat tti_reset (DEVICE *dptr); t_stat tto_reset (DEVICE *dptr); t_stat clk_reset (DEVICE *dptr); @@ -329,7 +330,7 @@ DEVICE tto_dev = { /* TODR and TMR data structures */ -UNIT clk_unit = { UDATA (NULL, UNIT_FIX, sizeof(TOY))}; +UNIT clk_unit = { UDATA (&clk_svc, UNIT_FIX, sizeof(TOY))}; REG clk_reg[] = { { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, @@ -656,10 +657,8 @@ void iccs_wr (int32 val) { sim_debug_bits_hdr (TMR_DB_REG, &tmr_dev, "iccs_wr()", tmr_iccs_bits, tmr_iccs, val, TRUE); if ((val & TMR_CSR_RUN) == 0) { /* clearing run? */ - if (tmr_iccs & TMR_CSR_RUN) { /* run 1 -> 0? */ + if (tmr_iccs & TMR_CSR_RUN) /* run 1 -> 0? */ tmr_icr = icr_rd (); /* update itr */ - sim_rtcn_calb (0, TMR_CLK); /* stop timer */ - } sim_cancel (&tmr_unit); /* cancel timer */ } if (val & CSR_DONE) /* Interrupt Acked? */ @@ -672,10 +671,8 @@ if (val & TMR_CSR_XFR) /* xfr set? */ if (val & TMR_CSR_RUN) { /* run? */ if (val & TMR_CSR_XFR) /* new tir? */ sim_cancel (&tmr_unit); /* stop prev */ - if (!sim_is_active (&tmr_unit)) { /* not running? */ - sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ + if (!sim_is_active (&tmr_unit)) /* not running? */ tmr_sched (tmr_icr); /* activate */ - } } else { if (val & TMR_CSR_XFR) /* xfr set? */ @@ -759,10 +756,7 @@ void tmr_sched (uint32 nicr) { uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF; -clk_tps = (int32)((1000000.0 / usecs) + 0.5); - sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps); -tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); sim_activate_after (&tmr_unit, usecs); } @@ -780,6 +774,16 @@ if (clk_unit.flags & UNIT_ATT) /* battery backup hooked up? */ wtc_set_valid (); else wtc_set_invalid (); +sim_activate_after (&clk_unit, 10000); +tmr_poll = sim_rtcn_init_unit (&clk_unit, CLK_DELAY, TMR_CLK); /* init timer */ +return SCPE_OK; +} + +t_stat clk_svc (UNIT *uptr) +{ +sim_activate_after (uptr, 10000); +tmr_poll = sim_rtcn_calb (100, TMR_CLK); +tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ return SCPE_OK; } @@ -881,8 +885,6 @@ return r; t_stat tmr_reset (DEVICE *dptr) { -tmr_poll = sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ -tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ tmr_iccs = 0; tmr_nicr = 0; tmr_int = 0; diff --git a/VAX/vax860_stddev.c b/VAX/vax860_stddev.c index 26bafa2e..713fcd9f 100644 --- a/VAX/vax860_stddev.c +++ b/VAX/vax860_stddev.c @@ -248,6 +248,7 @@ uint16 *rlcs_buf = NULL; t_stat tti_svc (UNIT *uptr); t_stat tto_svc (UNIT *uptr); t_stat tmr_svc (UNIT *uptr); +t_stat clk_svc (UNIT *uptr); t_stat lc_svc (UNIT *uptr); t_stat rlcs_svc (UNIT *uptr); t_stat tti_reset (DEVICE *dptr); @@ -357,7 +358,7 @@ DEVICE tto_dev = { /* TODR and TMR data structures */ -UNIT clk_unit = { UDATA (NULL, UNIT_FIX, sizeof(TOY))}; +UNIT clk_unit = { UDATA (&clk_svc, UNIT_FIX, sizeof(TOY))}; REG clk_reg[] = { { DRDATAD (TIME, clk_unit.wait, 24, "initial poll interval"), REG_NZ + PV_LEFT }, @@ -764,7 +765,6 @@ if ((val & TMR_CSR_RUN) == 0) { /* clearing run? */ if (tmr_iccs & TMR_CSR_RUN) { /* run 1 -> 0? */ tmr_icr = icr_rd (); /* update icr */ sim_debug (TMR_DB_REG, &tmr_dev, "iccs_wr() - stopping clock remaining ICR=0x%08X\n", tmr_icr); - sim_rtcn_calb (0, TMR_CLK); /* stop timer */ } sim_cancel (&tmr_unit); /* cancel timer */ } @@ -778,10 +778,8 @@ if (val & TMR_CSR_XFR) /* xfr set? */ if (val & TMR_CSR_RUN) { /* run? */ if (val & TMR_CSR_XFR) /* new tir? */ sim_cancel (&tmr_unit); /* stop prev */ - if (!sim_is_active (&tmr_unit)) { /* not running? */ - sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ + if (!sim_is_active (&tmr_unit)) /* not running? */ tmr_sched (tmr_icr); /* activate */ - } } else { if (val & TMR_CSR_XFR) /* xfr set? */ @@ -865,10 +863,7 @@ void tmr_sched (uint32 nicr) { uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF; -clk_tps = (int32)((1000000.0 / usecs) + 0.5); - sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps); -tmr_poll = sim_rtcn_calb (clk_tps, TMR_CLK); sim_activate_after (&tmr_unit, usecs); } @@ -882,6 +877,16 @@ if (clk_unit.filebuf == NULL) { /* make sure the TODR is return SCPE_MEM; } todr_resync (); +sim_activate_after (&clk_unit, 10000); +tmr_poll = sim_rtcn_init_unit (&clk_unit, CLK_DELAY, TMR_CLK); /* init timer */ +return SCPE_OK; +} + +t_stat clk_svc (UNIT *uptr) +{ +sim_activate_after (uptr, 10000); +tmr_poll = sim_rtcn_calb (100, TMR_CLK); +tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ return SCPE_OK; } @@ -980,8 +985,6 @@ return r; t_stat tmr_reset (DEVICE *dptr) { -tmr_poll = sim_rtcn_init_unit (&tmr_unit, CLK_DELAY, TMR_CLK); /* init timer */ -tmxr_poll = tmr_poll * TMXR_MULT; /* set mux poll */ tmr_iccs = 0; tmr_nicr = 0; tmr_int = 0;